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Searched refs:AHB3SMENR (Results 1 – 25 of 69) sorted by relevance

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/hal_stm32-3.4.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_rcc.h2418 #define __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QUADSPIS…
2420 #define __HAL_RCC_PKA_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_PKASMEN)…
2421 #define __HAL_RCC_AES2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_AES2SMEN…
2422 #define __HAL_RCC_RNG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_RNGSMEN)…
2423 #define __HAL_RCC_SRAM2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_SRAM2SME…
2424 #define __HAL_RCC_FLASH_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FLASHSME…
2427 #define __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QUADSPIS…
2429 #define __HAL_RCC_PKA_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_PKASMEN)…
2430 #define __HAL_RCC_AES2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_AES2SMEN…
2431 #define __HAL_RCC_RNG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_RNGSMEN)…
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Dstm32wbxx_ll_bus.h876 SET_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
878 tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
902 CLEAR_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_DisableClockSleep()
/hal_stm32-3.4.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h2964 #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN)
2968 #define __HAL_RCC_OSPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN)
2972 #define __HAL_RCC_OSPI2_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI2SMEN)
2976 #define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN)
2980 #define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN)
2984 #define __HAL_RCC_OSPI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN)
2988 #define __HAL_RCC_OSPI2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI2SMEN)
2992 #define __HAL_RCC_FMC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN)
3537 #define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN) …
3541 #define __HAL_RCC_OSPI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN)…
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Dstm32l4xx_ll_bus.h994 SET_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockStopSleep()
996 tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockStopSleep()
1017 CLEAR_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_DisableClockStopSleep()
/hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h3459 #define __HAL_RCC_LPGPIO1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_LPGPIO1…
3461 #define __HAL_RCC_PWR_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_PWRSMEN)
3463 #define __HAL_RCC_ADC4_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_ADC4SME…
3465 #define __HAL_RCC_DAC1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_DAC1SME…
3467 #define __HAL_RCC_LPDMA1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_LPDMA1S…
3469 #define __HAL_RCC_ADF1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_ADF1SME…
3471 #define __HAL_RCC_GTZC2_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_GTZC2SM…
3473 #define __HAL_RCC_SRAM4_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_SRAM4SM…
3475 #define __HAL_RCC_LPGPIO1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_LPGPI…
3477 #define __HAL_RCC_PWR_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_PWRSM…
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Dstm32u5xx_ll_bus.h1492 SET_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockStopSleep()
1494 tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockStopSleep()
1522 return ((READ_BIT(RCC->AHB3SMENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB3_GRP1_IsEnabledClockStopSleep()
1549 CLEAR_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_DisableClockStopSleep()
/hal_stm32-3.4.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_bus.h806 SET_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockStopSleep()
808 tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockStopSleep()
824 CLEAR_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_DisableClockStopSleep()
Dstm32l5xx_hal_rcc.h2143 #define __HAL_RCC_OSPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN)
2145 #define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN)
2148 #define __HAL_RCC_OSPI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN)
2150 #define __HAL_RCC_FMC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN)
2481 #define __HAL_RCC_FMC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) !…
2484 #define __HAL_RCC_FMC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) =…
/hal_stm32-3.4.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_bus.h832 SET_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockStopSleep()
834 tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockStopSleep()
851 CLEAR_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_DisableClockStopSleep()
Dstm32g4xx_hal_rcc.h2108 #define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN)
2112 #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN)
2116 #define __HAL_RCC_FMC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN)
2120 #define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN)
2493 #define __HAL_RCC_FMC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) !…
2497 #define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN) …
2501 #define __HAL_RCC_FMC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) =…
2505 #define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN) …
/hal_stm32-3.4.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_bus.h831 SET_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
833 tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
856 return ((READ_BIT(RCC->AHB3SMENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_AHB3_GRP1_IsEnabledClockSleep()
878 CLEAR_BIT(RCC->AHB3SMENR, Periphs); in LL_AHB3_GRP1_DisableClockSleep()
/hal_stm32-3.4.0/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h549 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 & AHB4 peripheral clocks enable in sleep and stop modes … member
Dstm32wle5xx.h549 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 & AHB4 peripheral clocks enable in sleep and stop modes … member
Dstm32wl54xx.h690 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 & AHB4 peripheral clocks enable in sleep and stop modes … member
Dstm32wl55xx.h690 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 & AHB4 peripheral clocks enable in sleep and stop modes … member
Dstm32wl5mxx.h690 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 & AHB4 peripheral clocks enable in sleep and stop modes … member
/hal_stm32-3.4.0/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h416 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 & AHB4 peripheral clocks enable in sleep and stop modes… member
Dstm32wb30xx.h420 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 & AHB4 peripheral clocks enable in sleep and stop modes… member
Dstm32wb50xx.h421 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 & AHB4 peripheral clocks enable in sleep and stop modes… member
Dstm32wb35xx.h472 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 & AHB4 peripheral clocks enable in sleep and stop modes… member
/hal_stm32-3.4.0/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h406 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 & AHB4 peripheral clocks enable in sleep and stop modes… member
Dstm32wb15xx.h416 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 & AHB4 peripheral clocks enable in sleep and stop modes… member
/hal_stm32-3.4.0/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h528 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 peripheral clocks enable in sleep and stop modes register… member
Dstm32l422xx.h529 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 peripheral clocks enable in sleep and stop modes register… member
/hal_stm32-3.4.0/stm32cube/stm32g4xx/soc/
Dstm32g431xx.h605 …__IO uint32_t AHB3SMENR; /*!< RCC AHB3 peripheral clocks enable in sleep and stop modes register… member

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