| /hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/mcu/all/ |
| D | bsp_clocks.c | 34 static void bsp_prv_clock_pre_setting(fsp_priv_clock_t clock);
35 static void bsp_prv_clock_post_setting(fsp_priv_clock_t clock);
36 void bsp_prv_clock_selector_set(fsp_priv_clock_t clock, uint32_t clock_sel);
37 void bsp_prv_clock_divider_set(fsp_priv_clock_t clock, uint32_t clock_div);
274 static void bsp_prv_clock_pre_setting (fsp_priv_clock_t clock) in bsp_prv_clock_pre_setting() argument
276 FSP_PARAMETER_NOT_USED(clock); in bsp_prv_clock_pre_setting()
284 static void bsp_prv_clock_post_setting (fsp_priv_clock_t clock) in bsp_prv_clock_post_setting() argument
286 FSP_PARAMETER_NOT_USED(clock); in bsp_prv_clock_post_setting()
295 void bsp_prv_clock_selector_set (fsp_priv_clock_t clock, uint32_t clock_sel) in bsp_prv_clock_selector_set() argument
297 uint32_t clock_freq = g_clock_freq[clock]; in bsp_prv_clock_selector_set()
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| /hal_renesas-latest/zephyr/ra/portable/ |
| D | bsp_common.h | 332 uint32_t R_BSP_SourceClockHzGet(fsp_priv_source_clock_t clock);
360 __STATIC_INLINE uint32_t R_FSP_SystemClockHzGet (fsp_priv_clock_t clock) in R_FSP_SystemClockHzGet() argument
364 uint32_t clock_div = (sckdivcr >> clock) & FSP_PRV_SCKDIVCR_DIV_MASK; in R_FSP_SystemClockHzGet()
367 if (FSP_PRIV_CLOCK_CPUCLK == clock) in R_FSP_SystemClockHzGet()
396 FSP_PARAMETER_NOT_USED(clock); in R_FSP_SystemClockHzGet()
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| /hal_renesas-latest/drivers/ra/fsp/src/bsp/mcu/all/ |
| D | bsp_common.h | 330 uint32_t R_BSP_SourceClockHzGet(fsp_priv_source_clock_t clock);
358 __STATIC_INLINE uint32_t R_FSP_SystemClockHzGet (fsp_priv_clock_t clock) in R_FSP_SystemClockHzGet() argument
362 uint32_t clock_div = (sckdivcr >> clock) & FSP_PRV_SCKDIVCR_DIV_MASK; in R_FSP_SystemClockHzGet()
365 if (FSP_PRIV_CLOCK_CPUCLK == clock) in R_FSP_SystemClockHzGet()
394 FSP_PARAMETER_NOT_USED(clock); in R_FSP_SystemClockHzGet()
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| D | bsp_clocks.c | 863 void bsp_prv_prepare_pll (uint32_t clock, uint32_t const * const p_pll_hz) in bsp_prv_prepare_pll() argument
865 if (BSP_CLOCKS_SOURCE_CLOCK_PLL == clock) in bsp_prv_prepare_pll()
1073 void bsp_prv_clock_set (uint32_t clock, uint32_t sckdivcr, uint8_t sckdivcr2) in bsp_prv_clock_set() argument
1083 uint32_t iclk_freq_hz_post_change = g_clock_freq[clock] / BSP_PRV_SCKDIVCR_DIV_VALUE(iclk_div); in bsp_prv_clock_set()
1086 … uint32_t clock_freq_hz_post_change = g_clock_freq[clock] / BSP_PRV_SCKDIVCR_DIV_VALUE(cpuclk_div); in bsp_prv_clock_set()
1096 if (g_clock_freq[clock] >= g_clock_freq[R_SYSTEM->SCKSCR]) in bsp_prv_clock_set()
1137 R_SYSTEM->SCKSCR = (uint8_t) clock; in bsp_prv_clock_set()
1165 R_SYSTEM->SCKSCR = (uint8_t) clock; in bsp_prv_clock_set()
1201 R_SYSTEM->SCKSCR = (uint8_t) clock; in bsp_prv_clock_set()
1296 uint32_t clock = BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC; in bsp_prv_clock_source_get() local
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| D | bsp_clocks.h | 1155 void bsp_prv_prepare_pll(uint32_t clock, uint32_t const * const p_pll_hz);
1158 void bsp_prv_clock_set(uint32_t clock, uint32_t sckdivcr, uint8_t sckdivcr2);
1161 void bsp_prv_clock_set(uint32_t clock, uint8_t hocodiv, uint8_t mocodiv, uint8_t moscdiv);
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| /hal_renesas-latest/zephyr/rz/portable/rzg/ |
| D | bsp_common.h | 264 uint32_t R_FSP_SystemClockHzGet(fsp_priv_clock_t clock);
265 void R_FSP_SystemClockHzSet(fsp_priv_clock_t clock, uint32_t clock_sel, uint32_t clock_div);
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| /hal_renesas-latest/zephyr/rz/portable/rzn/ |
| D | bsp_common.h | 348 __STATIC_INLINE uint32_t R_FSP_SystemClockHzGet (fsp_priv_clock_t clock) in R_FSP_SystemClockHzGet() argument
359 switch (clock) in R_FSP_SystemClockHzGet()
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| /hal_renesas-latest/drivers/ra/fsp/inc/instances/ |
| D | r_sci_uart.h | 170 …sci_clk_src_t clock; ///< The source clock for the baud-rate generator.… member
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| D | r_sci_b_uart.h | 173 …sci_b_clk_src_t clock; ///< The source clock for the baud-rate generato… member
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| /hal_renesas-latest/drivers/rz/fsp/inc/instances/rzg/ |
| D | r_scif_uart.h | 180 scif_clk_src_t clock; ///< The source clock for the baud-rate generator. member
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| /hal_renesas-latest/drivers/rz/fsp/inc/instances/rzn/ |
| D | r_sci_uart.h | 183 …sci_uart_clock_t clock; ///< The source clock for the baud-rate generator. If… member
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| /hal_renesas-latest/drivers/ra/fsp/src/r_sci_b_uart/ |
| D | r_sci_b_uart.c | 1238 ccr3 |= ((uint32_t) p_extend->clock << SCI_B_UART_CCR3_CKE_OFFSET) & SCI_B_UART_CCR3_CKE_MASK; in r_sci_b_uart_config_set()
1247 if ((SCI_B_UART_CLOCK_EXT8X == p_extend->clock) || (SCI_B_UART_CLOCK_EXT16X == p_extend->clock)) in r_sci_b_uart_config_set()
1252 if (SCI_B_UART_CLOCK_EXT8X == p_extend->clock) in r_sci_b_uart_config_set()
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| /hal_renesas-latest/drivers/ra/fsp/src/r_sci_uart/ |
| D | r_sci_uart.c | 414 uint32_t scr = ((uint8_t) p_extend->clock) & 0x3U; in R_SCI_UART_Open()
1367 if ((SCI_UART_CLOCK_EXT8X == p_extend->clock) || (SCI_UART_CLOCK_EXT16X == p_extend->clock)) in r_sci_uart_config_set()
1372 if (SCI_UART_CLOCK_EXT8X == p_extend->clock) in r_sci_uart_config_set()
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| /hal_renesas-latest/drivers/rz/fsp/src/rzg/r_scif_uart/ |
| D | r_scif_uart.c | 287 switch (p_extend->clock) in R_SCIF_UART_Open()
1241 if ((SCIF_UART_CLOCK_EXT8X == p_extend->clock) || (SCIF_UART_CLOCK_EXT16X == p_extend->clock)) in r_scif_uart_config_set()
1246 if (SCIF_UART_CLOCK_EXT8X == p_extend->clock) in r_scif_uart_config_set()
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| /hal_renesas-latest/drivers/rz/fsp/src/rzn/r_sci_uart/ |
| D | r_sci_uart.c | 1326 ccr3 |= (p_extend->clock & SCI_UART_CCR3_CKE_VALUE_MASK) << SCI_UART_CCR3_CKE_OFFSET; in r_sci_uart_config_set()
1372 if ((SCI_UART_CLOCK_EXT8X == p_extend->clock) || (SCI_UART_CLOCK_EXT16X == p_extend->clock)) in r_sci_uart_config_set()
1377 if (SCI_UART_CLOCK_EXT8X == p_extend->clock) in r_sci_uart_config_set()
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