Searched refs:PLLDV (Results 1 – 8 of 8) sorted by relevance
196 Value = Clock_Ip_apxPll[Instance].PllInstance->PLLDV; in Clock_Ip_SetPllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize()200 Clock_Ip_apxPll[Instance].PllInstance->PLLDV = Value; in Clock_Ip_SetPllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize()335 Value = Clock_Ip_apxPll[Instance].PllInstance->PLLDV; in Clock_Ip_SetPllRdivMfiMfnOdiv2Sdmen()339 Clock_Ip_apxPll[Instance].PllInstance->PLLDV = Value; in Clock_Ip_SetPllRdivMfiMfnOdiv2Sdmen()
274 RegValue = Clock_Ip_apxPll[Instance].PllInstance->PLLDV; in Clock_Ip_SetPllPlldvOdiv2Output()277 Clock_Ip_apxPll[Instance].PllInstance->PLLDV = RegValue; in Clock_Ip_SetPllPlldvOdiv2Output()
1796 uint32 PLLDVBuffer = IP_PLL->PLLDV; in Clock_Ip_Get_PLL_CLK_Frequency()1809 if (Clock_Ip_u32PLLAUX_CLKChecksum != (IP_PLL_AUX->PLLDV)) in Clock_Ip_Get_PLLAUX_CLK_Frequency()1811 Clock_Ip_u32PLLAUX_CLKChecksum = (IP_PLL_AUX->PLLDV); in Clock_Ip_Get_PLLAUX_CLK_Frequency()1820 uint32 DividerValue = (IP_PLL->PLLDV & PLL_PLLDV_ODIV2_MASK) >> PLL_PLLDV_ODIV2_SHIFT; in Clock_Ip_Get_PLL_POSTDIV_CLK_Frequency()1835 uint32 DividerValue = (IP_PLL_AUX->PLLDV & PLL_PLLDV_ODIV2_MASK) >> PLL_PLLDV_ODIV2_SHIFT; in Clock_Ip_Get_PLLAUX_POSTDIV_CLK_Frequency()4003 Rdiv = ((Base->PLLDV & PLL_PLLDV_RDIV_MASK) >> PLL_PLLDV_RDIV_SHIFT); /* Rdiv */ in Clock_Ip_PLL_VCO()4004 Mfi = ((Base->PLLDV & PLL_PLLDV_MFI_MASK) >> PLL_PLLDV_MFI_SHIFT); /* Mfi */ in Clock_Ip_PLL_VCO()
1383 …if (Clock_Ip_u32CorePllChecksum != (IP_CORE_PLL->PLLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLL… in Clock_Ip_Get_COREPLL_CLK_Frequency()1385 … Clock_Ip_u32CorePllChecksum = (IP_CORE_PLL->PLLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD); in Clock_Ip_Get_COREPLL_CLK_Frequency()1393 …if (Clock_Ip_u32PeriphPllChecksum != (IP_PERIPH_PLL->PLLCLKMUX ^ IP_PERIPH_PLL->PLLDV ^ IP_PERIPH_… in Clock_Ip_Get_PERIPHPLL_CLK_Frequency()1395 …Clock_Ip_u32PeriphPllChecksum = (IP_PERIPH_PLL->PLLCLKMUX ^ IP_PERIPH_PLL->PLLDV ^ IP_PERIPH_PLL->… in Clock_Ip_Get_PERIPHPLL_CLK_Frequency()1403 … if (Clock_Ip_u32DdrPllChecksum != (IP_DDR_PLL->PLLCLKMUX ^ IP_DDR_PLL->PLLDV ^ IP_DDR_PLL->PLLFD)) in Clock_Ip_Get_DDRPLL_CLK_Frequency()1405 … Clock_Ip_u32DdrPllChecksum = (IP_DDR_PLL->PLLCLKMUX ^ IP_DDR_PLL->PLLDV ^ IP_DDR_PLL->PLLFD); in Clock_Ip_Get_DDRPLL_CLK_Frequency()1422 …if (Clock_Ip_u32CoreDfs1Checksum != (IP_CORE_PLL->PLLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PL… in Clock_Ip_Get_COREPLL_DFS0_Frequency()1424 …Clock_Ip_u32CoreDfs1Checksum = (IP_CORE_PLL->PLLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^… in Clock_Ip_Get_COREPLL_DFS0_Frequency()1432 …if (Clock_Ip_u32CoreDfs2Checksum != (IP_CORE_PLL->PLLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PL… in Clock_Ip_Get_COREPLL_DFS1_Frequency()1434 …Clock_Ip_u32CoreDfs2Checksum = (IP_CORE_PLL->PLLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^… in Clock_Ip_Get_COREPLL_DFS1_Frequency()[all …]
246 … IP_CORE_PLL->PLLDV = (PLLDIG_PLLDV_RDIV(1U) | PLLDIG_PLLDV_MFI(30U)); /* /1 * 30 */ in Clock_Ip_SpecificPlatformInitClock()254 … IP_PERIPH_PLL->PLLDV = (PLLDIG_PLLDV_RDIV(1U) | PLLDIG_PLLDV_MFI(30U)); /* /1 * 30 */ in Clock_Ip_SpecificPlatformInitClock()284 … IP_CORE_PLL->PLLDV = (PLLDIG_PLLDV_RDIV(1U) | PLLDIG_PLLDV_MFI(30U)); /* /1 * 30 */ in Clock_Ip_SpecificPlatformInitClock()304 … IP_PERIPH_PLL->PLLDV = (PLLDIG_PLLDV_RDIV(1U) | PLLDIG_PLLDV_MFI(30U)); /* /1 * 30 */ in Clock_Ip_SpecificPlatformInitClock()
208 Clock_Ip_apxPll[Instance].PllInstance->PLLDV = Value; in Clock_Ip_SetPlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize()318 Clock_Ip_apxPll[Instance].PllInstance->PLLDV = Value; in Clock_Ip_SetPlldigRdivMfiMfnSdmen()
78 __IO uint32_t PLLDV; /**< PLL Divider, offset: 0x8 */ member
