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Searched refs:PDRCFG0 (Results 1 – 25 of 26) sorted by relevance

12

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54018/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54005/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S016/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S005/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54016/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54018M/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S018/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S018M/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54618/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54606/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54607/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54608/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54605/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54628/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54616/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_LP_REG = MAKE_PD_BITS(PDRCFG0, 2U),
36 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
37 kPDRUNCFG_PD_TS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_VD2_ANA = MAKE_PD_BITS(PDRCFG0, 9U),
41 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
42 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
43 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54113/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
36 kPDRUNCFG_PD_FLASH = MAKE_PD_BITS(PDRCFG0, 5U),
37 kPDRUNCFG_PD_TEMPS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
41 kPDRUNCFG_PD_VDDFLASH = MAKE_PD_BITS(PDRCFG0, 11U),
42 kPDRUNCFG_LP_VDDFLASH = MAKE_PD_BITS(PDRCFG0, 12U),
43 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54114/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
36 kPDRUNCFG_PD_FLASH = MAKE_PD_BITS(PDRCFG0, 5U),
37 kPDRUNCFG_PD_TEMPS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
41 kPDRUNCFG_PD_VDDFLASH = MAKE_PD_BITS(PDRCFG0, 11U),
42 kPDRUNCFG_LP_VDDFLASH = MAKE_PD_BITS(PDRCFG0, 12U),
43 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC51U68/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
35 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
36 kPDRUNCFG_PD_FLASH = MAKE_PD_BITS(PDRCFG0, 5U),
37 kPDRUNCFG_PD_TEMPS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
41 kPDRUNCFG_PD_VDDFLASH = MAKE_PD_BITS(PDRCFG0, 11U),
42 kPDRUNCFG_LP_VDDFLASH = MAKE_PD_BITS(PDRCFG0, 12U),
43 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
104 kPDRUNCFG_PMC_MODE0 = MAKE_PD_BITS(PDRCFG0, 1U),
105 kPDRUNCFG_PMC_MODE1 = MAKE_PD_BITS(PDRCFG0, 2U),
106 kPDRUNCFG_LP_VDD_COREREG = MAKE_PD_BITS(PDRCFG0, 4U),
107 kPDRUNCFG_LP_PMCREF = MAKE_PD_BITS(PDRCFG0, 6U),
108 kPDRUNCFG_PD_HVD1V8 = MAKE_PD_BITS(PDRCFG0, 7U),
109 kPDRUNCFG_LP_LVDCORE = MAKE_PD_BITS(PDRCFG0, 9U),
110 kPDRUNCFG_PD_HVDCORE = MAKE_PD_BITS(PDRCFG0, 10U),
111 kPDRUNCFG_PD_RBB = MAKE_PD_BITS(PDRCFG0, 11U),
112 kPDRUNCFG_PD_FBB = MAKE_PD_BITS(PDRCFG0, 12U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_power.h29 #define PDRCFG0 0x0U macro
84 kPDRUNCFG_PMC_MODE0 = MAKE_PD_BITS(PDRCFG0, 1U),
85 kPDRUNCFG_PMC_MODE1 = MAKE_PD_BITS(PDRCFG0, 2U),
86 kPDRUNCFG_LP_VDD_COREREG = MAKE_PD_BITS(PDRCFG0, 4U),
87 kPDRUNCFG_LP_PMCREF = MAKE_PD_BITS(PDRCFG0, 6U),
88 kPDRUNCFG_PD_HVD1V8 = MAKE_PD_BITS(PDRCFG0, 7U),
89 kPDRUNCFG_LP_PORCORE = MAKE_PD_BITS(PDRCFG0, 8U),
90 kPDRUNCFG_LP_LVDCORE = MAKE_PD_BITS(PDRCFG0, 9U),
91 kPDRUNCFG_PD_HVDCORE = MAKE_PD_BITS(PDRCFG0, 10U),
92 kPDRUNCFG_PD_SYSXTAL = MAKE_PD_BITS(PDRCFG0, 13U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_power.h29 #define PDRCFG0 0x0U macro
84 kPDRUNCFG_PMC_MODE0 = MAKE_PD_BITS(PDRCFG0, 1U),
85 kPDRUNCFG_PMC_MODE1 = MAKE_PD_BITS(PDRCFG0, 2U),
86 kPDRUNCFG_LP_VDD_COREREG = MAKE_PD_BITS(PDRCFG0, 4U),
87 kPDRUNCFG_LP_PMCREF = MAKE_PD_BITS(PDRCFG0, 6U),
88 kPDRUNCFG_PD_HVD1V8 = MAKE_PD_BITS(PDRCFG0, 7U),
89 kPDRUNCFG_LP_PORCORE = MAKE_PD_BITS(PDRCFG0, 8U),
90 kPDRUNCFG_LP_LVDCORE = MAKE_PD_BITS(PDRCFG0, 9U),
91 kPDRUNCFG_PD_HVDCORE = MAKE_PD_BITS(PDRCFG0, 10U),
92 kPDRUNCFG_PD_SYSXTAL = MAKE_PD_BITS(PDRCFG0, 13U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
104 kPDRUNCFG_PMC_MODE0 = MAKE_PD_BITS(PDRCFG0, 1U),
105 kPDRUNCFG_PMC_MODE1 = MAKE_PD_BITS(PDRCFG0, 2U),
106 kPDRUNCFG_LP_VDD_COREREG = MAKE_PD_BITS(PDRCFG0, 4U),
107 kPDRUNCFG_LP_PMCREF = MAKE_PD_BITS(PDRCFG0, 6U),
108 kPDRUNCFG_PD_HVD1V8 = MAKE_PD_BITS(PDRCFG0, 7U),
109 kPDRUNCFG_LP_LVDCORE = MAKE_PD_BITS(PDRCFG0, 9U),
110 kPDRUNCFG_PD_HVDCORE = MAKE_PD_BITS(PDRCFG0, 10U),
111 kPDRUNCFG_PD_RBB = MAKE_PD_BITS(PDRCFG0, 11U),
112 kPDRUNCFG_PD_FBB = MAKE_PD_BITS(PDRCFG0, 12U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_power.h30 #define PDRCFG0 0x0U macro
104 kPDRUNCFG_PMC_MODE0 = MAKE_PD_BITS(PDRCFG0, 1U),
105 kPDRUNCFG_PMC_MODE1 = MAKE_PD_BITS(PDRCFG0, 2U),
106 kPDRUNCFG_LP_VDD_COREREG = MAKE_PD_BITS(PDRCFG0, 4U),
107 kPDRUNCFG_LP_PMCREF = MAKE_PD_BITS(PDRCFG0, 6U),
108 kPDRUNCFG_PD_HVD1V8 = MAKE_PD_BITS(PDRCFG0, 7U),
109 kPDRUNCFG_LP_LVDCORE = MAKE_PD_BITS(PDRCFG0, 9U),
110 kPDRUNCFG_PD_HVDCORE = MAKE_PD_BITS(PDRCFG0, 10U),
111 kPDRUNCFG_PD_RBB = MAKE_PD_BITS(PDRCFG0, 11U),
112 kPDRUNCFG_PD_FBB = MAKE_PD_BITS(PDRCFG0, 12U),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/components/power_manager/devices/MIMXRT555S/
Dfsl_pm_device.h36 #define kPDRUNCFG_LP_PORCORE (pd_bit_t)(MAKE_PD_BITS(PDRCFG0, 8U))
/hal_nxp-3.5.0/mcux/mcux-sdk/components/power_manager/devices/MIMXRT595S/
Dfsl_pm_device.h36 #define kPDRUNCFG_LP_PORCORE (pd_bit_t)(MAKE_PD_BITS(PDRCFG0, 8U))

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