Lines Matching refs:PDRCFG0

30 #define PDRCFG0                  0x0U  macro
104     kPDRUNCFG_PMC_MODE0      = MAKE_PD_BITS(PDRCFG0, 1U),
105     kPDRUNCFG_PMC_MODE1      = MAKE_PD_BITS(PDRCFG0, 2U),
106     kPDRUNCFG_LP_VDD_COREREG = MAKE_PD_BITS(PDRCFG0, 4U),
107     kPDRUNCFG_LP_PMCREF      = MAKE_PD_BITS(PDRCFG0, 6U),
108     kPDRUNCFG_PD_HVD1V8      = MAKE_PD_BITS(PDRCFG0, 7U),
109     kPDRUNCFG_LP_LVDCORE     = MAKE_PD_BITS(PDRCFG0, 9U),
110     kPDRUNCFG_PD_HVDCORE     = MAKE_PD_BITS(PDRCFG0, 10U),
111     kPDRUNCFG_PD_RBB         = MAKE_PD_BITS(PDRCFG0, 11U),
112     kPDRUNCFG_PD_FBB         = MAKE_PD_BITS(PDRCFG0, 12U),
113     kPDRUNCFG_PD_SYSXTAL     = MAKE_PD_BITS(PDRCFG0, 13U),
114     kPDRUNCFG_PD_LPOSC       = MAKE_PD_BITS(PDRCFG0, 14U),
115     kPDRUNCFG_PD_RBBSRAM     = MAKE_PD_BITS(PDRCFG0, 15U),
116     kPDRUNCFG_PD_FFRO        = MAKE_PD_BITS(PDRCFG0, 16U),
117     kPDRUNCFG_PD_SYSPLL_LDO  = MAKE_PD_BITS(PDRCFG0, 17U),
118     kPDRUNCFG_PD_SYSPLL_ANA  = MAKE_PD_BITS(PDRCFG0, 18U),
119     kPDRUNCFG_PD_AUDPLL_LDO  = MAKE_PD_BITS(PDRCFG0, 19U),
120     kPDRUNCFG_PD_AUDPLL_ANA  = MAKE_PD_BITS(PDRCFG0, 20U),
121     kPDRUNCFG_PD_ADC         = MAKE_PD_BITS(PDRCFG0, 21U),
122     kPDRUNCFG_LP_ADC         = MAKE_PD_BITS(PDRCFG0, 22U),
123     kPDRUNCFG_PD_ADC_TEMPSNS = MAKE_PD_BITS(PDRCFG0, 23U),
124     kPDRUNCFG_PD_PMC_TEMPSNS = MAKE_PD_BITS(PDRCFG0, 24U),
125     kPDRUNCFG_PD_ACMP        = MAKE_PD_BITS(PDRCFG0, 25U),