1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016, NXP
4 * All rights reserved.
5 *
6 *
7 * SPDX-License-Identifier: BSD-3-Clause
8 */
9 #ifndef _FSL_POWER_H_
10 #define _FSL_POWER_H_
11
12 #include "fsl_common.h"
13
14 /*! @addtogroup power */
15 /*! @{ */
16
17 /*! @file */
18
19 /*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22
23 /*! @name Driver version */
24 /*@{*/
25 /*! @brief power driver version 2.0.0. */
26 #define FSL_POWER_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
27 /*@}*/
28
29 #define MAKE_PD_BITS(reg, slot) (((reg) << 8) | (slot))
30 #define PDRCFG0 0x0U
31 #define PDRCFG1 0x1U
32
33 typedef enum pd_bits
34 {
35 kPDRUNCFG_PD_FRO_EN = MAKE_PD_BITS(PDRCFG0, 4U),
36 kPDRUNCFG_PD_FLASH = MAKE_PD_BITS(PDRCFG0, 5U),
37 kPDRUNCFG_PD_TEMPS = MAKE_PD_BITS(PDRCFG0, 6U),
38 kPDRUNCFG_PD_BOD_RESET = MAKE_PD_BITS(PDRCFG0, 7U),
39 kPDRUNCFG_PD_BOD_INTR = MAKE_PD_BITS(PDRCFG0, 8U),
40 kPDRUNCFG_PD_ADC0 = MAKE_PD_BITS(PDRCFG0, 10U),
41 kPDRUNCFG_PD_VDDFLASH = MAKE_PD_BITS(PDRCFG0, 11U),
42 kPDRUNCFG_LP_VDDFLASH = MAKE_PD_BITS(PDRCFG0, 12U),
43 kPDRUNCFG_PD_RAM0 = MAKE_PD_BITS(PDRCFG0, 13U),
44 kPDRUNCFG_PD_RAM1 = MAKE_PD_BITS(PDRCFG0, 14U),
45 kPDRUNCFG_PD_RAM2 = MAKE_PD_BITS(PDRCFG0, 15U),
46 kPDRUNCFG_PD_RAMX = MAKE_PD_BITS(PDRCFG0, 16U),
47 kPDRUNCFG_PD_ROM = MAKE_PD_BITS(PDRCFG0, 17U),
48 kPDRUNCFG_PD_VDDHV_ENA = MAKE_PD_BITS(PDRCFG0, 18U),
49 kPDRUNCFG_PD_VD7_ENA = MAKE_PD_BITS(PDRCFG0, 19U),
50 kPDRUNCFG_PD_WDT_OSC = MAKE_PD_BITS(PDRCFG0, 20U),
51 kPDRUNCFG_PD_USB0_PHY = MAKE_PD_BITS(PDRCFG0, 21U),
52 kPDRUNCFG_PD_SYS_PLL0 = MAKE_PD_BITS(PDRCFG0, 22U),
53 kPDRUNCFG_PD_VREFP_SW = MAKE_PD_BITS(PDRCFG0, 23U),
54 kPDRUNCFG_PD_FLASH_BG = MAKE_PD_BITS(PDRCFG0, 25U),
55
56 kPDRUNCFG_PD_ALT_FLASH_IBG = MAKE_PD_BITS(PDRCFG1, 28U),
57 kPDRUNCFG_SEL_ALT_FLASH_IBG = MAKE_PD_BITS(PDRCFG1, 29U),
58
59 /*
60 This enum member has no practical meaning,it is used to avoid MISRA issue,
61 user should not trying to use it.
62 */
63 kPDRUNCFG_ForceUnsigned = (int)0x80000000U
64 } pd_bit_t;
65
66 /* Power mode configuration API parameter */
67 typedef enum _power_mode_config
68 {
69 kPmu_Sleep = 0U,
70 kPmu_Deep_Sleep = 1U,
71 kPmu_Deep_PowerDown = 2U,
72 } power_mode_cfg_t;
73
74 /*******************************************************************************
75 * API
76 ******************************************************************************/
77
78 #ifdef __cplusplus
79 extern "C" {
80 #endif
81
82 /*!
83 * @name Power Configuration
84 * @{
85 */
86
87 /*!
88 * @brief API to enable PDRUNCFG bit in the Syscon. Note that enabling the bit powers down the peripheral
89 *
90 * @param en peripheral for which to enable the PDRUNCFG bit
91 * @return none
92 */
POWER_EnablePD(pd_bit_t en)93 static inline void POWER_EnablePD(pd_bit_t en)
94 {
95 /* PDRUNCFGSET */
96 SYSCON->PDRUNCFGSET[((uint32_t)en >> 8UL)] = (1UL << ((uint32_t)en & 0xffU));
97 }
98
99 /*!
100 * @brief API to disable PDRUNCFG bit in the Syscon. Note that disabling the bit powers up the peripheral
101 *
102 * @param en peripheral for which to disable the PDRUNCFG bit
103 * @return none
104 */
POWER_DisablePD(pd_bit_t en)105 static inline void POWER_DisablePD(pd_bit_t en)
106 {
107 /* PDRUNCFGCLR */
108 SYSCON->PDRUNCFGCLR[((uint32_t)en >> 8UL)] = (1UL << ((uint32_t)en & 0xffU));
109 }
110
111 /*!
112 * @brief API to enable deep sleep bit in the ARM Core.
113 *
114 * @return none
115 */
POWER_EnableDeepSleep(void)116 static inline void POWER_EnableDeepSleep(void)
117 {
118 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
119 }
120
121 /*!
122 * @brief API to disable deep sleep bit in the ARM Core.
123 *
124 * @return none
125 */
POWER_DisableDeepSleep(void)126 static inline void POWER_DisableDeepSleep(void)
127 {
128 SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
129 }
130
131 /*!
132 * @brief API to power down flash controller.
133 *
134 * @return none
135 */
POWER_PowerDownFlash(void)136 static inline void POWER_PowerDownFlash(void)
137 {
138 /* note, we retain flash trim to make waking back up faster */
139 SYSCON->PDRUNCFGSET[0] =
140 SYSCON_PDRUNCFG_LP_VDDFLASH_MASK | SYSCON_PDRUNCFG_PD_VDDHV_ENA_MASK | SYSCON_PDRUNCFG_PD_FLASH_BG_MASK;
141
142 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
143 /* TURN OFF clock for Flash Controller (only needed for FLASH programming, will be turned on by ROM API) */
144 CLOCK_DisableClock(kCLOCK_Flash);
145
146 /* TURN OFF clock for Flash Accelerator */
147 CLOCK_DisableClock(kCLOCK_Fmc);
148 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
149 }
150
151 /*!
152 * @brief API to power up flash controller.
153 *
154 * @return none
155 */
POWER_PowerUpFlash(void)156 static inline void POWER_PowerUpFlash(void)
157 {
158 SYSCON->PDRUNCFGCLR[0] = SYSCON_PDRUNCFG_LP_VDDFLASH_MASK | SYSCON_PDRUNCFG_PD_VDDHV_ENA_MASK;
159
160 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
161 /* TURN ON clock for flash Accelerator */
162 CLOCK_EnableClock(kCLOCK_Fmc);
163
164 /* TURN ON clock for flash Controller */
165 CLOCK_EnableClock(kCLOCK_Flash);
166 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
167 }
168
169 /*!
170 * @brief Power Library API to enter different power mode.
171 *
172 * @param mode Power mode.
173 * @param exclude_from_pd Bit mask of the PDRUNCFG bits that needs to be powered on during deep sleep
174 * @return none
175 */
176 void POWER_EnterPowerMode(power_mode_cfg_t mode, uint64_t exclude_from_pd);
177
178 /*!
179 * @brief Power Library API to enter sleep mode.
180 *
181 * @return none
182 */
183 void POWER_EnterSleep(void);
184
185 /*!
186 * @brief Power Library API to enter deep sleep mode.
187 *
188 * @param exclude_from_pd Bit mask of the PDRUNCFG bits that needs to be powered on during deep sleep
189 * @return none
190 */
191 void POWER_EnterDeepSleep(uint64_t exclude_from_pd);
192
193 /*!
194 * @brief Power Library API to enter deep power down mode.
195 *
196 * @param exclude_from_pd Bit mask of the PDRUNCFG bits that needs to be powered on during deep power down mode,
197 * but this is has no effect as the voltages are cut off.
198 * @return none
199 */
200 void POWER_EnterDeepPowerDown(uint64_t exclude_from_pd);
201
202 /*!
203 * @brief Power Library API to choose normal regulation and set the voltage for the desired operating frequency.
204 *
205 * @param freq - The desired frequency at which the part would like to operate,
206 * note that the voltage and flash wait states should be set before changing frequency
207 * @return none
208 */
209 void POWER_SetVoltageForFreq(uint32_t freq);
210
211 /*!
212 * @brief Power Library API to choose low power regulation and set the voltage for the desired operating frequency.
213 *
214 * @param freq - The desired frequency at which the part would like to operate,
215 * note only 12MHz and 48Mhz are supported
216 * @return none
217 */
218 void POWER_SetLowPowerVoltageForFreq(uint32_t freq);
219
220 /*!
221 * @brief Power Library API to return the library version.
222 *
223 * @return version number of the power library
224 */
225 uint32_t POWER_GetLibVersion(void);
226
227 /* @} */
228
229 #ifdef __cplusplus
230 }
231 #endif
232
233 /*! @} */
234
235 #endif /* _FSL_POWER_H_ */
236
