| /hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/ |
| D | Clock_Ip.c | 243 uint8 Index; in Clock_Ip_UpdateDriverContext() local
248 for (Index = 0U; Index < Config->ExtClksCount; Index++) /* Set external signal frequency. */ in Clock_Ip_UpdateDriverContext()
250 …Clock_Ip_SetExternalSignalFrequency((*(Config->ExtClks))[Index].Name, (*(Config->ExtClks))[Index].… in Clock_Ip_UpdateDriverContext()
256 for (Index = 1U; Index < Config->ConfigureFrequenciesCount; Index++) in Clock_Ip_UpdateDriverContext()
258 Clock_Ip_FreqIds[(*(Config->ConfiguredFrequencies))[Index].Name] = Index; in Clock_Ip_UpdateDriverContext()
273 uint32 Index; in Clock_Ip_CheckIrcoscClocks() local
280 for (Index = 0U; Index < (Config->IrcoscsCount - 1U); Index++) in Clock_Ip_CheckIrcoscClocks()
282 …CLOCK_IP_DEV_ASSERT(((uint32)(*(Config->Ircoscs))[Index].Name) < ((uint32)(*(Config->Ircoscs))[Ind… in Clock_Ip_CheckIrcoscClocks()
283 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[(*(Config->Ircoscs))[Index].Name] & CLOCK_IP_IRCOS… in Clock_Ip_CheckIrcoscClocks()
300 uint32 Index; in Clock_Ip_CheckXoscClocks() local
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| D | Clock_Ip_ProgFreqSwitch.c | 134 uint32 Index
157 uint32 Index in Clock_Ip_ProgressiveFrequencyClockSwitchEmpty() argument
161 (void)Index; in Clock_Ip_ProgressiveFrequencyClockSwitchEmpty()
177 uint32 Index; in Clock_Ip_CgmXPcfsSdurDivcDiveDivs() local
231 for (Index = 1U; Index < (uint8)CLOCK_IP_A_MAX_SIZE; Index++) in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
233 if (AMax[Index-1U] < AmaxBrut) in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
235 Rate = PcfsRate[Index]; in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
291 (void)Index; in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
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| D | Power_Ip_MC_RGM.c | 422 uint32 Index; in Power_Ip_MC_RGM_CheckResetReason() local
465 for (Index = 0U; Index < (uint32)32U; Index++) in Power_Ip_MC_RGM_CheckResetReason()
467 DynamicMask = ((uint32)0x01U << Index); in Power_Ip_MC_RGM_CheckResetReason()
580 uint32 Index; in Power_Ip_MC_RGM_GetResetRawValue() local
623 for (Index = 0U; Index < (uint32)32U; Index++) in Power_Ip_MC_RGM_GetResetRawValue()
625 DynamicMask = ((uint32)0x01U << Index); in Power_Ip_MC_RGM_GetResetRawValue()
662 for (Index = 0x00U; Index < (uint32)32U; Index++) in Power_Ip_MC_RGM_GetResetRawValue()
664 DynamicMask = ((uint32)0x01U << Index); in Power_Ip_MC_RGM_GetResetRawValue()
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| D | Clock_Ip_Monitor.c | 153 uint32 Index
160 static void Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config, uint32 Index…
168 …ic void Clock_Ip_SetClockMonitorRegisterValues(Clock_Ip_CmuConfigType const* Config, uint32 Index);
195 uint32 Index in Clock_Ip_ClockMonitorEmpty_Set() argument
199 (void)Index; in Clock_Ip_ClockMonitorEmpty_Set()
212 uint32 Index in Clock_Ip_SetClockMonitorRegisterValues() argument
215 (void)Index; in Clock_Ip_SetClockMonitorRegisterValues()
315 static void Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config, uint32 Index) in Clock_Ip_SetCmuFcFceRefCntLfrefHfref() argument
338 …if (HashCmu[Index] != ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->… in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
340 …HashCmu[Index] = ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->Monit… in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
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| D | Clock_Ip_Frequency.c | 4116 uint32 Index; in Clock_Ip_SetExternalSignalFrequency() local
4117 for (Index = 0U; Index < CLOCK_IP_EXT_SIGNALS_NO; Index++) in Clock_Ip_SetExternalSignalFrequency()
4119 if (SignalName == Clock_Ip_axExtSignalFreqEntries[Index].Name) in Clock_Ip_SetExternalSignalFrequency()
4121 Clock_Ip_axExtSignalFreqEntries[Index].Frequency = Frequency; in Clock_Ip_SetExternalSignalFrequency()
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| /hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/ |
| D | Clock_Ip.c | 238 uint8 Index; in Clock_Ip_UpdateDriverContext() local
243 for (Index = 0U; Index < Config->ExtClksCount; Index++) /* Set external signal frequency. */ in Clock_Ip_UpdateDriverContext()
245 … Clock_Ip_SetExternalSignalFrequency(Config->ExtClks[Index].Name, Config->ExtClks[Index].Value); in Clock_Ip_UpdateDriverContext()
251 for (Index = 1U; Index < Config->ConfigureFrequenciesCount; Index++) in Clock_Ip_UpdateDriverContext()
253 Clock_Ip_FreqIds[Config->ConfiguredFrequencies[Index].Name] = Index; in Clock_Ip_UpdateDriverContext()
268 uint32 Index; in Clock_Ip_CheckIrcoscClocks() local
275 for (Index = 0U; Index < (Config->IrcoscsCount - 1U); Index++) in Clock_Ip_CheckIrcoscClocks()
277 …CLOCK_IP_DEV_ASSERT(((uint32)Config->Ircoscs[Index].Name) < ((uint32)Config->Ircoscs[Index+1U].Nam… in Clock_Ip_CheckIrcoscClocks()
278 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[Config->Ircoscs[Index].Name] & CLOCK_IP_IRCOSC_OBJ… in Clock_Ip_CheckIrcoscClocks()
295 uint32 Index; in Clock_Ip_CheckXoscClocks() local
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| D | Clock_Ip_ProgFreqSwitch.c | 133 …Clock_Ip_ProgressiveFrequencyClockSwitchEmpty(Clock_Ip_PcfsConfigType const* Config, uint32 Index);
152 … Clock_Ip_ProgressiveFrequencyClockSwitchEmpty(Clock_Ip_PcfsConfigType const* Config, uint32 Index) in Clock_Ip_ProgressiveFrequencyClockSwitchEmpty() argument
155 (void)Index; in Clock_Ip_ProgressiveFrequencyClockSwitchEmpty()
169 uint32 Index; in Clock_Ip_CgmXPcfsSdurDivcDiveDivs() local
218 for (Index = 1U; Index < (uint8)CLOCK_IP_A_MAX_SIZE; Index++) in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
220 if (AMax[Index-1U] < AmaxBrut) in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
222 Rate = PcfsRate[Index]; in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
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| D | Clock_Ip_Monitor.c | 150 static void Clock_Ip_ClockMonitorEmpty_Set(Clock_Ip_CmuConfigType const* Config, uint32 Index);
158 static void Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config, uint32 Index…
187 static void Clock_Ip_ClockMonitorEmpty_Set(Clock_Ip_CmuConfigType const* Config, uint32 Index) in Clock_Ip_ClockMonitorEmpty_Set() argument
190 (void)Index; in Clock_Ip_ClockMonitorEmpty_Set()
214 …tic void Clock_Ip_SetClockMonitorRegisterValues(Clock_Ip_CmuConfigType const* Config, uint32 Index) in Clock_Ip_SetClockMonitorRegisterValues() argument
216 (void)Index; in Clock_Ip_SetClockMonitorRegisterValues()
317 static void Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config, uint32 Index) in Clock_Ip_SetCmuFcFceRefCntLfrefHfref() argument
335 …if (HashCmu[Index] != ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->… in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
337 …HashCmu[Index] = ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->Monit… in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
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| D | Clock_Ip_Frequency.c | 4081 uint32 Index; in Clock_Ip_SetExternalSignalFrequency() local
4082 for (Index = 0U; Index < CLOCK_IP_EXT_SIGNALS_NO; Index++) in Clock_Ip_SetExternalSignalFrequency()
4084 if (SignalName == Clock_Ip_axExtSignalFreqEntries[Index].Name) in Clock_Ip_SetExternalSignalFrequency()
4086 Clock_Ip_axExtSignalFreqEntries[Index].Frequency = Frequency; in Clock_Ip_SetExternalSignalFrequency()
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Adc/src/ |
| D | Adc_Sar_Ip.c | 1006 uint8 Index; in Adc_Sar_ConfigChannels() local
1030 for (Index = 0U; Index < NumChannels; Index++) in Adc_Sar_ConfigChannels()
1032 ChnConfig = &(ChannelConfigsPtr[Index]); in Adc_Sar_ConfigChannels()
1067 for (Index = 0U; Index < Adc_Sar_Ip_au8AdcGroupCount[Instance]; Index++) in Adc_Sar_ConfigChannels()
1073 CIMR(AdcAEBasePtr, Index) = CimrMask[Index]; in Adc_Sar_ConfigChannels()
1074 CWENR(AdcAEBasePtr, Index) = CwenrMask[Index]; in Adc_Sar_ConfigChannels()
1075 DMAR(AdcAEBasePtr, Index) = DmarMask[Index]; in Adc_Sar_ConfigChannels()
1077 PSR(AdcAEBasePtr, Index) = PsrMask[Index]; in Adc_Sar_ConfigChannels()
1084 CIMR(AdcBasePtr, Index) = CimrMask[Index]; in Adc_Sar_ConfigChannels()
1085 CWENR(AdcBasePtr, Index) = CwenrMask[Index]; in Adc_Sar_ConfigChannels()
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Fls/src/ |
| D | Qspi_Ip_Controller.c | 1817 for (uint8 Index = 0U; Index < QuadSPI_MDAD_COUNT; ++Index) in Qspi_Ip_Sfp_Configure_Mdad() local
1819 if (TRUE == userConfigPtr->SfpCfg.Tg[Index].Valid) in Qspi_Ip_Sfp_Configure_Mdad()
1821 …Qspi_Ip_Sfp_SetTgSecureAttribute(baseAddr, Index, userConfigPtr->SfpCfg.Tg[Index].SecureAttribute); in Qspi_Ip_Sfp_Configure_Mdad()
1822 Qspi_Ip_Sfp_SetTgMaskType(baseAddr, Index, userConfigPtr->SfpCfg.Tg[Index].MaskType); in Qspi_Ip_Sfp_Configure_Mdad()
1823 Qspi_Ip_Sfp_SetTgMask(baseAddr, Index, userConfigPtr->SfpCfg.Tg[Index].Mask); in Qspi_Ip_Sfp_Configure_Mdad()
1824 … Qspi_Ip_Sfp_SetTgDomainIdMatch(baseAddr, Index, userConfigPtr->SfpCfg.Tg[Index].DomainId); in Qspi_Ip_Sfp_Configure_Mdad()
1825 Qspi_Ip_Sfp_SetTgValid(baseAddr, Index, userConfigPtr->SfpCfg.Tg[Index].Valid); in Qspi_Ip_Sfp_Configure_Mdad()
1839 for (uint8 Index = 0U; Index < QuadSPI_FRAD_COUNT; ++Index) in Qspi_Ip_Sfp_Configure_Frad() local
1841 if (TRUE == userConfigPtr->SfpCfg.Frad[Index].Valid) in Qspi_Ip_Sfp_Configure_Frad()
1843 … Qspi_Ip_Sfp_SetFradStartAddress(baseAddr, Index, userConfigPtr->SfpCfg.Frad[Index].StartAddress); in Qspi_Ip_Sfp_Configure_Frad()
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Eth_GMAC/src/ |
| D | Gmac_Ip_Hw_Access.c | 553 uint32 Index; in GMAC_AddToHashTable() local
558 Index = GMAC_HASH_TABLE_REG_IDX(REV_BITS_32(Crc)); in GMAC_AddToHashTable()
561 (*Hash_table)[Index % FEATURE_GMAC_HASH_TABLE_DIM] |= Hash_bit; in GMAC_AddToHashTable()
575 uint32 Index; in GMAC_RemoveFromHashTable() local
580 Index = GMAC_HASH_TABLE_REG_IDX(REV_BITS_32(Crc)); in GMAC_RemoveFromHashTable()
583 (*Hash_table)[Index % FEATURE_GMAC_HASH_TABLE_DIM] &= ~Hash_bit; in GMAC_RemoveFromHashTable()
595 uint32 Index; in GMAC_AddVlanToHashTable() local
597 Index = (REV_BITS_32(Crc) & GMAC_CRC32_BITS_31_28_MASK) >> in GMAC_AddVlanToHashTable()
602 Index = Index - 1UL; in GMAC_AddVlanToHashTable()
605 Base->MAC_VLAN_HASH_TABLE |= ((uint32)1U << Index); in GMAC_AddVlanToHashTable()
[all …]
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Fls/include/ |
| D | Qspi_Ip_HwAccess.h | 609 uint32 Index in Qspi_Ip_SetAhbBuf0Ind() argument
612 BaseAddr->BUF0IND = Index; in Qspi_Ip_SetAhbBuf0Ind()
620 uint32 Index in Qspi_Ip_SetAhbBuf1Ind() argument
623 BaseAddr->BUF1IND = Index; in Qspi_Ip_SetAhbBuf1Ind()
631 uint32 Index in Qspi_Ip_SetAhbBuf2Ind() argument
634 BaseAddr->BUF2IND = Index; in Qspi_Ip_SetAhbBuf2Ind()
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/ |
| D | Clock_Ip_Private.h | 375 typedef void (*clockMonitorSetCallback)(Clock_Ip_CmuConfigType const * Config, uint32 Index);
389 typedef void (*pcfsSetCallback)(Clock_Ip_PcfsConfigType const * Config, uint32 Index);
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| /hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/ |
| D | Clock_Ip_Private.h | 375 typedef void (*clockMonitorSetCallback)(Clock_Ip_CmuConfigType const * Config, uint32 Index);
393 typedef void (*pcfsSetCallback)(Clock_Ip_PcfsConfigType const * Config, uint32 Index);
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| /hal_nxp-3.5.0/s32/drivers/s32ze/Uart/src/ |
| D | Linflexd_Uart_Ip.c | 368 uint32 Index; in Linflexd_Uart_Ip_Init() local
389 for (Index = 0; Index < sizeof(Linflexd_Uart_Ip_StateStructureType); Index++) in Linflexd_Uart_Ip_Init()
391 ClearStructPtr[Index] = 0U; in Linflexd_Uart_Ip_Init()
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| /hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/docs/issdk/ISSDK API Reference Manual/ |
| D | index.hhp | 8 Index file=index.hhk
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