1 /*
2  * Copyright 2021-2022 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef CLOCK_IP_PRIVATE_H
8 #define CLOCK_IP_PRIVATE_H
9 
10 /**
11 *   @file    Clock_Ip_Private.h
12 *   @version    0.9.0
13 *
14 *   @brief   CLOCK IP driver private header file.
15 *   @details CLOCK IP driver private header file.
16 
17 *   @addtogroup CLOCK_DRIVER Clock Ip Driver
18 *   @{
19 */
20 
21 #if defined(__cplusplus)
22 extern "C"{
23 #endif
24 /*==================================================================================================
25 *                                          INCLUDE FILES
26 * 1) system and project includes
27 * 2) needed interfaces from external units
28 * 3) internal and external interfaces from this unit
29 ==================================================================================================*/
30 
31 #include "Clock_Ip.h"
32 
33 #if defined(CLOCK_IP_PLATFORM_SPECIFIC1)
34     #include "Clock_Ip_Specific1.h"         /* For S32R45 */
35 #elif defined(CLOCK_IP_PLATFORM_SPECIFIC2)
36     #include "Clock_Ip_Specific2.h"         /* For S32G3XX */
37 #else
38     #include "Clock_Ip_Specific.h"          /* For S32G2XX and other platforms */
39 #endif
40 
41 #ifdef CLOCK_IP_DEV_ERROR_DETECT
42 #if (STD_ON == CLOCK_IP_DEV_ERROR_DETECT)
43     #include "Devassert.h"
44 #endif /* (STD_ON == CLOCK_IP_DEV_ERROR_DETECT) */
45 #endif /* #ifdef CLOCK_IP_DEV_ERROR_DETECT */
46 
47 /*==================================================================================================
48                                SOURCE FILE VERSION INFORMATION
49 ==================================================================================================*/
50 
51 #define CLOCK_IP_PRIVATE_VENDOR_ID                    43
52 #define CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION     4
53 #define CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION     7
54 #define CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION  0
55 #define CLOCK_IP_PRIVATE_SW_MAJOR_VERSION             0
56 #define CLOCK_IP_PRIVATE_SW_MINOR_VERSION             9
57 #define CLOCK_IP_PRIVATE_SW_PATCH_VERSION             0
58 
59 
60 /*==================================================================================================
61                                       FILE VERSION CHECKS
62 ==================================================================================================*/
63 /* Check if Clock_Ip_Private.h file and Clock_Ip.h file are of the same Autosar version */
64 #if ((CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION    != CLOCK_IP_AR_RELEASE_MAJOR_VERSION) || \
65      (CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION    != CLOCK_IP_AR_RELEASE_MINOR_VERSION) || \
66      (CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION != CLOCK_IP_AR_RELEASE_REVISION_VERSION))
67     #error "AutoSar Version Numbers of Clock_Ip_Private.h and Clock_Ip.h are different"
68 #endif
69 
70 /* Check if Clock_Ip_Private.h file and Clock_Ip.h file have same versions */
71 #if (CLOCK_IP_PRIVATE_VENDOR_ID  != CLOCK_IP_VENDOR_ID)
72     #error "Clock_Ip_Private.h and Clock_Ip.h have different vendor IDs"
73 #endif
74 
75 /* Check if Clock_Ip_Private.h file and Clock_Ip.h file are of the same Software version */
76 #if ((CLOCK_IP_PRIVATE_SW_MAJOR_VERSION != CLOCK_IP_SW_MAJOR_VERSION) || \
77      (CLOCK_IP_PRIVATE_SW_MINOR_VERSION != CLOCK_IP_SW_MINOR_VERSION) || \
78      (CLOCK_IP_PRIVATE_SW_PATCH_VERSION != CLOCK_IP_SW_PATCH_VERSION))
79     #error "Software Version Numbers of Clock_Ip_Private.h and Clock_Ip.h are different"
80 #endif
81 
82 #if defined(CLOCK_IP_PLATFORM_SPECIFIC1)
83 /* Check if Clock_Ip_Private.h file and Clock_Ip_Specific1.h file are of the same Autosar version */
84 #if ((CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION    != CLOCK_IP_SPECIFIC1_AR_RELEASE_MAJOR_VERSION) || \
85      (CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION    != CLOCK_IP_SPECIFIC1_AR_RELEASE_MINOR_VERSION) || \
86      (CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION != CLOCK_IP_SPECIFIC1_AR_RELEASE_REVISION_VERSION))
87     #error "AutoSar Version Numbers of Clock_Ip_Private.h and Clock_Ip_Specific1.h are different"
88 #endif
89 
90 /* Check if Clock_Ip_Private.h file and Clock_Ip_Specific1.h file have same versions */
91 #if (CLOCK_IP_PRIVATE_VENDOR_ID  != CLOCK_IP_SPECIFIC1_VENDOR_ID)
92     #error "Clock_Ip_Private.h and Clock_Ip_Specific1.h have different vendor IDs"
93 #endif
94 
95 /* Check if Clock_Ip_Private.h file and Clock_Ip_Specific1.h file are of the same Software version */
96 #if ((CLOCK_IP_PRIVATE_SW_MAJOR_VERSION != CLOCK_IP_SPECIFIC1_SW_MAJOR_VERSION) || \
97      (CLOCK_IP_PRIVATE_SW_MINOR_VERSION != CLOCK_IP_SPECIFIC1_SW_MINOR_VERSION) || \
98      (CLOCK_IP_PRIVATE_SW_PATCH_VERSION != CLOCK_IP_SPECIFIC1_SW_PATCH_VERSION))
99     #error "Software Version Numbers of Clock_Ip_Private.h and Clock_Ip_Specific1.h are different"
100 #endif
101 
102 #elif defined(CLOCK_IP_PLATFORM_SPECIFIC2)
103 /* Check if Clock_Ip_Private.h file and Clock_Ip_Specific2.h file are of the same Autosar version */
104 #if ((CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION    != CLOCK_IP_SPECIFIC2_AR_RELEASE_MAJOR_VERSION) || \
105      (CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION    != CLOCK_IP_SPECIFIC2_AR_RELEASE_MINOR_VERSION) || \
106      (CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION != CLOCK_IP_SPECIFIC2_AR_RELEASE_REVISION_VERSION))
107     #error "AutoSar Version Numbers of Clock_Ip_Private.h and Clock_Ip_Specific2.h are different"
108 #endif
109 
110 /* Check if Clock_Ip_Private.h file and Clock_Ip_Specific2.h file have same versions */
111 #if (CLOCK_IP_PRIVATE_VENDOR_ID  != CLOCK_IP_SPECIFIC2_VENDOR_ID)
112     #error "Clock_Ip_Private.h and Clock_Ip_Specific2.h have different vendor IDs"
113 #endif
114 
115 /* Check if Clock_Ip_Private.h file and Clock_Ip_Specific2.h file are of the same Software version */
116 #if ((CLOCK_IP_PRIVATE_SW_MAJOR_VERSION != CLOCK_IP_SPECIFIC2_SW_MAJOR_VERSION) || \
117      (CLOCK_IP_PRIVATE_SW_MINOR_VERSION != CLOCK_IP_SPECIFIC2_SW_MINOR_VERSION) || \
118      (CLOCK_IP_PRIVATE_SW_PATCH_VERSION != CLOCK_IP_SPECIFIC2_SW_PATCH_VERSION))
119     #error "Software Version Numbers of Clock_Ip_Private.h and Clock_Ip_Specific2.h are different"
120 #endif
121 
122 #else
123 /* Check if Clock_Ip_Private.h file and Clock_Ip_Specific.h file are of the same Autosar version */
124 #if ((CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION    != CLOCK_IP_SPECIFIC_AR_RELEASE_MAJOR_VERSION) || \
125      (CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION    != CLOCK_IP_SPECIFIC_AR_RELEASE_MINOR_VERSION) || \
126      (CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION != CLOCK_IP_SPECIFIC_AR_RELEASE_REVISION_VERSION))
127     #error "AutoSar Version Numbers of Clock_Ip_Private.h and Clock_Ip_Specific.h are different"
128 #endif
129 
130 /* Check if Clock_Ip_Private.h file and Clock_Ip_Specific.h file have same versions */
131 #if (CLOCK_IP_PRIVATE_VENDOR_ID  != CLOCK_IP_SPECIFIC_VENDOR_ID)
132     #error "Clock_Ip_Private.h and Clock_Ip_Specific.h have different vendor IDs"
133 #endif
134 
135 /* Check if Clock_Ip_Private.h file and Clock_Ip_Specific.h file are of the same Software version */
136 #if ((CLOCK_IP_PRIVATE_SW_MAJOR_VERSION != CLOCK_IP_SPECIFIC_SW_MAJOR_VERSION) || \
137      (CLOCK_IP_PRIVATE_SW_MINOR_VERSION != CLOCK_IP_SPECIFIC_SW_MINOR_VERSION) || \
138      (CLOCK_IP_PRIVATE_SW_PATCH_VERSION != CLOCK_IP_SPECIFIC_SW_PATCH_VERSION))
139     #error "Software Version Numbers of Clock_Ip_Private.h and Clock_Ip_Specific.h are different"
140 #endif
141 
142 #endif /* #if defined(CLOCK_IP_PLATFORM_SPECIFIC2) */
143 
144 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
145 #ifdef CLOCK_IP_DEV_ERROR_DETECT
146 #if (STD_ON == CLOCK_IP_DEV_ERROR_DETECT)
147 /* Check if Clock_Ip_Private.h file and Devassert.h file are of the same Autosar version */
148 #if ((CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION    != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
149      (CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION    != DEVASSERT_AR_RELEASE_MINOR_VERSION))
150     #error "AutoSar Version Numbers of Clock_Ip_Private.h and Devassert.h are different"
151 #endif
152 #endif /* (STD_ON == CLOCK_IP_DEV_ERROR_DETECT) */
153 #endif /* #ifdef CLOCK_IP_DEV_ERROR_DETECT */
154 #endif /* #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK */
155 
156 /*==================================================================================================
157 *                                            CONSTANTS
158 ==================================================================================================*/
159 
160 /*==================================================================================================
161 *                                       DEFINES AND MACROS
162 ==================================================================================================*/
163 /* Total number of clocks */
164 #define CLOCK_IP_NAMES_NO                    CLOCK_IP_FEATURE_NAMES_NO
165 /* Total number of producer clocks */
166 #define CLOCK_IP_PRODUCERS_NO                CLOCK_IP_FEATURE_PRODUCERS_NO
167 
168 /* Define clock features */
169 #define CLOCK_IP_MODULE_INSTANCE       0U              /* Instance of the module where clock element is implemented. */
170 #define CLOCK_IP_CALLBACK              1U              /* Actions to be done for different implementations of a clock element. */
171 #define CLOCK_IP_EXTENSION_INDEX             2U              /* Specific clock feature extension */
172 #define CLOCK_IP_POWER_MODE_INDEX            3U              /* Index of power mode for multiplexed clock option */
173 #define CLOCK_IP_SELECTOR_INDEX              4U              /* Selector index. */
174 #define CLOCK_IP_DIVIDER_INDEX               5U              /* Divider index. */
175 #define CLOCK_IP_GATE_INDEX                  6U              /* Gate index */
176 #define CLOCK_IP_PCFS_INDEX                  7U              /* Pcfs index */
177 #define CLOCK_IP_CMU_INDEX                   8U              /* Cmu index */
178 
179 
180 
181 
182 /* Maximum number of clock features for each clock name */
183 #define CLOCK_IP_FEATURES_NO           9U
184 
185 /* Size of the hardware plls array */
186 #if CLOCK_IP_NUMBER_OF_HARDWARE_PLL > 0U
187     #define CLOCK_IP_HARDWARE_PLL_ARRAY_SIZE  CLOCK_IP_NUMBER_OF_HARDWARE_PLL
188 #else
189     #define CLOCK_IP_HARDWARE_PLL_ARRAY_SIZE  1U
190 #endif
191 
192 /* Size of the hardware plls array */
193 #if CLOCK_IP_NUMBER_OF_HARDWARE_DFS > 0U
194     #define CLOCK_IP_HARDWARE_DFS_ARRAY_SIZE  CLOCK_IP_NUMBER_OF_HARDWARE_DFS
195 #else
196     #define CLOCK_IP_HARDWARE_DFS_ARRAY_SIZE  1U
197 #endif
198 
199 #if (defined(CLOCK_IP_REGISTER_VALUES_COUNT))
200 #if (CLOCK_IP_REGISTER_VALUES_COUNT > 0)
201 #define CLOCK_IP_REGISTER_VALUES_OPTIMIZATION (STD_ON)
202 #else
203 #define CLOCK_IP_REGISTER_VALUES_OPTIMIZATION (STD_OFF)
204 #endif
205 #else
206 #define CLOCK_IP_REGISTER_VALUES_OPTIMIZATION (STD_OFF)
207 #endif
208 
209 #if (defined(CLOCK_IP_DEV_ERROR_DETECT))
210     #if (CLOCK_IP_DEV_ERROR_DETECT == STD_ON)
211 #define CLOCK_IP_IRCOSC_OBJECT                 (1UL << 0U)
212 #define CLOCK_IP_XOSC_OBJECT                   (1UL << 1U)
213 #define CLOCK_IP_PLL_OBJECT                    (1UL << 2U)
214 #define CLOCK_IP_SELECTOR_OBJECT               (1UL << 3U)
215 #define CLOCK_IP_DIVIDER_OBJECT                (1UL << 4U)
216 #define CLOCK_IP_DIVIDER_TRIGGER_OBJECT        (1UL << 5U)
217 #define CLOCK_IP_FRAC_DIV_OBJECT               (1UL << 6U)
218 #define CLOCK_IP_EXT_SIG_OBJECT                (1UL << 7U)
219 #define CLOCK_IP_GATE_OBJECT                   (1UL << 8U)
220 #define CLOCK_IP_PCFS_OBJECT                   (1UL << 9U)
221 #define CLOCK_IP_CMU_OBJECT                    (1UL << 10U)
222     #endif
223 #endif /* CLOCK_IP_DEV_ERROR_DETECT */
224 
225 #if (defined(CLOCK_IP_DEV_ERROR_DETECT))
226   #if (CLOCK_IP_DEV_ERROR_DETECT == STD_ON)
227     #define CLOCK_IP_DEV_ASSERT(x)      DevAssert(x)
228   #else
229     #define CLOCK_IP_DEV_ASSERT(x)
230   #endif
231 #else
232     #define CLOCK_IP_DEV_ASSERT(x)
233 #endif
234 /*==================================================================================================
235 *                                              ENUMS
236 ==================================================================================================*/
237 /*! @brief Clock ip source type.
238  */
239 typedef enum
240 {
241     /* Generic error codes */
242     UKNOWN_TYPE                                    = 0x00U,    /*!< Clock path from source to this clock name has at least one selector. */
243     IRCOSC_TYPE                                    = 0x01U,    /*!< Source is an internal oscillator. */
244     XOSC_TYPE                                      = 0x02U,    /*!< Source is an external oscillator. */
245     PLL_TYPE                                       = 0x03U,    /*!< Source is a pll. */
246     EXT_CLK_TYPE                                   = 0x04U,    /*!< Source is an external clock. */
247     SERDES_TYPE                                    = 0x04U,    /*!< Source is a SERDES. */
248 
249 } Clock_Ip_ClockNameSourceType;
250 
251 /*! @brief Clock pll status return codes.
252  */
253 typedef enum
254 {
255     STATUS_PLL_NOT_ENABLED                         = 0x00U,    /*!< Not enabled */
256     STATUS_PLL_UNLOCKED                            = 0x01U,    /*!< Unlocked */
257     STATUS_PLL_LOCKED                              = 0x02U,    /*!< Locked */
258 
259 } Clock_Ip_PllStatusReturnType;
260 
261 /*! @brief Clock dfs status return codes.
262  */
263 typedef enum
264 {
265     STATUS_DFS_NOT_ENABLED                         = 0x00U,    /*!< Not enabled */
266     STATUS_DFS_UNLOCKED                            = 0x01U,    /*!< Unlocked */
267     STATUS_DFS_LOCKED                              = 0x02U,    /*!< Locked */
268 
269 } Clock_Ip_DfsStatusType;
270 
271 /*! @brief Clock ip specific commands
272  */
273 typedef enum
274 {
275     CLOCK_IP_RESERVED_COMMAND                              = 0x00U,    /*!< Reserved command */
276     CLOCK_IP_INITIALIZE_PLATFORM_COMMAND                   = 0x01U,    /*!< Specific platform objects */
277     CLOCK_IP_INITIALIZE_CLOCK_OBJECTS_COMMAND              = 0x02U,    /*!< Initialize clock objects */
278     CLOCK_IP_SET_USER_ACCESS_ALLOWED_COMMAND               = 0x03U,    /*!< User access allowed */
279     CLOCK_IP_DISABLE_SAFE_CLOCK_COMMAND                    = 0x04U,    /*!< Disable safe clock */
280 
281 } Clock_Ip_CommandType;
282 
283 /*==================================================================================================
284 *                                  STRUCTURES AND OTHER TYPEDEFS
285 ==================================================================================================*/
286 
287 typedef void (*intOscSetCallback)(Clock_Ip_IrcoscConfigType const * Config);
288 typedef void (*intOscDisableCallback)(Clock_Ip_NameType IrcoscName);
289 typedef void (*intOscEnableCallback)(Clock_Ip_IrcoscConfigType const * Config);
290 typedef struct
291 {
292     intOscSetCallback Set;
293     intOscEnableCallback Enable;
294     intOscDisableCallback Disable;
295 
296 }Clock_Ip_IntOscCallbackType;
297 
298 typedef void (*extOscSetCallback)(Clock_Ip_XoscConfigType const * Config);
299 typedef void (*extOscResetCallback)(Clock_Ip_XoscConfigType const * Config);
300 typedef void (*extOscDisableCallback)(Clock_Ip_NameType ExtoscName);
301 typedef void (*extOscEnableCallback)(Clock_Ip_XoscConfigType const * Config);
302 
303 typedef struct
304 {
305     extOscResetCallback Reset;
306     extOscSetCallback Set;
307     extOscSetCallback Complete;
308     extOscDisableCallback Disable;
309     extOscEnableCallback Enable;
310 
311 }Clock_Ip_ExtOscCallbackType;
312 
313 
314 typedef void (*dividerSetCallback)(Clock_Ip_DividerConfigType const * Config);
315 typedef struct
316 {
317     dividerSetCallback Set;
318 
319 }Clock_Ip_DividerCallbackType;
320 
321 typedef void (*dividerConfigureCallback)(Clock_Ip_DividerTriggerConfigType const * Config);
322 typedef void (*dividerTriggerUpdateCallback)(Clock_Ip_DividerTriggerConfigType const * Config);
323 typedef struct
324 {
325     dividerConfigureCallback Configure;
326     dividerTriggerUpdateCallback TriggerUpdate;
327 
328 }Clock_Ip_DividerTriggerCallbackType;
329 
330 
331 typedef void (*fracDivSetCallback)(Clock_Ip_FracDivConfigType const * Config);
332 typedef void (*fracDivResetCallback)(Clock_Ip_FracDivConfigType const * Config);
333 typedef Clock_Ip_DfsStatusType (*fracDivCompleteCallback)(Clock_Ip_NameType DfsName);
334 typedef struct
335 {
336     fracDivResetCallback Reset;
337     fracDivSetCallback Set;
338     fracDivCompleteCallback Complete;
339 
340 }Clock_Ip_FracDivCallbackType;
341 
342 typedef void (*pllSetCallback)(Clock_Ip_PllConfigType const * Config);
343 typedef void (*pllResetCallback)(Clock_Ip_PllConfigType const * Config);
344 typedef Clock_Ip_PllStatusReturnType (*pllCompleteCallback)(Clock_Ip_NameType PllName);
345 typedef void (*pllEnableCallback)(Clock_Ip_PllConfigType const * Config);
346 typedef void (*pllDisableCallback)(Clock_Ip_NameType PllName);
347 typedef struct
348 {
349     pllResetCallback Reset;
350     pllSetCallback Set;
351     pllCompleteCallback Complete;
352     pllEnableCallback Enable;
353     pllDisableCallback Disable;
354 
355 }Clock_Ip_PllCallbackType;
356 
357 typedef void (*selectorSetCallback)(Clock_Ip_SelectorConfigType const * Config);
358 typedef void (*selectorResetCallback)(Clock_Ip_SelectorConfigType const * Config);
359 typedef struct
360 {
361     selectorResetCallback Reset;
362     selectorSetCallback Set;
363 
364 }Clock_Ip_SelectorCallbackType;
365 
366 typedef void (*gateSetCallback)(Clock_Ip_GateConfigType const * Config);
367 typedef void (*gateUpdateCallback)(Clock_Ip_NameType ClockName, boolean Gate);
368 typedef struct
369 {
370     gateSetCallback Set;
371     gateUpdateCallback Update;
372 
373 }Clock_Ip_GateCallbackType;
374 
375 typedef void (*clockMonitorSetCallback)(Clock_Ip_CmuConfigType const * Config, uint32 Index);
376 typedef void (*clockMonitorResetCallback)(Clock_Ip_CmuConfigType const * Config);
377 typedef void (*clockMonitorClearStatusCallback)(Clock_Ip_NameType Name);
378 typedef void (*clockMonitorDisableCallback)(Clock_Ip_NameType Name);
379 typedef Clock_Ip_CmuStatusType (*clockMonitorGetMonitorStatusCallback)(Clock_Ip_NameType Name);
380 typedef void (*clockMonitorEnableCallback)(Clock_Ip_CmuConfigType const * Config);
381 typedef struct
382 {
383     clockMonitorResetCallback Reset;
384     clockMonitorSetCallback Set;
385     clockMonitorDisableCallback Disable;
386     clockMonitorClearStatusCallback Clear;
387     clockMonitorGetMonitorStatusCallback GetStatus;
388     clockMonitorEnableCallback Enable;
389 
390 }Clock_Ip_ClockMonitorCallbackType;
391 
392 
393 typedef void (*pcfsSetCallback)(Clock_Ip_PcfsConfigType const * Config, uint32 Index);
394 typedef struct
395 {
396     pcfsSetCallback Set;
397 
398 }Clock_Ip_PcfsCallbackType;
399 
400 
401 /*==================================================================================================
402 *                                  GLOBAL VARIABLE DECLARATIONS
403 ==================================================================================================*/
404 
405 /* Clock start constant section data */
406 #define MCU_START_SEC_CONST_8
407 #include "Mcu_MemMap.h"
408 
409 extern const uint8 Clock_Ip_au8XoscCallbackIndex[CLOCK_IP_ALL_CALLBACKS_COUNT];
410 extern const uint8 Clock_Ip_au8DividerCallbackIndex[CLOCK_IP_ALL_CALLBACKS_COUNT];
411 extern const uint8 Clock_Ip_au8DividerTriggerCallbackIndex[CLOCK_IP_ALL_CALLBACKS_COUNT];
412 extern const uint8 Clock_Ip_au8FractionalDividerCallbackIndex[CLOCK_IP_ALL_CALLBACKS_COUNT];
413 extern const uint8 Clock_Ip_au8PllCallbackIndex[CLOCK_IP_ALL_CALLBACKS_COUNT];
414 extern const uint8 Clock_Ip_au8SelectorCallbackIndex[CLOCK_IP_ALL_CALLBACKS_COUNT];
415 extern const uint8 Clock_Ip_au8IrcoscCallbackIndex[CLOCK_IP_ALL_CALLBACKS_COUNT];
416 extern const uint8 Clock_Ip_au8CmuCallbackIndex[CLOCK_IP_ALL_CALLBACKS_COUNT];
417 extern const uint8 Clock_Ip_au8GateCallbackIndex[CLOCK_IP_ALL_CALLBACKS_COUNT];
418 extern const uint8 Clock_Ip_au8PcfsCallbackIndex[CLOCK_IP_ALL_CALLBACKS_COUNT];
419 extern const uint8 Clock_Ip_au8ClockFeatures[CLOCK_IP_NAMES_NO][CLOCK_IP_FEATURES_NO];
420 
421 /* Clock stop constant section data */
422 #define MCU_STOP_SEC_CONST_8
423 #include "Mcu_MemMap.h"
424 
425 
426 
427 /* Clock start constant section data */
428 #define MCU_START_SEC_CONST_32
429 #include "Mcu_MemMap.h"
430 
431 #if (defined(CLOCK_IP_DEV_ERROR_DETECT))
432     #if (CLOCK_IP_DEV_ERROR_DETECT == STD_ON)
433 extern const uint32 Clock_Ip_au8ClockNameTypes[CLOCK_IP_NAMES_NO];
434     #endif
435 #endif
436 
437 /* Clock stop constant section data */
438 #define MCU_STOP_SEC_CONST_32
439 #include "Mcu_MemMap.h"
440 
441 
442 
443 
444 /* Clock start constant section data */
445 #define MCU_START_SEC_CONST_UNSPECIFIED
446 
447 #include "Mcu_MemMap.h"
448 
449 extern const Clock_Ip_ExtOscCallbackType Clock_Ip_axExtOscCallbacks[CLOCK_IP_XOSC_CALLBACKS_COUNT];
450 
451 extern const Clock_Ip_DividerCallbackType Clock_Ip_axDividerCallbacks[CLOCK_IP_DIVIDER_CALLBACKS_COUNT];
452 
453 extern const Clock_Ip_DividerTriggerCallbackType Clock_Ip_axDividerTriggerCallbacks[CLOCK_IP_DIVIDERTRIGGER_CALLBACKS_COUNT];
454 
455 extern const Clock_Ip_FracDivCallbackType Clock_Ip_axFracDivCallbacks[CLOCK_IP_FRACTIONAL_DIVIDER_CALLBACKS_COUNT];
456 
457 extern const Clock_Ip_PllCallbackType Clock_Ip_axPllCallbacks[CLOCK_IP_PLL_CALLBACKS_COUNT];
458 
459 extern const Clock_Ip_NameType Clock_Ip_aeHwPllName[CLOCK_IP_HARDWARE_PLL_ARRAY_SIZE];
460 extern const Clock_Ip_NameType Clock_Ip_aeHwDfsName[CLOCK_IP_HARDWARE_DFS_ARRAY_SIZE];
461 
462 extern const Clock_Ip_SelectorCallbackType Clock_Ip_axSelectorCallbacks[CLOCK_IP_SELECTOR_CALLBACKS_COUNT];
463 
464 extern const Clock_Ip_IntOscCallbackType Clock_Ip_axIntOscCallbacks[CLOCK_IP_IRCOSC_CALLBACKS_COUNT];
465 
466 extern const Clock_Ip_ClockMonitorCallbackType Clock_Ip_axCmuCallbacks[CLOCK_IP_CMU_CALLBACKS_COUNT];
467 
468 extern const Clock_Ip_GateCallbackType Clock_Ip_axGateCallbacks[CLOCK_IP_GATE_CALLBACKS_COUNT];
469 
470 extern const Clock_Ip_PcfsCallbackType Clock_Ip_axPcfsCallbacks[CLOCK_IP_PCFS_CALLBACKS_COUNT];
471 
472 extern const Clock_Ip_ClockNameSourceType Clock_Ip_aeSourceTypeClockName[CLOCK_IP_PRODUCERS_NO];
473 
474 /* Clock stop constant section data */
475 #define MCU_STOP_SEC_CONST_UNSPECIFIED
476 
477 #include "Mcu_MemMap.h"
478 
479 #define MCU_START_SEC_VAR_CLEARED_UNSPECIFIED
480 
481 #include "Mcu_MemMap.h"
482 
483 #if (CLOCK_IP_CMU_INFO_SIZE > 0U) || defined(CLOCK_IP_CGU_INTERRUPT)
484 extern const Clock_Ip_ClockConfigType *Clock_Ip_pxConfig;
485 #endif
486 
487 #define MCU_STOP_SEC_VAR_CLEARED_UNSPECIFIED
488 
489 #include "Mcu_MemMap.h"
490 
491 
492 /* Clock start initialized section data */
493 #define MCU_START_SEC_VAR_CLEARED_8
494 #include "Mcu_MemMap.h"
495 
496 extern uint8 Clock_Ip_FreqIds[CLOCK_IP_FEATURE_NAMES_NO];
497 
498 /* Clock stop initialized section data */
499 #define MCU_STOP_SEC_VAR_CLEARED_8
500 #include "Mcu_MemMap.h"
501 
502 
503 /*==================================================================================================
504 *                                       FUNCTION PROTOTYPES
505 ==================================================================================================*/
506 /* Clock start section code */
507 #define MCU_START_SEC_CODE
508 
509 #include "Mcu_MemMap.h"
510 
511 #ifdef CLOCK_IP_POWER_MODE_CHANGE_NOTIFICATION
512 #if (CLOCK_IP_POWER_MODE_CHANGE_NOTIFICATION == STD_ON)
513 void Clock_Ip_ClockPowerModeChangeNotification(Clock_Ip_PowerModesType PowerMode, Clock_Ip_PowerNotificationType Notification);
514 #endif
515 #endif
516 void Clock_Ip_ReportClockErrors(Clock_Ip_NotificationType Error, Clock_Ip_NameType ClockName);
517 void Clock_Ip_SetExternalSignalFrequency(Clock_Ip_NameType SignalName, uint32 Frequency);
518 #if (defined(CLOCK_IP_GET_FREQUENCY_API) && (CLOCK_IP_GET_FREQUENCY_API == STD_ON))
519 uint32 Clock_Ip_GetFreq(Clock_Ip_NameType ClockName);
520 void Clock_Ip_SetExternalOscillatorFrequency(Clock_Ip_NameType ExtOscName, uint32 Frequency);
521 #endif
522 #if CLOCK_IP_CMU_INFO_SIZE > 0U
523 uint32 Clock_Ip_CMU_GetInterruptStatus(uint8 IndexCmu);
524 void Clock_Ip_CMU_ClockFailInt(void);
525 #endif
526 #if defined(CLOCK_IP_CGU_INTERRUPT)
527 void Clock_Ip_CGU_ClockDetectInt(void);
528 #endif
529 #ifdef CLOCK_IP_HAS_RAM_WAIT_STATES
530     void Clock_Ip_SetRamWaitStates(void);
531 #endif
532 #ifdef CLOCK_IP_HAS_FLASH_WAIT_STATES
533     void Clock_Ip_SetFlashWaitStates(void);
534 #endif
535 #if (defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
536 void Clock_Ip_WriteRegisterValues(const Clock_Ip_RegisterIndexType *Indexes);
537 #endif
538 void Clock_Ip_Command(Clock_Ip_ClockConfigType const * Config, Clock_Ip_CommandType Command);
539 /*!
540  * @brief Initializes a starting reference point for timeout
541  *
542  * @param[out] StartTimeOut    The starting time from which elapsed time is measured
543  * @param[out] ElapsedTimeOut  The elapsed time to be passed to Clock_Ip_TimeoutExpired
544  * @param[out] TimeoutTicksOut The timeout value (in ticks) to be passed to Clock_Ip_TimeoutExpired
545  * @param[in]  TimeoutUs       The timeout value (in microseconds)
546  */
547 void Clock_Ip_StartTimeout(uint32 *StartTimeOut,
548                        uint32 *ElapsedTimeOut,
549                        uint32 *TimeoutTicksOut,
550                        uint32 TimeoutUs);
551 /*!
552  * @brief Checks for timeout condition.
553  *
554  * @param[in,out] StartTimeInOut    The starting time from which elapsed time is measured
555  * @param[in,out] ElapsedTimeInOut  The accumulated elapsed time from the starting time reference
556  * @param[in]     TimeoutTicks      The timeout limit (in ticks)
557  */
558 boolean Clock_Ip_TimeoutExpired(uint32 *StartTimeInOut,
559                             uint32 *ElapsedTimeInOut,
560                             uint32 TimeoutTicks);
561 
562 /* Clock stop section code */
563 #define MCU_STOP_SEC_CODE
564 
565 #include "Mcu_MemMap.h"
566 
567 #if defined(__cplusplus)
568 }
569 #endif /* __cplusplus*/
570 
571 /*! @}*/
572 
573 #endif /* CLOCK_IP_PRIVATE_H */
574 
575