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Searched refs:C7 (Results 1 – 25 of 38) sorted by relevance

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/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
Dsystem_MKW30Z4.c162 MCG->C7 = SYSTEM_MCG_C7_VALUE; /* Set C7 (OSC Clock Select) */ in SystemInit()
172 MCG->C7 = SYSTEM_MCG_C7_VALUE; /* Set C7 (OSC Clock Select) */ in SystemInit()
222 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
227 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((MCG->C7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
285 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
Dsystem_MKW20Z4.c162 MCG->C7 = SYSTEM_MCG_C7_VALUE; /* Set C7 (OSC Clock Select) */ in SystemInit()
172 MCG->C7 = SYSTEM_MCG_C7_VALUE; /* Set C7 (OSC Clock Select) */ in SystemInit()
222 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
227 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((MCG->C7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
285 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
Dsystem_MKW40Z4.c162 MCG->C7 = SYSTEM_MCG_C7_VALUE; /* Set C7 (OSC Clock Select) */ in SystemInit()
172 MCG->C7 = SYSTEM_MCG_C7_VALUE; /* Set C7 (OSC Clock Select) */ in SystemInit()
222 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
227 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((MCG->C7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
285 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
Dsystem_MKW41Z4.c106 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
111 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((MCG->C7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
169 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
Dfsl_clock.c104 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
107 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)
581 MCG->C7 = (MCG->C7 & ~MCG_C7_OSCSEL_MASK) | MCG_C7_OSCSEL(oscsel); in CLOCK_SetExternalRefClkConfig()
991 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFeeMode()
1139 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFbeMode()
1292 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
Dsystem_MKW21Z4.c105 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
110 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((MCG->C7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
168 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
Dsystem_MKW31Z4.c106 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
111 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((MCG->C7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
169 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
Dsystem_MK22F51212.c134 switch (MCG->C7 & MCG_C7_OSCSEL_MASK) { in SystemCoreClockUpdate()
146 tmpC7 = MCG->C7; in SystemCoreClockUpdate()
213 switch (MCG->C7 & MCG_C7_OSCSEL_MASK) { in SystemCoreClockUpdate()
Dfsl_clock.c58 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)
842 MCG->C7 = (uint8_t)(MCG->C7 & ~MCG_C7_OSCSEL_MASK) | MCG_C7_OSCSEL(oscsel); in CLOCK_SetExternalRefClkConfig()
1636 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFeeMode()
1822 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFbeMode()
2174 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MK64F12/
Dsystem_MK64F12.c138 switch (MCG->C7 & MCG_C7_OSCSEL_MASK) { in SystemCoreClockUpdate()
150 tmpC7 = MCG->C7; in SystemCoreClockUpdate()
217 switch (MCG->C7 & MCG_C7_OSCSEL_MASK) { in SystemCoreClockUpdate()
Dfsl_clock.c58 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)
809 MCG->C7 = (uint8_t)(MCG->C7 & ~MCG_C7_OSCSEL_MASK) | MCG_C7_OSCSEL(oscsel); in CLOCK_SetExternalRefClkConfig()
1603 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFeeMode()
1789 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFbeMode()
2141 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
Dsystem_MK80F25615.c113 switch (MCG->C7 & MCG_C7_OSCSEL_MASK) { in SystemCoreClockUpdate()
125 tmpC7 = MCG->C7; in SystemCoreClockUpdate()
193 switch (MCG->C7 & MCG_C7_OSCSEL_MASK) { in SystemCoreClockUpdate()
Dfsl_clock.c58 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)
849 MCG->C7 = (uint8_t)(MCG->C7 & ~MCG_C7_OSCSEL_MASK) | MCG_C7_OSCSEL(oscsel); in CLOCK_SetExternalRefClkConfig()
1645 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFeeMode()
1831 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFbeMode()
2183 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
Dsystem_MK82F25615.c107 switch (MCG->C7 & MCG_C7_OSCSEL_MASK) { in SystemCoreClockUpdate()
119 tmpC7 = MCG->C7; in SystemCoreClockUpdate()
187 switch (MCG->C7 & MCG_C7_OSCSEL_MASK) { in SystemCoreClockUpdate()
Dfsl_clock.c58 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)
849 MCG->C7 = (uint8_t)(MCG->C7 & ~MCG_C7_OSCSEL_MASK) | MCG_C7_OSCSEL(oscsel); in CLOCK_SetExternalRefClkConfig()
1645 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFeeMode()
1831 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFbeMode()
2183 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MK66F18/
Dsystem_MK66F18.c119 switch (MCG->C7 & MCG_C7_OSCSEL_MASK) { in SystemCoreClockUpdate()
131 tmpC7 = MCG->C7; in SystemCoreClockUpdate()
217 switch (MCG->C7 & MCG_C7_OSCSEL_MASK) { in SystemCoreClockUpdate()
Dfsl_clock.c58 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)
1067 MCG->C7 = (uint8_t)(MCG->C7 & ~MCG_C7_OSCSEL_MASK) | MCG_C7_OSCSEL(oscsel); in CLOCK_SetExternalRefClkConfig()
1913 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFeeMode()
2099 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFbeMode()
2461 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
Dsystem_MKW22D5.c152 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
157 … if (((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x00U) && ((MCG->C7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
222 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
Dfsl_clock.c76 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
79 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)
652 MCG->C7 = (MCG->C7 & ~MCG_C7_OSCSEL_MASK) | MCG_C7_OSCSEL(oscsel); in CLOCK_SetExternalRefClkConfig()
1242 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFeeMode()
1395 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFbeMode()
1611 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
Dsystem_MKW24D5.c152 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
157 … if (((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x00U) && ((MCG->C7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
222 if((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x00U) { in SystemCoreClockUpdate()
Dfsl_clock.c76 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
79 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)
652 MCG->C7 = (MCG->C7 & ~MCG_C7_OSCSEL_MASK) | MCG_C7_OSCSEL(oscsel); in CLOCK_SetExternalRefClkConfig()
1242 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFeeMode()
1395 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_SetFbeMode()
1611 if (MCG_C7_OSCSEL(kMCG_OscselOsc) == (MCG->C7 & MCG_C7_OSCSEL_MASK)) in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
Dfsl_clock.c76 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
79 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)
DMKL25Z4.h2007 __I uint8_t C7; /**< MCG Control 7 Register, offset: 0xC */ member
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
Dfsl_clock.c58 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
Dfsl_clock.c58 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)

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