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/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
Dfsl_clock.c85 #define MCG_C6_VDIV0_VAL ((MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
767 MCG->C6 = (MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv); in CLOCK_EnablePll0()
785 MCG->C6 &= ~MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
797 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
810 MCG->C6 &= ~MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
825 MCG->C6 |= MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
1281 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_SetFbeMode()
1398 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
1409 MCG->C6 |= MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
1458 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_ExternalModeToFbeModeQuick()
Dsystem_MKL25Z4.c139 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x00U) { in SystemCoreClockUpdate()
196 Divider = (((uint16_t)MCG->C6 & MCG_C6_VDIV0_MASK) + 24U); in SystemCoreClockUpdate()
DMKL25Z4.h2000 __IO uint8_t C6; /**< MCG Control 6 Register, offset: 0x5 */ member
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
Dfsl_clock.c85 #define MCG_C6_VDIV0_VAL ((MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
820 MCG->C6 = (MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv); in CLOCK_EnablePll0()
838 MCG->C6 &= ~MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
850 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
880 MCG->C6 &= ~MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
897 MCG->C6 |= MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
1365 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_SetFbeMode()
1483 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
1494 MCG->C6 |= MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
1543 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_ExternalModeToFbeModeQuick()
Dsystem_MKW22D5.c148 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x00U) { in SystemCoreClockUpdate()
209 Divider = (((uint16_t)MCG->C6 & MCG_C6_VDIV0_MASK) + 24U); in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
Dfsl_clock.c85 #define MCG_C6_VDIV0_VAL ((MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
820 MCG->C6 = (MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv); in CLOCK_EnablePll0()
838 MCG->C6 &= ~MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
850 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
880 MCG->C6 &= ~MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
897 MCG->C6 |= MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
1365 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_SetFbeMode()
1483 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
1494 MCG->C6 |= MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
1543 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_ExternalModeToFbeModeQuick()
Dsystem_MKW24D5.c148 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x00U) { in SystemCoreClockUpdate()
209 Divider = (((uint16_t)MCG->C6 & MCG_C6_VDIV0_MASK) + 24U); in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
Dfsl_clock.c67 #define MCG_C6_VDIV0_VAL ((uint8_t)(MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
952 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
977 MCG->C6 &= ~(uint8_t)MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
989 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1009 MCG->C6 &= (uint8_t)(~MCG_C6_LOLIE0_MASK); in CLOCK_SetPll0MonitorMode()
1024 MCG->C6 |= MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
1649 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_SetFbeMode()
1804 MCG->C6 &= (uint8_t)(~MCG_C6_PLLS_MASK); in CLOCK_SetPbeMode()
1815 MCG->C6 |= MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
1892 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_ExternalModeToFbeModeQuick()
Dsystem_MKV58F24.c116 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0U) { in SystemCoreClockUpdate()
174 Divider = ((MCG->C6 & MCG_C6_VDIV_MASK) + 16U); in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
Dfsl_clock.c67 #define MCG_C6_VDIV0_VAL ((uint8_t)(MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
952 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
977 MCG->C6 &= ~(uint8_t)MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
989 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1009 MCG->C6 &= (uint8_t)(~MCG_C6_LOLIE0_MASK); in CLOCK_SetPll0MonitorMode()
1024 MCG->C6 |= MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
1649 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_SetFbeMode()
1804 MCG->C6 &= (uint8_t)(~MCG_C6_PLLS_MASK); in CLOCK_SetPbeMode()
1815 MCG->C6 |= MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
1892 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_ExternalModeToFbeModeQuick()
Dsystem_MKV56F24.c116 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0U) { in SystemCoreClockUpdate()
174 Divider = ((MCG->C6 & MCG_C6_VDIV_MASK) + 16U); in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
Dfsl_clock.c67 #define MCG_C6_VDIV0_VAL ((uint8_t)(MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
1057 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
1082 MCG->C6 &= ~(uint8_t)MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1094 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1138 MCG->C6 &= (uint8_t)(~MCG_C6_LOLIE0_MASK); in CLOCK_SetPll0MonitorMode()
1155 MCG->C6 |= MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
1792 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_SetFbeMode()
1948 MCG->C6 &= (uint8_t)(~MCG_C6_PLLS_MASK); in CLOCK_SetPbeMode()
1959 MCG->C6 |= MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
2036 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_ExternalModeToFbeModeQuick()
Dsystem_MK22F51212.c130 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x00U) { in SystemCoreClockUpdate()
200 Divider = (((uint16_t)MCG->C6 & MCG_C6_VDIV0_MASK) + 24U); in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MK64F12/
Dfsl_clock.c67 #define MCG_C6_VDIV0_VAL ((uint8_t)(MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
1024 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
1049 MCG->C6 &= ~(uint8_t)MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1061 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1105 MCG->C6 &= (uint8_t)(~MCG_C6_LOLIE0_MASK); in CLOCK_SetPll0MonitorMode()
1122 MCG->C6 |= MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
1759 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_SetFbeMode()
1915 MCG->C6 &= (uint8_t)(~MCG_C6_PLLS_MASK); in CLOCK_SetPbeMode()
1926 MCG->C6 |= MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
2003 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_ExternalModeToFbeModeQuick()
Dsystem_MK64F12.c134 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x00U) { in SystemCoreClockUpdate()
204 Divider = (((uint16_t)MCG->C6 & MCG_C6_VDIV0_MASK) + 24U); in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
Dfsl_clock.c67 #define MCG_C6_VDIV0_VAL ((uint8_t)(MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
1066 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
1091 MCG->C6 &= ~(uint8_t)MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1103 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1147 MCG->C6 &= (uint8_t)(~MCG_C6_LOLIE0_MASK); in CLOCK_SetPll0MonitorMode()
1164 MCG->C6 |= MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
1801 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_SetFbeMode()
1957 MCG->C6 &= (uint8_t)(~MCG_C6_PLLS_MASK); in CLOCK_SetPbeMode()
1968 MCG->C6 |= MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
2045 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_ExternalModeToFbeModeQuick()
Dsystem_MK80F25615.c109 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x00U) { in SystemCoreClockUpdate()
179 Divider = (((uint16_t)MCG->C6 & MCG_C6_VDIV_MASK) + 16U); in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
Dfsl_clock.c67 #define MCG_C6_VDIV0_VAL ((uint8_t)(MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
1066 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
1091 MCG->C6 &= ~(uint8_t)MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1103 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1147 MCG->C6 &= (uint8_t)(~MCG_C6_LOLIE0_MASK); in CLOCK_SetPll0MonitorMode()
1164 MCG->C6 |= MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
1801 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_SetFbeMode()
1957 MCG->C6 &= (uint8_t)(~MCG_C6_PLLS_MASK); in CLOCK_SetPbeMode()
1968 MCG->C6 |= MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
2045 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_ExternalModeToFbeModeQuick()
Dsystem_MK82F25615.c103 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x00U) { in SystemCoreClockUpdate()
173 Divider = (((uint16_t)MCG->C6 & MCG_C6_VDIV_MASK) + 16U); in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MK66F18/
Dfsl_clock.c67 #define MCG_C6_VDIV0_VAL ((uint8_t)(MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
1284 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
1325 MCG->C6 &= ~(uint8_t)MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1337 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
1381 MCG->C6 &= (uint8_t)(~MCG_C6_LOLIE0_MASK); in CLOCK_SetPll0MonitorMode()
1398 MCG->C6 |= MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
2069 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_SetFbeMode()
2229 MCG->C6 &= (uint8_t)(~MCG_C6_PLLS_MASK); in CLOCK_SetPbeMode()
2241 MCG->C6 |= MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
2323 MCG->C6 &= ~(uint8_t)MCG_C6_PLLS_MASK; in CLOCK_ExternalModeToFbeModeQuick()
Dsystem_MK66F18.c115 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x00U) { in SystemCoreClockUpdate()
186 Divider = (((uint16_t)MCG->C6 & MCG_C6_VDIV_MASK) + 16U); in SystemCoreClockUpdate()
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
Dfsl_clock.c113 #define MCG_C6_VDIV0_VAL ((MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
652 MCG->C6 &= ~MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
664 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
Dsystem_MKW30Z4.c187 MCG->C6 = (SYSTEM_MCG_C6_VALUE); /* Set C6 (Clock monitor enable) */ in SystemInit()
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
Dsystem_MKW20Z4.c187 MCG->C6 = (SYSTEM_MCG_C6_VALUE); /* Set C6 (Clock monitor enable) */ in SystemInit()
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
Dsystem_MKW40Z4.c187 MCG->C6 = (SYSTEM_MCG_C6_VALUE); /* Set C6 (Clock monitor enable) */ in SystemInit()

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