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Searched refs:CONFIG (Results 1 – 24 of 24) sorted by relevance

/hal_microchip-latest/mec5/drivers/
Dmec_bbled.c85 return (uint8_t)((regs->CONFIG & MEC_BBLED_CONFIG_PWM_SZ_Msk) >> MEC_BBLED_CONFIG_PWM_SZ_Pos); in bbled_get_pwm_size()
90 regs->CONFIG = (regs->CONFIG & (uint32_t)~MEC_BBLED_CONFIG_PWM_SZ_Msk) | in bbled_set_pwm_size()
97 regs->CONFIG |= MEC_BIT(MEC_BBLED_CONFIG_CLKSRC_Pos); in bbled_set_clk_src()
99 regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_BBLED_CONFIG_CLKSRC_Pos); in bbled_set_clk_src()
107 regs->CONFIG = ((regs->CONFIG & (uint32_t)~MEC_BBLED_CONFIG_WDTRLD_Msk) | in bbled_set_wdt_reload()
113 regs->CONFIG = ((regs->CONFIG & (uint32_t)~MEC_BBLED_CONFIG_CTRL_Msk) | in bbled_set_mode()
119 return (uint8_t)((regs->CONFIG & MEC_BBLED_CONFIG_CTRL_Msk) >> MEC_BBLED_CONFIG_CTRL_Pos); in bbled_get_mode()
136 regs->CONFIG |= MEC_BIT(MEC_BBLED_CONFIG_SYNC_Pos); in mec_hal_bbled_synchronize_enable()
138 regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_BBLED_CONFIG_SYNC_Pos); in mec_hal_bbled_synchronize_enable()
144 if (regs->CONFIG & MEC_BBLED_CONFIG_CTRL_Msk) { in mec_hal_bbled_is_off()
[all …]
Dmec_pwm.c75 regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos); in pwm_disable()
80 regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos); in pwm_enable()
185 cfg = regs->CONFIG & (uint32_t)~(MEC_PWM_CONFIG_CLKDIV_Msk | MEC_PWM_CONFIG_CLK_SRC_SLOW_Msk); in prog_pwm_fd()
192 regs->CONFIG = cfg; in prog_pwm_fd()
290 regs->CONFIG = 0; in mec_hal_pwm_init()
298 regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_INVERT_Pos); in mec_hal_pwm_init()
333 regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_INVERT_Pos); in mec_hal_pwm_set_polarity()
335 regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_PWM_CONFIG_INVERT_Pos); in mec_hal_pwm_set_polarity()
344 regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos); in mec_hal_pwm_enable()
346 regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos); in mec_hal_pwm_enable()
[all …]
Dmec_vci.c47 return (regs->CONFIG & 0x3037fu); in mec_hal_vci_in_pin_states()
56 return (uint8_t)((regs->CONFIG >> MEC_VCI_CONFIG_VCI_OUT_Pos) & MEC_BIT(0)); in mec_hal_vci_out_get()
65 return (uint8_t)((regs->CONFIG >> MEC_VCI_CONFIG_VCI_OVRD_IN_Pos) & MEC_BIT(0)); in mec_hal_vci_ovrd_in_get()
76 regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_VCI_CONFIG_VCI_FILT_Pos); in mec_hal_vci_in_filter_enable()
78 regs->CONFIG |= MEC_BIT(MEC_VCI_CONFIG_VCI_FILT_Pos); in mec_hal_vci_in_filter_enable()
94 regs->CONFIG |= MEC_BIT(MEC_VCI_CONFIG_FW_VCI_OUT_Pos); in mec_hal_vci_sw_vci_out_set()
96 regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_VCI_CONFIG_FW_VCI_OUT_Pos); in mec_hal_vci_sw_vci_out_set()
110 regs->CONFIG |= MEC_BIT(MEC_VCI_CONFIG_VCI_OUT_SRC_Pos); in mec_hal_vci_sw_vci_out_enable()
112 regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_VCI_CONFIG_VCI_OUT_SRC_Pos); in mec_hal_vci_sw_vci_out_enable()
124 return (regs->CONFIG & MEC5_VCI_IN_0_6_MASK); in mec_hal_vci_in_latched_get()
Dmec_bdp.c56 regs->CONFIG = MEC_BIT(MEC_BDP_CFG_REG_SRESET_POS); in mec_hal_bdp_init()
60 regs->CONFIG = (regs->CONFIG & (uint32_t)~(MEC_BDP_CFG_REG_FIFO_THRH_MSK)) in mec_hal_bdp_init()
142 regs->CONFIG = (regs->CONFIG & (uint32_t)~(MEC_BDP_CFG_REG_FIFO_THRH_MSK)) in mec_hal_bdp_fifo_thresh_set()
159 (regs->CONFIG & MEC_BDP_CFG_REG_FIFO_THRH_MSK) >> MEC_BDP_CFG_REG_FIFO_THRH_POS; in mec_hal_bdp_fifo_thresh_get()
Dmec_i2c.c172 base->CONFIG = (((uint32_t)config->port << MEC_I2C_SMB_CONFIG_PORT_SEL_Pos) in i2c_config()
174 base->CONFIG |= MEC_BIT(MEC_I2C_SMB_CONFIG_FEN_Pos); /* enable digital filter */ in i2c_config()
200 base->CONFIG |= MEC_BIT(MEC_I2C_SMB_CONFIG_ENAB_Pos); in i2c_config()
529 base->CONFIG |= MEC_BIT(MEC_I2C_SMB_CONFIG_ENI_IDLE_Pos); in mec_hal_i2c_smb_idle_intr_enable()
531 base->CONFIG &= (uint32_t)~MEC_BIT(MEC_I2C_SMB_CONFIG_ENI_IDLE_Pos); in mec_hal_i2c_smb_idle_intr_enable()
572 regs->CONFIG |= cfg; in mec_hal_i2c_smb_intr_ctrl()
574 regs->CONFIG &= (uint32_t)~cfg; in mec_hal_i2c_smb_intr_ctrl()
639 if (regs->CONFIG & MEC_BIT(MEC_I2C_SMB_CONFIG_ENI_IDLE_Pos)) { in mec_hal_i2c_smb_is_idle_ien()
654 uint32_t cfg = base->CONFIG & MEC_BIT(MEC_I2C_SMB_CONFIG_ENI_IDLE_Pos); in mec_hal_i2c_smb_is_idle_intr()
677 uint32_t cfg = base->CONFIG & MEC_BIT(MEC_I2C_SMB_CONFIG_ENI_AAT_Pos); in mec_hal_i2c_smb_is_aat_ien()
[all …]
Dmec_adc.c79 regs->CONFIG = (regs->CONFIG & (uint32_t)~(MEC_ADC_CONFIG_CLTM_Msk in mec_hal_adc_init()
Dmec_i2c_api.h241 regs->CONFIG |= (MEC_BIT(MEC_I2C_SMB_CONFIG_FLUSH_TM_TXB_Pos) in mec_hal_i2c_nl_flush_buffers()
/hal_microchip-latest/mec5/devices/common/
Dmec5_pwm_v1.h20 …__IOM uint32_t CONFIG; /*!< (@ 0x00000008) PWM configuration … member
Dmec5_bbled_v1.h18 …__IOM uint32_t CONFIG; /*!< (@ 0x00000000) LED config … member
Dmec5_bdp_v1.h21 …__IOM uint32_t CONFIG; /*!< (@ 0x00000104) BDP EC-only: configuration … member
Dmec5_vci_v1_5.h18 …__IOM uint32_t CONFIG; /*!< (@ 0x00000000) VCI config … member
Dmec5_vci_v1.h18 …__IOM uint32_t CONFIG; /*!< (@ 0x00000000) VCI config … member
Dmec5_adc_v2.h25 …__IOM uint32_t CONFIG; /*!< (@ 0x0000007C) ADC configuration … member
Dmec5_i2c_smb_v3_7.h37 …__IOM uint32_t CONFIG; /*!< (@ 0x00000028) I2C-SMB Configuration … member
Dmec5_i2c_smb_v3_8.h37 …__IOM uint32_t CONFIG; /*!< (@ 0x00000028) I2C-SMB Configuration … member
/hal_microchip-latest/mec/mec1501/component/
Dpwm.h137 __IOM uint32_t CONFIG; /*!< (@ 0x0008) PWM Configuration b[7:0] */ member
Dport80cap.h142 __IOM uint32_t CONFIG; /*!< (@ 0x0104) Configuration Mix of R/W and WO */ member
Dadc.h202 __IOM uint32_t CONFIG; /*!< (@ 0x007C) ADC Configuration */ member
Dvbat.h277 __IOM uint32_t CONFIG; /*! (@ 0x0000) VCI Config register */ member
Dspi_periph.h314 __IOM uint32_t CONFIG; /*!< (@ 0x0000) SPIP Control */ member
/hal_microchip-latest/pic32c/pic32cxsg/include/fixups/component/
Dwdt_component_fixup_pic32cxsg.h108 __IO WDT_CONFIG_Type CONFIG; /**< \brief Offset: 0x1 (R/W 8) Configuration */ member
Deic_component_fixup_pic32cxsg.h198 …__IO EIC_CONFIG_Type CONFIG[2]; /**< \brief Offset: 0x1C (R/W 32) External Interrupt S… member
/hal_microchip-latest/mpfs/mpfs_hal/common/
Dmss_l2_cache.h474 CACHE_CONFIG_typedef CONFIG; member
/hal_microchip-latest/mec/
DMCHP_MEC1701.h8575 …__IO uint8_t CONFIG; /*!< (@ 0x400F27F0) UART Config Select Register … member
25409 …__IO uint32_t CONFIG; /*!< (@ 0x40005808) PWMx CONFIGURATION REGISTER … member
26012 …__IO uint32_t CONFIG; /*!< (@ 0x4000B800) LED Configuration … member