Lines Matching refs:CONFIG
75 regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos); in pwm_disable()
80 regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos); in pwm_enable()
185 cfg = regs->CONFIG & (uint32_t)~(MEC_PWM_CONFIG_CLKDIV_Msk | MEC_PWM_CONFIG_CLK_SRC_SLOW_Msk); in prog_pwm_fd()
192 regs->CONFIG = cfg; in prog_pwm_fd()
290 regs->CONFIG = 0; in mec_hal_pwm_init()
298 regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_INVERT_Pos); in mec_hal_pwm_init()
333 regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_INVERT_Pos); in mec_hal_pwm_set_polarity()
335 regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_PWM_CONFIG_INVERT_Pos); in mec_hal_pwm_set_polarity()
344 regs->CONFIG |= MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos); in mec_hal_pwm_enable()
346 regs->CONFIG &= (uint32_t)~MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos); in mec_hal_pwm_enable()
354 if (regs->CONFIG & MEC_BIT(MEC_PWM_CONFIG_ENABLE_Pos)) { in mec_hal_pwm_is_enabled()
365 if (regs->CONFIG & MEC_BIT(MEC_PWM_CONFIG_CLK_SRC_SLOW_Pos)) { in mec_hal_pwm_get_freq_in()
386 if (regs->CONFIG & MEC_BIT(MEC_PWM_CONFIG_CLK_SRC_SLOW_Pos)) { in mec_hal_pwm_get_freq_out()
394 ps = ((regs->CONFIG & MEC_PWM_CONFIG_CLKDIV_Msk) >> MEC_PWM_CONFIG_CLKDIV_Pos) + 1u; in mec_hal_pwm_get_freq_out()