Home
last modified time | relevance | path

Searched refs:SCB_CPUID_REVISION_Pos (Results 1 – 16 of 16) sorted by relevance

/cmsis_6-latest/CMSIS/Documentation/Doxygen/Core/src/
Dref_peripheral.txt186 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: RE…
187 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: RE…
/cmsis_6-latest/CMSIS/Core/Include/
Dcore_cm0.h368 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_cm1.h368 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_sc000.h381 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_cm0plus.h386 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_cm3.h420 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_sc300.h420 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_cm23.h412 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_cm4.h493 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_cm7.h536 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_cm33.h584 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_cm35p.h584 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_starmc1.h603 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_cm52.h621 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_cm55.h595 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
Dcore_cm85.h616 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro