Home
last modified time | relevance | path

Searched refs:SCB_CPUID_ARCHITECTURE_Pos (Results 1 – 16 of 16) sorted by relevance

/cmsis_6-latest/CMSIS/Core/Include/
Dcore_cm0.h362 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
363 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_cm1.h362 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
363 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_sc000.h375 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
376 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_cm0plus.h380 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
381 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_cm3.h414 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
415 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_sc300.h414 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
415 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_cm23.h406 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
407 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_cm4.h487 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
488 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_cm7.h530 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
531 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_cm33.h578 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
579 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_cm35p.h578 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
579 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_starmc1.h597 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
598 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_cm52.h615 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
616 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_cm55.h589 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
590 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
Dcore_cm85.h610 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB … macro
611 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
/cmsis_6-latest/CMSIS/Documentation/Doxygen/Core/src/
Dref_peripheral.txt180 #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: AR…
181 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: AR…