| /Zephyr-latest/samples/drivers/clock_control_xec/src/ |
| D | main.c | 23 struct pcr_regs *pcr = ((struct pcr_regs *)DT_REG_ADDR_BY_IDX(DT_NODELABEL(pcr), 0)); in pcr_clock_regs() local
24 uint32_t r = pcr->PWR_RST_STS; in pcr_clock_regs()
30 r = pcr->OSC_ID; in pcr_clock_regs()
33 r = pcr->PROC_CLK_CTRL; in pcr_clock_regs()
36 r = pcr->SLOW_CLK_CTRL; in pcr_clock_regs()
42 struct vbatr_regs *vbr = ((struct vbatr_regs *)DT_REG_ADDR_BY_IDX(DT_NODELABEL(pcr), 1)); in vbat_clock_regs()
70 struct vbatr_regs *vbr = ((struct vbatr_regs *)DT_REG_ADDR_BY_IDX(DT_NODELABEL(pcr), 1)); in vbat_power_fail()
115 struct pcr_regs *pcr = ((struct pcr_regs *)DT_REG_ADDR_BY_IDX(DT_NODELABEL(pcr), 0)); in pcr_clock_regs() local
116 uint32_t pcr_clk_src = pcr->CLK32K_SRC_VTR; in pcr_clock_regs()
117 uint32_t r = pcr->PWR_RST_STS; in pcr_clock_regs()
[all …]
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| /Zephyr-latest/soc/microchip/mec/mec172x/ |
| D | power.c | 22 ((struct pcr_regs *)(DT_REG_ADDR(DT_NODELABEL(pcr))))
52 struct pcr_regs *pcr = PCR_XEC_REG_BASE; in z_power_soc_deep_sleep() local
73 pcr->SYS_SLP_CTRL = MCHP_PCR_SYS_SLP_HEAVY; in z_power_soc_deep_sleep()
74 pcr->OSC_ID = pcr->SYS_SLP_CTRL; in z_power_soc_deep_sleep()
88 pcr->SYS_SLP_CTRL = 0U; in z_power_soc_deep_sleep()
96 while ((pcr->OSC_ID & MCHP_PCR_OSC_ID_PLL_LOCK) == 0) { in z_power_soc_deep_sleep()
125 struct pcr_regs *pcr = PCR_XEC_REG_BASE; in z_power_soc_sleep() local
130 pcr->SYS_SLP_CTRL = MCHP_PCR_SYS_SLP_LIGHT; in z_power_soc_sleep()
131 pcr->OSC_ID = pcr->SYS_SLP_CTRL; in z_power_soc_sleep()
137 pcr->SYS_SLP_CTRL = 0U; in z_power_soc_sleep()
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| D | device_power.c | 24 ((struct pcr_regs *)(DT_REG_ADDR(DT_NODELABEL(pcr))))
32 ((struct vbatr_regs *)(DT_REG_ADDR_BY_NAME(DT_NODELABEL(pcr), vbatr)))
48 struct pcr_regs *pcr = PCR_XEC_REG_BASE; in soc_debug_sleep_clk_req() local
53 sys_write32(pcr->CLK_REQ[i], vbm_addr); in soc_debug_sleep_clk_req()
57 sys_write32(pcr->SYS_SLP_CTRL, vbm_addr); in soc_debug_sleep_clk_req()
284 struct pcr_regs *pcr = PCR_XEC_REG_BASE; in deep_sleep_save_blocks() local
290 ds_ctx.slwclk_info = pcr->SLOW_CLK_CTRL; in deep_sleep_save_blocks()
291 pcr->SLOW_CLK_CTRL &= (~MCHP_PCR_SLOW_CLK_CTRL_100KHZ & in deep_sleep_save_blocks()
338 struct pcr_regs *pcr = PCR_XEC_REG_BASE; in deep_sleep_restore_blocks() local
341 pcr->SLOW_CLK_CTRL = ds_ctx.slwclk_info; in deep_sleep_restore_blocks()
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| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_mchp_xec.c | 206 static void pcr_slp_init(struct pcr_hw_regs *pcr) in pcr_slp_init() argument
208 pcr->SYS_SLP_CTRL = 0U; in pcr_slp_init()
212 pcr->SLP_EN[i] = 0U; in pcr_slp_init()
215 pcr->SLP_EN[3] = XEC_CC_PCR3_CRYPTO_MASK; in pcr_slp_init()
233 static int pll_wait_lock_periph(struct pcr_hw_regs *const pcr, uint16_t ms) in pll_wait_lock_periph() argument
244 while (!(pcr->OSC_ID & MCHP_PCR_OSC_ID_PLL_LOCK)) { in pll_wait_lock_periph()
281 struct pcr_hw_regs *const pcr = (struct pcr_hw_regs *)devcfg->pcr_base; in soc_clk32_init() local
314 rc = pll_wait_lock_periph(pcr, devcfg->xtal_enable_delay_ms); in soc_clk32_init()
361 static uint32_t spin_delay(struct pcr_hw_regs *pcr, uint32_t cnt) in spin_delay() argument
366 pcr->OSC_ID = n; in spin_delay()
[all …]
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_rv32m1.c | 83 uint32_t pcr = 0U; in gpio_rv32m1_configure() local
134 pcr |= PORT_PCR_MUX(kPORT_MuxAsGpio); in gpio_rv32m1_configure()
143 pcr |= PORT_PCR_PE_MASK | PORT_PCR_PS_MASK; in gpio_rv32m1_configure()
149 pcr |= PORT_PCR_PE_MASK; in gpio_rv32m1_configure()
158 port_base->PCR[pin] = (port_base->PCR[pin] & ~mask) | pcr; in gpio_rv32m1_configure()
237 uint32_t pcr = get_port_pcr_irqc_value_from_flags(dev, pin, mode, trig); in gpio_rv32m1_pin_interrupt_configure() local
239 port_base->PCR[pin] = (port_base->PCR[pin] & ~PORT_PCR_IRQC_MASK) | pcr; in gpio_rv32m1_pin_interrupt_configure()
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| D | gpio_mcux.c | 42 uint32_t pcr = 0U; in gpio_mcux_configure() local
82 pcr |= PORT_PCR_MUX(PORT_MUX_GPIO); in gpio_mcux_configure()
86 pcr |= PORT_PCR_IBE_MASK; in gpio_mcux_configure()
96 pcr |= PORT_PCR_PE_MASK | PORT_PCR_PS_MASK; in gpio_mcux_configure()
102 pcr |= PORT_PCR_PE_MASK; in gpio_mcux_configure()
114 pcr |= PORT_PCR_DSE_MASK; in gpio_mcux_configure()
122 port_base->PCR[pin] = (port_base->PCR[pin] & ~mask) | pcr; in gpio_mcux_configure()
292 uint32_t pcr = get_port_pcr_irqc_value_from_flags(dev, pin, mode, trig); in gpio_mcux_pin_interrupt_configure() local
294 port_base->PCR[pin] = (port_base->PCR[pin] & ~PORT_PCR_IRQC_MASK) | pcr; in gpio_mcux_pin_interrupt_configure()
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| /Zephyr-latest/drivers/sensor/microchip/mchp_tach_xec/ |
| D | tach_mchp_xec.c | 115 struct pcr_regs * const pcr = (struct pcr_regs * const)( in tach_xec_sleep_clr() local
116 DT_REG_ADDR_BY_IDX(DT_NODELABEL(pcr), 0)); in tach_xec_sleep_clr()
119 pcr->SLP_EN[cfg->pcr_idx] &= ~BIT(cfg->pcr_pos); in tach_xec_sleep_clr()
121 uintptr_t addr = (uintptr_t)&pcr->SLP_EN0 + (4u * cfg->pcr_idx); in tach_xec_sleep_clr()
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| /Zephyr-latest/samples/boards/microchip/mec15xxevb_assy6853/power_management/ |
| D | mec15xxevb_assy6853.overlay | 11 &pcr {
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| /Zephyr-latest/samples/drivers/clock_control_xec/boards/ |
| D | mec1501modular_assy6885.overlay | 11 &pcr {
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| D | mec15xxevb_assy6853.overlay | 11 &pcr {
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| D | mec172xevb_assy6906.overlay | 11 &pcr {
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| /Zephyr-latest/drivers/bbram/ |
| D | bbram_xec.c | 28 DT_NODELABEL(pcr), vbatr)); in bbram_xec_check_invalid()
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| /Zephyr-latest/boards/microchip/mec1501modular_assy6885/ |
| D | mec1501modular_assy6885.dts | 34 &pcr {
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| /Zephyr-latest/dts/arm/microchip/ |
| D | mec172x_common.dtsi | 10 pcr: pcr@40080100 { label
11 compatible = "microchip,xec-pcr";
31 clocks = <&pcr 1 0 MCHP_XEC_PCR_CLK_PERIPH>;
678 clocks = <&pcr 4 8 MCHP_XEC_PCR_CLK_PERIPH>;
989 clocks = <&pcr 3 26 MCHP_XEC_PCR_CLK_PERIPH>;
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| D | mec1501hsz.dtsi | 63 pcr: pcr@40080100 { label
64 compatible = "microchip,xec-pcr";
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| D | mec5.dtsi | 30 pcr: pcr@40080100 { label
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| /Zephyr-latest/drivers/interrupt_controller/ |
| D | intc_mchp_ecia_xec.c | 43 ((struct pcr_regs *)(DT_REG_ADDR(DT_NODELABEL(pcr))))
514 const struct device *const clk_dev = DEVICE_DT_GET(DT_NODELABEL(pcr)); in xec_ecia_init()
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| /Zephyr-latest/boards/microchip/mec15xxevb_assy6853/ |
| D | mec15xxevb_assy6853.dts | 62 &pcr {
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| /Zephyr-latest/boards/microchip/mec172xmodular_assy6930/ |
| D | mec172xmodular_assy6930.dts | 71 &pcr {
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| /Zephyr-latest/drivers/timer/ |
| D | mchp_xec_rtos_timer.c | 64 ((struct pcr_regs *)DT_REG_ADDR(DT_NODELABEL(pcr)))
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| /Zephyr-latest/boards/microchip/mec172xevb_assy6906/ |
| D | mec172xevb_assy6906.dts | 75 &pcr {
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| /Zephyr-latest/drivers/espi/ |
| D | espi_mchp_xec_v2.c | 74 ((struct pcr_regs *)(DT_REG_ADDR(DT_NODELABEL(pcr))))
1483 struct pcr_regs *pcr = XEC_PCR_REG_BASE; in espi_xec_init() local
1503 pcr->PWR_RST_CTRL = MCHP_PCR_PR_CTRL_USE_ESPI_PLTRST; in espi_xec_init()
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| D | espi_mchp_xec_host_v2.c | 71 ((struct pcr_regs *)(DT_REG_ADDR(DT_NODELABEL(pcr))))
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| D | espi_saf_mchp_xec_v2.c | 25 #define MCHP_XEC_CLOCK_CONTROL_NODE DT_NODELABEL(pcr)
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| /Zephyr-latest/drivers/spi/ |
| D | spi_xec_qmspi_ldma.c | 41 #define MCHP_XEC_CLOCK_CONTROL_NODE DT_NODELABEL(pcr)
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