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Searched refs:duty (Results 1 – 25 of 33) sorted by relevance

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/Zephyr-latest/samples/drivers/clock_control_litex/src/
Dmain.c76 i, setup.rate, setup.phase, setup.duty); in litex_clk_test_getters()
89 .duty = LITEX_TEST_SINGLE_DUTY_VAL, in litex_clk_test_single()
95 .duty = LITEX_TEST_SINGLE_DUTY_VAL2, in litex_clk_test_single()
121 .duty = LITEX_TEST_FREQUENCY_DUTY_VAL, in litex_clk_test_freq()
184 .duty = LITEX_TEST_PHASE_DUTY_VAL, in litex_clk_test_phase()
190 .duty = LITEX_TEST_PHASE_DUTY_VAL in litex_clk_test_phase()
226 .duty = 0 in litex_clk_test_duty()
232 .duty = 0 in litex_clk_test_duty()
252 setup1.duty = i; in litex_clk_test_duty()
258 setup2.duty = 100 - i; in litex_clk_test_duty()
[all …]
/Zephyr-latest/drivers/pwm/
Dpwm_intel_blinky.c44 uint32_t duty; in bk_intel_set_cycles() local
57 duty = (pulse_cycles * PWM_DUTY_MAX) / period_cycles; in bk_intel_set_cycles()
59 if (duty) { in bk_intel_set_cycles()
60 val = PWM_DUTY_MAX - duty; in bk_intel_set_cycles()
73 if (duty > PWM_DUTY_MAX) { in bk_intel_set_cycles()
Dpwm_ite_it8801.c90 uint8_t duty, mask; in pwm_it8801_set_cycles() local
105 duty = 0; in pwm_it8801_set_cycles()
107 duty = pulse_cycles * 256 / period_cycles - 1; in pwm_it8801_set_cycles()
109 LOG_DBG("IT8801 pwm duty cycles = %d", duty); in pwm_it8801_set_cycles()
111 ret = i2c_reg_write_byte_dt(&config->i2c_dev, config->reg_dcr, duty); in pwm_it8801_set_cycles()
DKconfig.it8xxx214 eight PWM channels each with 8-bit duty cycle.
Dpwm_mc_esp32.c79 uint32_t duty; member
111 duty_type = channel->duty == 0 ? in mcpwm_esp32_duty_set()
112 MCPWM_HAL_GENERATOR_MODE_FORCE_HIGH : channel->duty == 100 ? in mcpwm_esp32_duty_set()
115 duty_type = channel->duty == 0 ? in mcpwm_esp32_duty_set()
116 MCPWM_HAL_GENERATOR_MODE_FORCE_LOW : channel->duty == 100 ? in mcpwm_esp32_duty_set()
122 set_duty = (timer_clk_hz / channel->freq) * channel->duty / 100; in mcpwm_esp32_duty_set()
267 channel->duty = (uint32_t)duty_cycle; in mcpwm_esp32_set_cycles()
/Zephyr-latest/samples/drivers/clock_control_litex/
DREADME.rst11 …lock Manager (MMCM) module to generate up to 7 clocks with defined phase, frequency and duty cycle.
41 …k1`` with default frequency set to 100MHz, 0 degrees phase offset and 50% duty cycle. Special care…
51 | This code will try to set on ``clk0`` frequency 50MHz, 90 degrees of phase offset and 75% duty cy…
60 .duty = 75,
70 Clock output status (frequency, duty and phase offset) can be acquired with function ``clock_contro…
82 * Setting frequency, duty and phase at once, then check clock status and rate,
109 [00:00:00.280,000] <inf> CLK_CTRL_LITEX: CLKOUT0: set duty: 50%
112 [00:00:00.400,000] <inf> CLK_CTRL_LITEX: CLKOUT1: set duty: 50%
123 [00:00:00.590,000] <inf> CLK_CTRL_LITEX: CLKOUT0: set duty: 25%
125 [00:00:00.670,000] <inf> CLK_CTRL_LITEX: CLKOUT1: set duty: 75%
[all …]
/Zephyr-latest/drivers/clock_control/
Dclock_control_litex.c442 lcko->def.freq, lcko->def.duty.num, in litex_clk_print_params()
443 lcko->def.duty.den, lcko->def.phase); in litex_clk_print_params()
447 lcko->ts_config.duty.num, lcko->ts_config.duty.den, in litex_clk_print_params()
452 lcko->config.duty.num, lcko->config.duty.den, in litex_clk_print_params()
845 struct clk_duty *duty) in litex_clk_get_duty_cycle() argument
867 duty->num = 1; in litex_clk_get_duty_cycle()
868 duty->den = 2; in litex_clk_get_duty_cycle()
882 duty->num = high_time * 10 + edge * 5; in litex_clk_get_duty_cycle()
883 duty->den = (divider + edge) * 10; in litex_clk_get_duty_cycle()
889 static inline uint8_t litex_clk_calc_duty_percent(struct clk_duty *duty) in litex_clk_calc_duty_percent() argument
[all …]
Dclock_control_litex.h70 lcko->def.duty.num = CLKOUT_DUTY_NUM(N); \
71 lcko->def.duty.den = CLKOUT_DUTY_DEN(N); \
170 struct clk_duty duty; member
206 struct clk_duty duty; member
DKconfig.litex13 such as phase, duty cycle, frequency for up to 7
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dclock_control_litex.h41 uint8_t duty; member
/Zephyr-latest/drivers/i2c/
Di2c_renesas_ra_iic.c58 uint32_t duty; member
335 result->duty = in calc_iic_master_bitrate()
343 (result->duty > requested_duty ? result->duty - requested_duty in calc_iic_master_bitrate()
344 : requested_duty - result->duty) / in calc_iic_master_bitrate()
350 __func__, total_brl_brh, brh, divider, result->bitrate, result->duty, in calc_iic_master_bitrate()
421 while (test_bitrate.duty > requested_duty) { in calc_iic_master_clock_setting()
441 while (test_bitrate.duty < requested_duty) { in calc_iic_master_clock_setting()
/Zephyr-latest/samples/sensor/vcnl4040/boards/
Dadafruit_feather_stm32f405.overlay13 led-duty-cycle = <320>;
/Zephyr-latest/boards/nxp/mr_canhubk3/
Dmr_canhubk3.dts517 duty-cycle = <0>;
526 duty-cycle = <0>;
535 duty-cycle = <0>;
544 duty-cycle = <0>;
553 duty-cycle = <0>;
562 duty-cycle = <0>;
570 duty-cycle = <0>;
609 duty-cycle = <0>;
617 duty-cycle = <0>;
/Zephyr-latest/tests/drivers/pwm/pwm_loopback/boards/
Dmr_canhubk3.overlay36 /delete-property/ duty-cycle;
/Zephyr-latest/drivers/display/
Ddisplay_ist3931.c30 uint8_t duty; /* 1-64 */ member
96 uint8_t cmd_buf[2] = {(IST3931_CMD_SET_DUTY_LSB | (config->duty & 0x0F)), in ist3931_set_duty()
97 (IST3931_CMD_SET_DUTY_MSB | (config->duty >> 4))}; in ist3931_set_duty()
274 .duty = DT_INST_PROP(inst, duty_ratio), \
/Zephyr-latest/drivers/led_strip/
DKconfig.lpd880x16 duty cycle can be set at 7 bit resolution via a
/Zephyr-latest/samples/sensor/sgp40_sht4x/
DKconfig17 Maximum duty cycle for using the heater is 5%
/Zephyr-latest/dts/riscv/
Driscv32-litex-vexriscv.dtsi337 litex,clock-duty-num = <1>;
338 litex,clock-duty-den = <2>;
350 litex,clock-duty-num = <1>;
351 litex,clock-duty-den = <2>;
/Zephyr-latest/samples/drivers/led/pwm/boards/
Dmec15xxevb_assy6853.overlay15 * and implements duty cycle for blink mode as an 8-bit value where 0 is off and
Dmec172xevb_assy6906.overlay17 * and implements duty cycle for blink mode as an 8-bit value where 0 is off and
/Zephyr-latest/samples/drivers/clock_control_xec/
DREADME.rst36 Remove jumper on JP121 to prevent U15 32KHz 50% duty waveform
/Zephyr-latest/subsys/net/l2/ieee802154/
DKconfig.radio41 and fits low duty-cycle contexts where the radio spectrum is not
/Zephyr-latest/tests/drivers/build_all/display/
Dapp.overlay346 duty-ratio=<64>;
/Zephyr-latest/boards/microchip/mec172xevb_assy6906/doc/
Dindex.rst232 also be configured to use an external 50% duty cycle 32KHz source on the
248 External 32KHz 50% duty cycle configuration
/Zephyr-latest/boards/microchip/mec15xxevb_assy6853/doc/
Dindex.rst201 also be configured to use an external 50% duty cycle 32KHz source on the
216 External 32KHz 50% duty cycle configuration

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