Home
last modified time | relevance | path

Searched refs:divisor (Results 1 – 25 of 29) sorted by relevance

12

/Zephyr-latest/lib/utils/
Ddec.c11 uint8_t divisor = 100; in u8_to_dec() local
15 while ((buflen > 0) && (divisor > 0)) { in u8_to_dec()
16 digit = value / divisor; in u8_to_dec()
17 if ((digit != 0) || (divisor == 1) || (num_digits != 0)) { in u8_to_dec()
24 value -= digit * divisor; in u8_to_dec()
25 divisor /= 10; in u8_to_dec()
/Zephyr-latest/tests/kernel/fpu_sharing/generic/src/
Dpi.c76 FP_TYPE divisor = FP_CONSTANT(3.0); in calculate_pi_low() local
85 divisor = FP_CONSTANT(3.0); in calculate_pi_low()
88 pi += sign / divisor; in calculate_pi_low()
89 divisor += FP_CONSTANT(2.0); in calculate_pi_low()
115 FP_TYPE divisor = FP_CONSTANT(3.0); in calculate_pi_high() local
126 divisor = FP_CONSTANT(3.0); in calculate_pi_high()
129 pi += sign / divisor; in calculate_pi_high()
130 divisor += FP_CONSTANT(2.0); in calculate_pi_high()
/Zephyr-latest/drivers/sensor/st/vl53l1x/
Dvl53l1_platform_user_defines.h31 #define do_division_u(dividend, divisor) (dividend / divisor) argument
41 #define do_division_s(dividend, divisor) (dividend / divisor) argument
/Zephyr-latest/subsys/bluetooth/mesh/
Dhealth_cli.c117 uint8_t *divisor; member
126 uint8_t divisor; in health_period_status() local
131 divisor = net_buf_simple_pull_u8(buf); in health_period_status()
136 if (param->divisor) { in health_period_status()
137 *param->divisor = divisor; in health_period_status()
144 cli->period_status(cli, ctx->addr, divisor); in health_period_status()
243 uint8_t *divisor) in bt_mesh_health_cli_period_get() argument
247 .divisor = divisor, in bt_mesh_health_cli_period_get()
259 return bt_mesh_msg_ackd_send(cli->model, ctx, &msg, divisor ? &rsp : NULL); in bt_mesh_health_cli_period_get()
263 uint8_t divisor, uint8_t *updated_divisor) in bt_mesh_health_cli_period_set() argument
[all …]
/Zephyr-latest/include/zephyr/bluetooth/mesh/
Dhealth_cli.h50 uint8_t divisor);
258 uint8_t *divisor);
286 uint8_t divisor, uint8_t *updated_divisor);
300 uint8_t divisor);
/Zephyr-latest/subsys/bluetooth/mesh/shell/
Dhealth.c185 uint8_t divisor; in cmd_period_get() local
188 err = bt_mesh_health_cli_period_get(cli, ctx.addr ? &ctx : NULL, &divisor); in cmd_period_get()
192 shell_print(sh, "Health FastPeriodDivisor: %u", divisor); in cmd_period_get()
207 uint8_t divisor; in period_set() local
210 divisor = shell_strtoul(argv[1], 0, &err); in period_set()
219 err = bt_mesh_health_cli_period_set(cli, ctx.addr ? &ctx : NULL, divisor, in period_set()
230 err = bt_mesh_health_cli_period_set_unack(cli, ctx.addr ? &ctx : NULL, divisor); in period_set()
/Zephyr-latest/subsys/net/lib/zperf/
Dzperf_shell.c88 const uint32_t *divisor; in print_number() local
92 divisor = divisor_arr; in print_number()
94 while (value < *divisor) { in print_number()
95 divisor++; in print_number()
99 if (*divisor != 0U) { in print_number()
100 radix = value / *divisor; in print_number()
101 dec = (value % *divisor) * 100U / *divisor; in print_number()
113 const uint32_t *divisor; in print_number_64() local
118 divisor = divisor_arr; in print_number_64()
120 while (value < *divisor) { in print_number_64()
[all …]
/Zephyr-latest/boards/st/nucleo_u5a5zj_q/
Dnucleo_u5a5zj_q-common.dtsi70 div-m = <4>; /* input divisor */
72 div-q = <2>; /* system clock divisor */
73 div-r = <2>; /* peripheral clock divisor */
/Zephyr-latest/drivers/serial/
Duart_xlnx_ps.c234 uint32_t divisor, generator; in set_baudrate() local
243 for (divisor = 4; divisor < 255; divisor++) { in set_baudrate()
246 generator = clk_freq / (baud * (divisor + 1)); in set_baudrate()
250 tmpbaud = clk_freq / (generator * (divisor + 1)); in set_baudrate()
268 sys_write32(divisor, reg_base + XUARTPS_BAUDDIV_OFFSET); in set_baudrate()
Duart_sam.c107 uint32_t divisor; in uart_sam_baudrate_set() local
114 divisor = SOC_ATMEL_SAM_MCK_FREQ_HZ / 16U / baudrate; in uart_sam_baudrate_set()
116 if (divisor > 0xFFFF) { in uart_sam_baudrate_set()
120 uart->UART_BRGR = UART_BRGR_CD(divisor); in uart_sam_baudrate_set()
Dusart_sam.c106 uint32_t divisor; in usart_sam_baudrate_set() local
113 divisor = SOC_ATMEL_SAM_MCK_FREQ_HZ / 16U / baudrate; in usart_sam_baudrate_set()
115 if (divisor > 0xFFFF) { in usart_sam_baudrate_set()
119 usart->US_BRGR = US_BRGR_CD(divisor); in usart_sam_baudrate_set()
Duart_ns16550.c505 uint32_t divisor = 0; local
510 divisor = IT8XXX2_230400_DIVISOR;
512 divisor = IT8XXX2_460800_DIVISOR;
522 divisor = get_uart_baudrate_divisor(dev, baud_rate, pclk);
527 return divisor;
547 uint32_t divisor; /* baud rate divisor */ local
552 divisor = get_ite_uart_baudrate_divisor(dev, baud_rate, pclk);
554 divisor = get_uart_baudrate_divisor(dev, baud_rate, pclk);
559 ns16550_outbyte(dev_cfg, BRDL(dev), (unsigned char)(divisor & 0xff));
560 ns16550_outbyte(dev_cfg, BRDH(dev), (unsigned char)((divisor >> 8) & 0xff));
Duart_mchp_xec.c293 uint32_t divisor; /* baud rate divisor */ in set_baud_rate() local
301 divisor = ((dev_cfg->sys_clk_freq + (baud_rate << 3)) in set_baud_rate()
307 regs->RTXB = (unsigned char)(divisor & 0xff); in set_baud_rate()
309 regs->IER = (unsigned char)((divisor >> 8) & 0x7f); in set_baud_rate()
/Zephyr-latest/drivers/sdhc/
DKconfig.sam_hsmci35 is the divisor value. Valid values are 0 to 7.
Drcar_mmc.c1093 uint32_t divisor; in rcar_mmc_set_clk_rate() local
1114 divisor = DIV_ROUND_UP(cfg->max_frequency, ios->clock); in rcar_mmc_set_clk_rate()
1117 if (data->ddr_mode && (divisor == 1)) { in rcar_mmc_set_clk_rate()
1118 divisor = 2; in rcar_mmc_set_clk_rate()
1121 divisor = round_up_next_pwr_of_2(divisor); in rcar_mmc_set_clk_rate()
1122 if (divisor == 1) { in rcar_mmc_set_clk_rate()
1123 divisor = RCAR_MMC_CLKCTL_RCAR_DIV1; in rcar_mmc_set_clk_rate()
1125 divisor >>= 2; in rcar_mmc_set_clk_rate()
1139 (mmc_clk_ctl & RCAR_MMC_CLKCTL_DIV_MASK) == divisor) { in rcar_mmc_set_clk_rate()
1155 mmc_clk_ctl |= divisor; in rcar_mmc_set_clk_rate()
/Zephyr-latest/drivers/spi/
Dspi_litex.c46 uint16_t divisor = DIV_ROUND_UP(sys_clock_hw_cycles_per_sec(), config->frequency); in spi_set_frequency() local
48 litex_write16(divisor, dev_config->clk_divider_addr); in spi_set_frequency()
Dspi_litex_litespi.c52 uint32_t divisor = DIV_ROUND_UP(sys_clock_hw_cycles_per_sec(), (2 * config->frequency)) - 1; in spi_litex_set_frequency() local
54 litex_write32(divisor, dev_config->phy_clk_divisor_addr); in spi_litex_set_frequency()
/Zephyr-latest/subsys/net/ip/
Dutils.c137 uint32_t divisor; in net_value_to_udec() local
142 divisor = 1000000000U; in net_value_to_udec()
147 for (i = 9; i >= 0; i--, divisor /= 10U) { in net_value_to_udec()
148 temp = value / divisor; in net_value_to_udec()
149 value = value % divisor; in net_value_to_udec()
/Zephyr-latest/soc/microchip/mec/mec15xx/
DKconfig27 This divisor defines a ratio between processor clock (HCLK)
/Zephyr-latest/dts/arm/silabs/
Defr32bg2x.dtsi44 /* Fixed divisor of 2 */
51 /* Fixed divisor of 1024 */
/Zephyr-latest/drivers/timer/
DKconfig.x8691 int "TSC to local APIC timer frequency divisor (M)"
/Zephyr-latest/soc/atmel/sam/common/
DKconfig72 This divisor defines a ratio between processor clock (HCLK)
/Zephyr-latest/drivers/i2s/
Di2s_ll_stm32.c28 static unsigned int div_round_closest(uint32_t dividend, uint32_t divisor) in div_round_closest() argument
30 return (dividend + (divisor / 2U)) / divisor; in div_round_closest()
/Zephyr-latest/tests/kernel/common/src/
Dbitarray.c386 void alloc_and_free_loop(int divisor) in alloc_and_free_loop() argument
397 printk("Testing bit array alloc and free with divisor %d\n", divisor); in alloc_and_free_loop()
406 num_bits = (ba.num_bits - bit) / divisor; in alloc_and_free_loop()
/Zephyr-latest/tests/bluetooth/tester/src/btp/
Dbtp_mesh.h702 uint8_t divisor; member
706 uint8_t divisor; member

12