/Zephyr-latest/tests/drivers/clock_control/pwm_clock/src/ |
D | main.c | 26 ret = clock_control_get_rate(clk_dev, 0, &clock_rate); in pwm_clock_setup() 45 ret = clock_control_get_rate(clk_dev, 0, &clock_rate); in ZTEST() 55 ret = clock_control_get_rate(clk_dev, 0, &clock_rate); in ZTEST() 65 ret = clock_control_get_rate(clk_dev, 0, &clock_rate_new); in ZTEST()
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/Zephyr-latest/tests/boards/espressif/rtc_clk/src/ |
D | rtc_clk_test.c | 31 ret = clock_control_get_rate(clk_dev, in rtc_clk_setup() 36 ret = clock_control_get_rate( in rtc_clk_setup() 41 ret = clock_control_get_rate( in rtc_clk_setup() 67 ret = clock_control_get_rate( in ZTEST() 107 ret = clock_control_get_rate( in ZTEST() 151 ret = clock_control_get_rate( in ZTEST() 203 ret = clock_control_get_rate( in ZTEST()
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/Zephyr-latest/samples/boards/espressif/xt_wdt/src/ |
D | main.c | 44 clock_control_get_rate(clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW, in main() 63 clock_control_get_rate(clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW, in main()
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/ |
D | test_stm32_clock_configuration_lptim.c | 64 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST() 80 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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D | test_stm32_clock_configuration_i2c.c | 61 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in i2c_set_clock() 113 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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D | test_stm32_clock_configuration_i2s.c | 56 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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D | test_stm32_clock_configuration_sdmmc.c | 112 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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D | test_stm32_clock_configuration_adc.c | 119 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices/src/ |
D | test_stm32_clock_configuration.c | 76 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST() 89 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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/Zephyr-latest/boards/arduino/nicla_vision/ |
D | camera_ext_clock.c | 31 ret = clock_control_get_rate(cam_ext_clk_dev, (clock_control_subsys_t)0, &rate); in camera_ext_clock_enable()
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/src/ |
D | test_stm32_clock_configuration.c | 112 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST() 125 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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/Zephyr-latest/drivers/usb/device/ |
D | usb_dc_dw_stm32.h | 40 ret = clock_control_get_rate(clk->dev, in clk_enable_st_stm32f4_fsotg()
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/Zephyr-latest/drivers/clock_control/ |
D | clock_control_si32_apb.c | 38 const int ret = clock_control_get_rate(config->clock_dev, NULL, rate); in clock_control_si32_apb_get_rate()
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/Zephyr-latest/tests/drivers/clock_control/fixed_clock/src/ |
D | test_clock_control.c | 44 err = clock_control_get_rate(dev, 0, &rate); in ZTEST()
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/Zephyr-latest/drivers/can/ |
D | can_stm32h7_fdcan.c | 99 if (clock_control_get_rate(clk, in can_stm32h7_get_core_clock() 106 if (clock_control_get_rate(clk, in can_stm32h7_get_core_clock() 150 ret = clock_control_get_rate(clk, in can_stm32h7_clock_enable()
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D | can_nrf.c | 63 return clock_control_get_rate(config->auxpll, NULL, rate); in can_nrf_get_core_clock() 150 ret = clock_control_get_rate(dev, NULL, &spec.frequency); in configure_hsfll()
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/Zephyr-latest/drivers/ptp_clock/ |
D | ptp_clock_nxp_enet.c | 103 (void) clock_control_get_rate(config->clock_dev, config->clock_subsys, in ptp_clock_nxp_enet_rate_adjust() 166 (void) clock_control_get_rate(config->clock_dev, config->clock_subsys, in nxp_enet_ptp_clock_callback()
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/Zephyr-latest/drivers/pwm/ |
D | pwm_mcux_sctimer.c | 53 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_sctimer_new_channel() 200 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_sctimer_pwm_get_cycles_per_sec()
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D | pwm_mcux.c | 63 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_pwm_set_cycles_internal() 181 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_pwm_get_cycles_per_sec()
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D | pwm_max32.c | 97 ret = clock_control_get_rate(cfg->clock, (clock_control_subsys_t)&cfg->perclk, in api_get_cycles_per_sec()
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/Zephyr-latest/drivers/i2c/ |
D | i2c_rv32m1_lpi2c.c | 86 err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq); in rv32m1_lpi2c_configure() 229 err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq); in rv32m1_lpi2c_init()
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D | i2c_mcux_lpi2c.c | 105 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_lpi2c_configure() 419 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_lpi2c_target_register() 518 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_lpi2c_init()
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/Zephyr-latest/drivers/mdio/ |
D | mdio_nxp_imx_netc.c | 70 err = clock_control_get_rate(cfg->clock_dev, cfg->clock_subsys, &mdio_config.srcClockHz); in nxp_imx_netc_mdio_initialize()
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/Zephyr-latest/include/zephyr/drivers/ |
D | clock_control.h | 226 static inline int clock_control_get_rate(const struct device *dev, in clock_control_get_rate() function
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/Zephyr-latest/drivers/video/ |
D | video_mcux_mipi_csi2rx.c | 79 ret = clock_control_get_rate(drv_data->clock_dev, drv_data->clock_root, &root_clk_rate); in mipi_csi2rx_update_settings() 92 ret = clock_control_get_rate(drv_data->clock_dev, drv_data->clock_ui, &ui_clk_rate); in mipi_csi2rx_update_settings()
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