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Searched refs:clock_control_get_rate (Results 1 – 25 of 146) sorted by relevance

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/Zephyr-latest/tests/drivers/clock_control/pwm_clock/src/
Dmain.c26 ret = clock_control_get_rate(clk_dev, 0, &clock_rate); in pwm_clock_setup()
45 ret = clock_control_get_rate(clk_dev, 0, &clock_rate); in ZTEST()
55 ret = clock_control_get_rate(clk_dev, 0, &clock_rate); in ZTEST()
65 ret = clock_control_get_rate(clk_dev, 0, &clock_rate_new); in ZTEST()
/Zephyr-latest/tests/boards/espressif/rtc_clk/src/
Drtc_clk_test.c31 ret = clock_control_get_rate(clk_dev, in rtc_clk_setup()
36 ret = clock_control_get_rate( in rtc_clk_setup()
41 ret = clock_control_get_rate( in rtc_clk_setup()
67 ret = clock_control_get_rate( in ZTEST()
107 ret = clock_control_get_rate( in ZTEST()
151 ret = clock_control_get_rate( in ZTEST()
203 ret = clock_control_get_rate( in ZTEST()
/Zephyr-latest/samples/boards/espressif/xt_wdt/src/
Dmain.c44 clock_control_get_rate(clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW, in main()
63 clock_control_get_rate(clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW, in main()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/
Dtest_stm32_clock_configuration_lptim.c64 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
80 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
Dtest_stm32_clock_configuration_i2c.c61 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in i2c_set_clock()
113 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
Dtest_stm32_clock_configuration_i2s.c56 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
Dtest_stm32_clock_configuration_sdmmc.c112 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
Dtest_stm32_clock_configuration_adc.c121 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices/src/
Dtest_stm32_clock_configuration.c76 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
89 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
/Zephyr-latest/boards/arduino/nicla_vision/
Dcamera_ext_clock.c31 ret = clock_control_get_rate(cam_ext_clk_dev, (clock_control_subsys_t)0, &rate); in camera_ext_clock_enable()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/src/
Dtest_stm32_clock_configuration.c112 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
125 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
/Zephyr-latest/drivers/usb/device/
Dusb_dc_dw_stm32.h40 ret = clock_control_get_rate(clk->dev, in clk_enable_st_stm32f4_fsotg()
/Zephyr-latest/drivers/clock_control/
Dclock_control_si32_apb.c38 const int ret = clock_control_get_rate(config->clock_dev, NULL, rate); in clock_control_si32_apb_get_rate()
/Zephyr-latest/tests/drivers/clock_control/fixed_clock/src/
Dtest_clock_control.c44 err = clock_control_get_rate(dev, 0, &rate); in ZTEST()
/Zephyr-latest/drivers/ptp_clock/
Dptp_clock_nxp_enet.c103 (void) clock_control_get_rate(config->clock_dev, config->clock_subsys, in ptp_clock_nxp_enet_rate_adjust()
166 (void) clock_control_get_rate(config->clock_dev, config->clock_subsys, in nxp_enet_ptp_clock_callback()
/Zephyr-latest/drivers/pwm/
Dpwm_mcux_sctimer.c53 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_sctimer_new_channel()
200 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_sctimer_pwm_get_cycles_per_sec()
Dpwm_mcux.c63 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_pwm_set_cycles_internal()
181 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_pwm_get_cycles_per_sec()
Dpwm_max32.c97 ret = clock_control_get_rate(cfg->clock, (clock_control_subsys_t)&cfg->perclk, in api_get_cycles_per_sec()
/Zephyr-latest/drivers/i2c/
Di2c_rv32m1_lpi2c.c86 err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq); in rv32m1_lpi2c_configure()
229 err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq); in rv32m1_lpi2c_init()
Di2c_mcux_flexcomm.c94 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_flexcomm_configure()
359 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_flexcomm_setup_slave_config()
499 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_flexcomm_init()
Di2c_mcux_lpi2c.c108 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_lpi2c_configure()
422 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_lpi2c_target_register()
521 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_lpi2c_init()
/Zephyr-latest/drivers/mdio/
Dmdio_nxp_imx_netc.c70 err = clock_control_get_rate(cfg->clock_dev, cfg->clock_subsys, &mdio_config.srcClockHz); in nxp_imx_netc_mdio_initialize()
/Zephyr-latest/include/zephyr/drivers/
Dclock_control.h218 static inline int clock_control_get_rate(const struct device *dev, in clock_control_get_rate() function
/Zephyr-latest/drivers/mipi_dsi/
Ddsi_mcux_2l.c290 if (clock_control_get_rate(config->bit_clk_dev, in dsi_mcux_attach()
296 if (clock_control_get_rate(config->esc_clk_dev, in dsi_mcux_attach()
302 if (clock_control_get_rate(config->pixel_clk_dev, in dsi_mcux_attach()
/Zephyr-latest/drivers/serial/
Duart_wch_usart.c40 err = clock_control_get_rate(config->clock_dev, clock_sys, &clock_rate); in usart_wch_init()

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