Searched refs:STM32_CLOCK_BUS_APB2 (Results 1 – 25 of 48) sorted by relevance
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| /Zephyr-latest/include/zephyr/dt-bindings/clock/ |
| D | stm32wb0_clock.h | 25 #define STM32_CLOCK_BUS_APB2 0x60 macro
28 #define STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB2
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| D | stm32wb_clock.h | 17 #define STM32_CLOCK_BUS_APB2 0x060 macro
20 #define STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB2
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| D | stm32g4_clock.h | 17 #define STM32_CLOCK_BUS_APB2 0x060 macro
20 #define STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB2
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| D | stm32l1_clock.h | 13 #define STM32_CLOCK_BUS_APB2 0x020 macro
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| D | stm32_clock.h | 13 #define STM32_CLOCK_BUS_APB2 3 macro
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| D | stm32l4_clock.h | 17 #define STM32_CLOCK_BUS_APB2 0x060 macro
20 #define STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB2
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| D | stm32f1_clock.h | 15 #define STM32_CLOCK_BUS_APB2 0x018 macro
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| D | stm32l0_clock.h | 14 #define STM32_CLOCK_BUS_APB2 0x034 macro
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| D | stm32f0_clock.h | 13 #define STM32_CLOCK_BUS_APB2 0x018 macro
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| D | stm32f4_clock.h | 18 #define STM32_CLOCK_BUS_APB2 0x044 macro
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| D | stm32h7_clock.h | 49 #define STM32_CLOCK_BUS_APB2 0x0F0 macro
53 #define STM32_SRC_PCLK2 STM32_CLOCK_BUS_APB2
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| D | stm32wl_clock.h | 17 #define STM32_CLOCK_BUS_APB2 0x060 macro
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| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices/boards/ |
| D | spi1_pclk2.overlay | 14 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
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| D | spi1_sysclk.overlay | 14 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
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| D | spi1_hsi_16.overlay | 18 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
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| D | spi1_msik.overlay | 20 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
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| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/boards/ |
| D | spi1_pll2p_1.overlay | 22 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
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| D | spi1_per_ck_d1ppre_1.overlay | 24 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
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| D | spi1_pllq_1_d1ppre_1.overlay | 24 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
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| D | spi1_per_ck_hse.overlay | 25 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
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| D | spi1_per_ck_hsi.overlay | 24 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
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| D | spi1_pll3p_1_d1ppre_4.overlay | 27 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
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| D | spi1_pllq_2_d1ppre_4.overlay | 30 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
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| /Zephyr-latest/tests/drivers/spi/spi_loopback/boards/ |
| D | nucleo_h723zg.overlay | 16 clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
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| /Zephyr-latest/drivers/clock_control/ |
| D | clock_stm32_ll_mp1.c | 28 case STM32_CLOCK_BUS_APB2: in stm32_clock_control_on()
79 case STM32_CLOCK_BUS_APB2: in stm32_clock_control_off()
186 case STM32_CLOCK_BUS_APB2: in stm32_clock_control_get_subsys_rate()
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