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Searched refs:MCUX_CTIMER2_CLK (Results 1 – 12 of 12) sorted by relevance

/Zephyr-latest/samples/basic/blinky_pwm/boards/
Dmimxrt685_evk_mimxrt685s_cm33.overlay22 clocks = <&clkctl1 MCUX_CTIMER2_CLK>;
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dmcux_lpc_syscon_clock.h21 #define MCUX_CTIMER2_CLK 2 macro
/Zephyr-latest/drivers/clock_control/
Dclock_control_mcux_syscon.c334 case MCUX_CTIMER2_CLK: in mcux_lpc_syscon_clock_control_get_subsys_rate()
/Zephyr-latest/dts/arm/nxp/
Dnxp_lpc55S1x_common.dtsi192 clocks = <&syscon MCUX_CTIMER2_CLK>;
Dnxp_mcxa156.dtsi198 clocks = <&syscon MCUX_CTIMER2_CLK>;
Dnxp_lpc55S6x_common.dtsi429 clocks = <&syscon MCUX_CTIMER2_CLK>;
Dnxp_rw6xx_common.dtsi355 clocks = <&clkctl1 MCUX_CTIMER2_CLK>;
Dnxp_rt6xx_common.dtsi517 clocks = <&clkctl1 MCUX_CTIMER2_CLK>;
Dnxp_rt5xx_common.dtsi617 clocks = <&clkctl1 MCUX_CTIMER2_CLK>;
Dnxp_mcxn23x_common.dtsi673 clocks = <&syscon MCUX_CTIMER2_CLK>;
Dnxp_rt7xx_cm33_cpu0.dtsi212 clocks = <&clkctl0 MCUX_CTIMER2_CLK>;
Dnxp_mcxn94x_common.dtsi802 clocks = <&syscon MCUX_CTIMER2_CLK>;