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Searched refs:IMX_CCM_PWM_CLK (Results 1 – 8 of 8) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dimx_ccm.h54 #define IMX_CCM_PWM_CLK 0x0C00UL macro
Dimx_ccm_rev2.h84 #define IMX_CCM_PWM_CLK 0x800UL macro
/Zephyr-latest/dts/arm/nxp/
Dnxp_rt10xx.dtsi616 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
626 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
636 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
646 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
662 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
672 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
682 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
692 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
708 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
718 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
[all …]
Dnxp_rt118x.dtsi762 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
772 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
782 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
792 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
808 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
818 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
828 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
838 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
854 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
864 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
[all …]
Dnxp_rt11xx.dtsi591 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
601 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
611 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
621 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
637 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
647 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
657 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
667 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
683 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
693 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
[all …]
Dnxp_rt1010.dtsi202 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
212 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
222 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
232 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
/Zephyr-latest/drivers/clock_control/
Dclock_control_mcux_ccm_rev2.c137 case IMX_CCM_PWM_CLK: in mcux_ccm_get_subsys_rate()
141 case IMX_CCM_PWM_CLK: in mcux_ccm_get_subsys_rate()
Dclock_control_mcux_ccm.c282 case IMX_CCM_PWM_CLK: in mcux_ccm_get_subsys_rate()