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Searched refs:IMX_CCM_PWM_CLK (Results 1 – 8 of 8) sorted by relevance

/Zephyr-latest/dts/arm/nxp/
Dnxp_rt118x.dtsi678 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
688 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
698 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
708 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
724 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
734 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
744 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
754 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
770 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
780 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
[all …]
Dnxp_rt10xx.dtsi605 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
615 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
625 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
635 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
651 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
661 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
671 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
681 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
697 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
707 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
[all …]
Dnxp_rt11xx.dtsi579 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
589 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
599 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
609 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
625 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
635 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
645 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
655 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
671 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
681 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
[all …]
Dnxp_rt1010.dtsi203 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
213 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
223 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
233 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dimx_ccm.h54 #define IMX_CCM_PWM_CLK 0x0C00UL macro
Dimx_ccm_rev2.h79 #define IMX_CCM_PWM_CLK 0x800UL macro
/Zephyr-latest/drivers/clock_control/
Dclock_control_mcux_ccm_rev2.c122 case IMX_CCM_PWM_CLK: in mcux_ccm_get_subsys_rate()
126 case IMX_CCM_PWM_CLK: in mcux_ccm_get_subsys_rate()
Dclock_control_mcux_ccm.c270 case IMX_CCM_PWM_CLK: in mcux_ccm_get_subsys_rate()