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Searched refs:DEV_BASE (Results 1 – 11 of 11) sorted by relevance

/Zephyr-latest/drivers/serial/
Dleuart_gecko.c22 #define DEV_BASE(dev) \ macro
52 LEUART_TypeDef *base = DEV_BASE(dev); in leuart_gecko_poll_in()
65 LEUART_TypeDef *base = DEV_BASE(dev); in leuart_gecko_poll_out()
75 LEUART_TypeDef *base = DEV_BASE(dev); in leuart_gecko_err_check()
103 LEUART_TypeDef *base = DEV_BASE(dev); in leuart_gecko_fifo_fill()
118 LEUART_TypeDef *base = DEV_BASE(dev); in leuart_gecko_fifo_read()
132 LEUART_TypeDef *base = DEV_BASE(dev); in leuart_gecko_irq_tx_enable()
140 LEUART_TypeDef *base = DEV_BASE(dev); in leuart_gecko_irq_tx_disable()
148 LEUART_TypeDef *base = DEV_BASE(dev); in leuart_gecko_irq_tx_complete()
156 LEUART_TypeDef *base = DEV_BASE(dev); in leuart_gecko_irq_tx_ready()
[all …]
/Zephyr-latest/drivers/dma/
Ddma_mcux_edma.c119 #define DEV_BASE(dev) ((DMA_Type *)DEV_CFG(dev)->base) macro
156 #define EDMA_HW_TCD_SADDR(dev, ch) (DEV_BASE(dev)->TCD[ch].SADDR)
157 #define EDMA_HW_TCD_DADDR(dev, ch) (DEV_BASE(dev)->TCD[ch].DADDR)
158 #define EDMA_HW_TCD_BITER(dev, ch) (DEV_BASE(dev)->TCD[ch].BITER_ELINKNO)
159 #define EDMA_HW_TCD_CITER(dev, ch) (DEV_BASE(dev)->TCD[ch].CITER_ELINKNO)
160 #define EDMA_HW_TCD_CSR(dev, ch) (DEV_BASE(dev)->TCD[ch].CSR)
162 #define EDMA_HW_TCD_SADDR(dev, ch) (DEV_BASE(dev)->CH[ch].TCD_SADDR)
163 #define EDMA_HW_TCD_DADDR(dev, ch) (DEV_BASE(dev)->CH[ch].TCD_DADDR)
164 #define EDMA_HW_TCD_BITER(dev, ch) (DEV_BASE(dev)->CH[ch].TCD_BITER_ELINKNO)
165 #define EDMA_HW_TCD_CITER(dev, ch) (DEV_BASE(dev)->CH[ch].TCD_CITER_ELINKNO)
[all …]
Ddma_mcux_lpc.c70 #define DEV_BASE(dev) \ macro
106 DMA_IRQHandle(DEV_BASE(dev)); in dma_mcux_lpc_irq_handler()
477 DMA_CreateHandle(p_handle, DEV_BASE(dev), channel); in dma_mcux_lpc_configure()
525 DMA_DisableChannel(DEV_BASE(dev), ChannelToDisable); in dma_mcux_lpc_configure()
526 DEV_BASE(dev)->CHANNEL[ChannelToDisable].CFG &= in dma_mcux_lpc_configure()
545 DEV_BASE(dev)->CHANNEL[config->linked_channel].CFG |= in dma_mcux_lpc_configure()
548 DMA_EnableChannel(DEV_BASE(dev), config->linked_channel); in dma_mcux_lpc_configure()
566 DMA_DisableChannel(DEV_BASE(dev), ChannelToDisable); in dma_mcux_lpc_configure()
567 DEV_BASE(dev)->CHANNEL[ChannelToDisable].CFG &= in dma_mcux_lpc_configure()
737 LOG_DBG("DMA CTRL 0x%x", DEV_BASE(dev)->CTRL); in dma_mcux_lpc_start()
[all …]
/Zephyr-latest/drivers/i2c/
Di2c_bcm_iproc.c153 #define DEV_BASE(dev) ((DEV_CFG(dev))->base) macro
177 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_enable_disable()
191 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_reset_controller()
210 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_set_address()
230 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_init()
274 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_check_target_status()
306 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_read()
343 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_rx()
373 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_isr()
461 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_register()
[all …]
Di2c_cc32xx.c43 #define DEV_BASE(dev) \ macro
87 uint32_t base = DEV_BASE(dev); in i2c_cc32xx_configure()
119 uint32_t base = DEV_BASE(dev); in i2c_cc32xx_prime_transfer()
265 uint32_t base = DEV_BASE(dev); in i2c_cc32xx_isr()
327 uint32_t base = DEV_BASE(dev); in i2c_cc32xx_init()
Di2c_imx.c23 #define DEV_BASE(dev) \ macro
53 I2C_Type *base = DEV_BASE(dev); in i2c_imx_write()
87 I2C_Type *base = DEV_BASE(dev); in i2c_imx_read()
127 I2C_Type *base = DEV_BASE(dev); in i2c_imx_configure()
191 I2C_Type *base = DEV_BASE(dev); in i2c_imx_transfer()
273 I2C_Type *base = DEV_BASE(dev); in i2c_imx_isr()
Di2c_mcux.c25 #define DEV_BASE(dev) \ macro
54 I2C_Type *base = DEV_BASE(dev); in i2c_mcux_configure()
147 I2C_Type *base = DEV_BASE(dev); in i2c_mcux_transfer()
237 I2C_Type *base = DEV_BASE(dev); in i2c_mcux_async_iter()
304 I2C_Type *base = DEV_BASE(dev); in i2c_mcux_isr()
312 I2C_Type *base = DEV_BASE(dev); in i2c_mcux_init()
Di2c_gecko.c26 #define DEV_BASE(dev) ((I2C_TypeDef *)((const struct i2c_gecko_config *const)(dev)->config)->base) macro
49 I2C_TypeDef *base = DEV_BASE(dev); in i2c_gecko_configure()
91 I2C_TypeDef *base = DEV_BASE(dev); in i2c_gecko_transfer()
Di2c_lpc11u6x.c15 #define DEV_BASE(dev) (((struct lpc11u6x_i2c_config *)(dev->config))->base) macro
176 struct lpc11u6x_i2c_regs *i2c = DEV_BASE(dev); in lpc11u6x_i2c_isr()
/Zephyr-latest/drivers/clock_control/
Dclock_control_rv32m1_pcc.c21 #define DEV_BASE(dev) \ macro
29 return MAKE_PCC_REGADDR(DEV_BASE(dev), offset); in clock_ip()
Dclock_control_mcux_pcc.c27 #define DEV_BASE(dev) (((struct mcux_pcc_config *)(dev->config))->base_address) macro
43 *clock_encoding = MAKE_PCC_REGADDR(DEV_BASE(dev), clock_name); in get_clock_encoding()