1 /*
2 * Copyright (c) 2018 Diego Sueiro
3 * Copyright (c) 2024 Capgemini
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8 #define DT_DRV_COMPAT silabs_gecko_i2c
9
10 #include <errno.h>
11 #include <zephyr/drivers/i2c.h>
12 #include <zephyr/drivers/pinctrl.h>
13 #include <zephyr/kernel.h>
14 #include <zephyr/sys/util.h>
15 #include <em_cmu.h>
16 #include <em_i2c.h>
17 #include <em_gpio.h>
18 #include <soc.h>
19
20 #define LOG_LEVEL CONFIG_I2C_LOG_LEVEL
21 #include <zephyr/logging/log.h>
22 LOG_MODULE_REGISTER(i2c_gecko);
23
24 #include "i2c-priv.h"
25
26 #define DEV_BASE(dev) ((I2C_TypeDef *)((const struct i2c_gecko_config *const)(dev)->config)->base)
27
28 struct i2c_gecko_config {
29 const struct pinctrl_dev_config *pcfg;
30 I2C_TypeDef *base;
31 CMU_Clock_TypeDef clock;
32 uint32_t bitrate;
33 #if defined(CONFIG_I2C_TARGET)
34 void (*irq_config_func)(const struct device *dev);
35 #endif
36 };
37
38 struct i2c_gecko_data {
39 struct k_sem device_sync_sem;
40 struct k_sem bus_lock;
41 uint32_t dev_config;
42 #if defined(CONFIG_I2C_TARGET)
43 struct i2c_target_config *target_cfg;
44 #endif
45 };
46
i2c_gecko_configure(const struct device * dev,uint32_t dev_config_raw)47 static int i2c_gecko_configure(const struct device *dev, uint32_t dev_config_raw)
48 {
49 I2C_TypeDef *base = DEV_BASE(dev);
50 struct i2c_gecko_data *data = dev->data;
51 I2C_Init_TypeDef i2cInit = I2C_INIT_DEFAULT;
52 uint32_t baudrate;
53
54 if (!(I2C_MODE_CONTROLLER & dev_config_raw)) {
55 return -EINVAL;
56 }
57
58 switch (I2C_SPEED_GET(dev_config_raw)) {
59 case I2C_SPEED_STANDARD:
60 baudrate = KHZ(100);
61 break;
62 case I2C_SPEED_FAST:
63 baudrate = KHZ(400);
64 break;
65 case I2C_SPEED_FAST_PLUS:
66 baudrate = MHZ(1);
67 break;
68 default:
69 return -EINVAL;
70 }
71
72 k_sem_take(&data->bus_lock, K_FOREVER);
73
74 data->dev_config = dev_config_raw;
75 i2cInit.freq = baudrate;
76
77 #if defined(CONFIG_I2C_TARGET)
78 i2cInit.master = 0;
79 #endif
80
81 I2C_Init(base, &i2cInit);
82
83 k_sem_give(&data->bus_lock);
84
85 return 0;
86 }
87
i2c_gecko_transfer(const struct device * dev,struct i2c_msg * msgs,uint8_t num_msgs,uint16_t addr)88 static int i2c_gecko_transfer(const struct device *dev, struct i2c_msg *msgs, uint8_t num_msgs,
89 uint16_t addr)
90 {
91 I2C_TypeDef *base = DEV_BASE(dev);
92 struct i2c_gecko_data *data = dev->data;
93 I2C_TransferSeq_TypeDef seq;
94 I2C_TransferReturn_TypeDef ret = -EIO;
95 uint32_t timeout = 300000U;
96
97 if (!num_msgs) {
98 return 0;
99 }
100
101 k_sem_take(&data->bus_lock, K_FOREVER);
102
103 seq.addr = addr << 1;
104
105 do {
106 seq.buf[0].data = msgs->buf;
107 seq.buf[0].len = msgs->len;
108
109 if ((msgs->flags & I2C_MSG_RW_MASK) == I2C_MSG_READ) {
110 seq.flags = I2C_FLAG_READ;
111 } else {
112 seq.flags = I2C_FLAG_WRITE;
113 if (num_msgs > 1) {
114 /* Next message */
115 msgs++;
116 num_msgs--;
117 if ((msgs->flags & I2C_MSG_RW_MASK) == I2C_MSG_READ) {
118 seq.flags = I2C_FLAG_WRITE_READ;
119 } else {
120 seq.flags = I2C_FLAG_WRITE_WRITE;
121 }
122 seq.buf[1].data = msgs->buf;
123 seq.buf[1].len = msgs->len;
124 }
125 }
126
127 if (data->dev_config & I2C_ADDR_10_BITS) {
128 seq.flags |= I2C_FLAG_10BIT_ADDR;
129 }
130
131 /* Do a polled transfer */
132 ret = I2C_TransferInit(base, &seq);
133 while (ret == i2cTransferInProgress && timeout--) {
134 ret = I2C_Transfer(base);
135 }
136
137 if (ret != i2cTransferDone) {
138 goto finish;
139 }
140
141 /* Next message */
142 msgs++;
143 num_msgs--;
144 } while (num_msgs);
145
146 finish:
147 k_sem_give(&data->bus_lock);
148
149 if (ret != i2cTransferDone) {
150 ret = -EIO;
151 }
152 return ret;
153 }
154
i2c_gecko_init(const struct device * dev)155 static int i2c_gecko_init(const struct device *dev)
156 {
157 struct i2c_gecko_data *data = dev->data;
158 const struct i2c_gecko_config *config = dev->config;
159 uint32_t bitrate_cfg;
160 int error;
161
162 /* Initialize mutex to guarantee that each transaction
163 * is atomic and has exclusive access to the I2C bus
164 */
165 k_sem_init(&data->bus_lock, 1, 1);
166
167 CMU_ClockEnable(config->clock, true);
168
169 error = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
170 if (error < 0) {
171 LOG_ERR("Failed to configure I2C pins err[%d]", error);
172 return error;
173 }
174
175 bitrate_cfg = i2c_map_dt_bitrate(config->bitrate);
176
177 error = i2c_gecko_configure(dev, I2C_MODE_CONTROLLER | bitrate_cfg);
178 if (error) {
179 return error;
180 }
181
182 return 0;
183 }
184
185 #if defined(CONFIG_I2C_TARGET)
i2c_gecko_target_register(const struct device * dev,struct i2c_target_config * cfg)186 static int i2c_gecko_target_register(const struct device *dev, struct i2c_target_config *cfg)
187 {
188 const struct i2c_gecko_config *config = dev->config;
189 struct i2c_gecko_data *data = dev->data;
190
191 data->target_cfg = cfg;
192
193 I2C_SlaveAddressSet(config->base, cfg->address << _I2C_SADDR_ADDR_SHIFT);
194 /* Match with specified address, no wildcards in address */
195 I2C_SlaveAddressMaskSet(config->base, _I2C_SADDRMASK_SADDRMASK_MASK);
196
197 I2C_IntDisable(config->base, _I2C_IEN_MASK);
198 I2C_IntEnable(config->base, I2C_IEN_ADDR | I2C_IEN_RXDATAV | I2C_IEN_ACK | I2C_IEN_SSTOP |
199 I2C_IEN_BUSERR | I2C_IEN_ARBLOST);
200
201 config->irq_config_func(dev);
202
203 return 0;
204 }
205
i2c_gecko_target_unregister(const struct device * dev,struct i2c_target_config * cfg)206 static int i2c_gecko_target_unregister(const struct device *dev, struct i2c_target_config *cfg)
207 {
208 const struct i2c_gecko_config *config = dev->config;
209 struct i2c_gecko_data *data = dev->data;
210
211 data->target_cfg = NULL;
212
213 I2C_IntDisable(config->base, _I2C_IEN_MASK);
214
215 return 0;
216 }
217 #endif
218
219 static DEVICE_API(i2c, i2c_gecko_driver_api) = {
220 .configure = i2c_gecko_configure,
221 .transfer = i2c_gecko_transfer,
222 #if defined(CONFIG_I2C_TARGET)
223 .target_register = i2c_gecko_target_register,
224 .target_unregister = i2c_gecko_target_unregister,
225 #endif
226 #ifdef CONFIG_I2C_RTIO
227 .iodev_submit = i2c_iodev_submit_fallback,
228 #endif
229 };
230
231 #if defined(CONFIG_I2C_TARGET)
i2c_gecko_isr(const struct device * dev)232 void i2c_gecko_isr(const struct device *dev)
233 {
234 const struct i2c_gecko_config *config = dev->config;
235 struct i2c_gecko_data *data = dev->data;
236
237 uint32_t pending;
238 uint32_t rx_byte;
239 uint8_t tx_byte;
240
241 pending = config->base->IF;
242
243 /* If some sort of fault, abort transfer. */
244 if (pending & (I2C_IF_BUSERR | I2C_IF_ARBLOST)) {
245 LOG_ERR("I2C Bus Error");
246 I2C_IntClear(config->base, I2C_IF_BUSERR);
247 I2C_IntClear(config->base, I2C_IF_ARBLOST);
248 } else {
249 if (pending & I2C_IF_ADDR) {
250 /* Address Match, indicating that reception is started */
251 rx_byte = config->base->RXDATA;
252 config->base->CMD = I2C_CMD_ACK;
253
254 /* Check if read bit set */
255 if (rx_byte & 0x1) {
256 data->target_cfg->callbacks->read_requested(data->target_cfg,
257 &tx_byte);
258 config->base->TXDATA = tx_byte;
259 } else {
260 data->target_cfg->callbacks->write_requested(data->target_cfg);
261 }
262
263 I2C_IntClear(config->base, I2C_IF_ADDR | I2C_IF_RXDATAV);
264 } else if (pending & I2C_IF_RXDATAV) {
265 rx_byte = config->base->RXDATA;
266 /* Read new data and write to target address */
267 data->target_cfg->callbacks->write_received(data->target_cfg, rx_byte);
268 config->base->CMD = I2C_CMD_ACK;
269
270 I2C_IntClear(config->base, I2C_IF_RXDATAV);
271 }
272
273 if (pending & I2C_IF_ACK) {
274 /* Leader ACK'ed, so requesting more data */
275 data->target_cfg->callbacks->read_processed(data->target_cfg, &tx_byte);
276 config->base->TXDATA = tx_byte;
277
278 I2C_IntClear(config->base, I2C_IF_ACK);
279 }
280
281 if (pending & I2C_IF_SSTOP) {
282 /* End of transaction */
283 data->target_cfg->callbacks->stop(data->target_cfg);
284 I2C_IntClear(config->base, I2C_IF_SSTOP);
285 }
286 }
287 }
288 #endif
289
290 #if defined(CONFIG_I2C_TARGET)
291 #define GECKO_I2C_IRQ_DEF(idx) static void i2c_gecko_config_func_##idx(const struct device *dev);
292 #define GECKO_I2C_IRQ_DATA(idx) .irq_config_func = i2c_gecko_config_func_##idx,
293 #define GECKO_I2C_IRQ_HANDLER(idx) \
294 static void i2c_gecko_config_func_##idx(const struct device *dev) \
295 { \
296 IRQ_CONNECT(DT_INST_IRQ(idx, irq), DT_INST_IRQ(idx, priority), i2c_gecko_isr, \
297 DEVICE_DT_INST_GET(idx), 0); \
298 irq_enable(DT_INST_IRQ(idx, irq)); \
299 }
300 #else
301 #define GECKO_I2C_IRQ_HANDLER(idx)
302 #define GECKO_I2C_IRQ_DEF(idx)
303 #define GECKO_I2C_IRQ_DATA(idx)
304 #endif
305
306 #define I2C_INIT(idx) \
307 PINCTRL_DT_INST_DEFINE(idx); \
308 GECKO_I2C_IRQ_DEF(idx); \
309 \
310 static const struct i2c_gecko_config i2c_gecko_config_##idx = { \
311 .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \
312 .base = (I2C_TypeDef *)DT_INST_REG_ADDR(idx), \
313 .clock = cmuClock_I2C##idx, \
314 .bitrate = DT_INST_PROP(idx, clock_frequency), \
315 GECKO_I2C_IRQ_DATA(idx)}; \
316 \
317 static struct i2c_gecko_data i2c_gecko_data_##idx; \
318 \
319 I2C_DEVICE_DT_INST_DEFINE(idx, i2c_gecko_init, NULL, &i2c_gecko_data_##idx, \
320 &i2c_gecko_config_##idx, POST_KERNEL, \
321 CONFIG_I2C_INIT_PRIORITY, &i2c_gecko_driver_api); \
322 \
323 GECKO_I2C_IRQ_HANDLER(idx)
324
325 DT_INST_FOREACH_STATUS_OKAY(I2C_INIT)
326
