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Searched refs:clock_subsys (Results 1 – 25 of 91) sorted by relevance

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/Zephyr-latest/drivers/dac/
Ddac_esp32.c24 clock_control_subsys_t clock_subsys; member
71 if (clock_control_on(cfg->clock_dev, (clock_control_subsys_t)cfg->clock_subsys) != 0) { in dac_esp32_init()
89 .clock_subsys = (clock_control_subsys_t) DT_INST_CLOCKS_CELL(id, offset), \
/Zephyr-latest/drivers/ethernet/eth_nxp_enet_qos/
Deth_nxp_enet_qos.c22 ret = clock_control_on(config->clock_dev, config->clock_subsys); in nxp_enet_qos_init()
36 .clock_subsys = (void *)DT_INST_CLOCKS_CELL_BY_IDX(n, 0, name), \
/Zephyr-latest/drivers/pinctrl/
Dpinctrl_nxp_port.c39 clock_control_subsys_t clock_subsys; member
65 err = clock_control_on(config->clock_dev, config->clock_subsys); in pinctrl_mcux_init()
90 .clock_subsys = (clock_control_subsys_t) \
/Zephyr-latest/drivers/mdio/
Dmdio_nxp_imx_netc.c21 clock_control_subsys_t clock_subsys; member
70 err = clock_control_get_rate(cfg->clock_dev, cfg->clock_subsys, &mdio_config.srcClockHz); in nxp_imx_netc_mdio_initialize()
94 .clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name), \
Dmdio_nxp_s32_gmac.c30 clock_control_subsys_t clock_subsys; member
129 if (clock_control_get_rate(cfg->clock_dev, cfg->clock_subsys, &data->clock_freq)) { in mdio_nxp_s32_init()
166 .clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name), \
Dmdio_nxp_enet.c22 clock_control_subsys_t clock_subsys; member
181 (void) clock_control_get_rate(config->clock_dev, config->clock_subsys, in nxp_enet_mdio_post_module_reset_init()
252 .clock_subsys = (void *) DT_CLOCKS_CELL_BY_IDX( \
Dmdio_esp32.c104 clock_control_subsys_t clock_subsys = in mdio_esp32_initialize() local
108 res = clock_control_on(clock_dev, clock_subsys); in mdio_esp32_initialize()
/Zephyr-latest/drivers/pwm/
Dpwm_silabs_siwx91x.c34 clock_control_subsys_t clock_subsys; member
190 ret = clock_control_on(config->clock_dev, config->clock_subsys); in pwm_siwx91x_init()
195 ret = clock_control_get_rate(config->clock_dev, config->clock_subsys, &pwm_frequency); in pwm_siwx91x_init()
227 .clock_subsys = (clock_control_subsys_t)DT_INST_PHA(inst, clocks, clkid), \
Dpwm_rv32m1_tpm.c29 clock_control_subsys_t clock_subsys; member
149 if (clock_control_on(config->clock_dev, config->clock_subsys)) { in rv32m1_tpm_init()
154 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in rv32m1_tpm_init()
192 .clock_subsys = (clock_control_subsys_t) \
Dpwm_mcux_tpm.c34 clock_control_subsys_t clock_subsys; member
154 if (clock_control_on(config->clock_dev, config->clock_subsys)) { in mcux_tpm_init()
159 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_tpm_init()
206 .clock_subsys = (clock_control_subsys_t) \
Dpwm_mcux_sctimer.c31 clock_control_subsys_t clock_subsys; member
53 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_sctimer_new_channel()
200 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_sctimer_pwm_get_cycles_per_sec()
260 .clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
Dpwm_mcux_qtmr.c28 clock_control_subsys_t clock_subsys; member
119 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, &clock_freq)) { in mcux_qtmr_pwm_get_cycles_per_sec()
166 .clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name), \
Dpwm_mcux.c27 clock_control_subsys_t clock_subsys; member
63 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_pwm_set_cycles_internal()
181 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_pwm_get_cycles_per_sec()
258 .clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
/Zephyr-latest/drivers/i2c/
Di2c_rv32m1_lpi2c.c28 clock_control_subsys_t clock_subsys; member
86 err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq); in rv32m1_lpi2c_configure()
223 err = clock_control_on(config->clock_dev, config->clock_subsys); in rv32m1_lpi2c_init()
229 err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq); in rv32m1_lpi2c_init()
273 .clock_subsys = \
/Zephyr-latest/drivers/watchdog/
Dwdt_silabs_siwx91x.c28 clock_control_subsys_t clock_subsys; member
227 ret = clock_control_on(config->clock_dev, config->clock_subsys); in siwx91x_wdt_init()
231 ret = clock_control_get_rate(config->clock_dev, config->clock_subsys, in siwx91x_wdt_init()
263 .clock_subsys = (clock_control_subsys_t)DT_INST_PHA(inst, clocks, clkid), \
Dwdt_mcux_wdog.c24 clock_control_subsys_t clock_subsys; member
87 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_wdog_install_timeout()
171 .clock_subsys = (clock_control_subsys_t)
Dwdt_esp32.c51 const clock_control_subsys_t clock_subsys; member
168 clock_control_on(config->clock_dev, config->clock_subsys); in wdt_esp32_init()
203 .clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(idx, offset), \
Dwdt_mcux_wdog32.c29 clock_control_subsys_t clock_subsys; member
102 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_wdog32_install_timeout()
199 .clock_subsys = (clock_control_subsys_t)
/Zephyr-latest/drivers/entropy/
Dentropy_esp32.c103 clock_control_subsys_t clock_subsys = in entropy_esp32_init() local
110 ret = clock_control_on(clock_dev, clock_subsys); in entropy_esp32_init()
/Zephyr-latest/drivers/ptp_clock/
Dptp_clock_nxp_enet.c26 struct device *clock_subsys; member
103 (void) clock_control_get_rate(config->clock_dev, config->clock_subsys, in ptp_clock_nxp_enet_rate_adjust()
166 (void) clock_control_get_rate(config->clock_dev, config->clock_subsys, in nxp_enet_ptp_clock_callback()
254 .clock_subsys = (void *) \
/Zephyr-latest/drivers/can/
Dcan_mcux_mcan.c28 clock_control_subsys_t clock_subsys; member
80 return clock_control_get_rate(mcux_config->clock_dev, mcux_config->clock_subsys, in mcux_mcan_get_core_clock()
111 err = clock_control_on(mcux_config->clock_dev, mcux_config->clock_subsys); in mcux_mcan_init()
208 .clock_subsys = (clock_control_subsys_t) \
/Zephyr-latest/drivers/interrupt_controller/
Dintc_rv32m1_intmux.c45 clock_control_subsys_t clock_subsys; member
148 .clock_subsys = UINT_TO_POINTER(DT_INST_CLOCKS_CELL(0, name)),
163 clock_control_on(config->clock_dev, config->clock_subsys); in rv32m1_intmux_init()
/Zephyr-latest/drivers/serial/
Duart_mcux_iuart.c20 clock_control_subsys_t clock_subsys; member
236 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_iuart_init()
246 clock_control_on(config->clock_dev, config->clock_subsys); in mcux_iuart_init()
265 clock_control_off(config->clock_dev, config->clock_subsys); in mcux_iuart_init()
330 .clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
Dserial_esp32_usb.c44 const clock_control_subsys_t clock_subsys; member
106 int ret = clock_control_on(config->clock_dev, config->clock_subsys); in serial_esp32_usb_init()
276 .clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(0, offset),
/Zephyr-latest/drivers/counter/
Dcounter_mcux_tpm.c27 clock_control_subsys_t clock_subsys; member
231 if (clock_control_on(config->clock_dev, config->clock_subsys)) {
236 if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
278 .clock_subsys = \

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