/Zephyr-latest/dts/bindings/power/ |
D | atmel,sam-supc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 Atmel SAM SUPC (Supply-Controller) controller 8 monitoring of the device. It have a special feature that it can wake-up the 9 device from a low-power state using special peripherals as wake-up sources. 11 The dedicated peripherals that can wake-up the core supply domain are: RTC, 13 inform the wakeup-source-id property on their respective nodes. 17 wakeup-source-id = <&supc SUPC_WAKEUP_SOURCE_RTC>; 21 The special peripheral will wake-up the device only when the standard property 22 wakeup-source is defined, e.g.: 26 wakeup-source; [all …]
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/Zephyr-latest/soc/st/stm32/stm32f4x/ |
D | power.c | 4 * SPDX-License-Identifier: Apache-2.0 36 /* According to datasheet (DS11139 Rev 8,Table 38.), wakeup with regulator in in pm_state_set() 37 * low-power mode takes typically 8us, max 13us more time than with the main in pm_state_set() 38 * regulator. We are using RTC as a wakeup source, which has a tick 62,5us. in pm_state_set() 39 * It means we have to add significant margin to the exit-latency anyway, in pm_state_set() 40 * so it is worth always using the low-power regulator. in pm_state_set() 67 LOG_DBG("Unsupported power substate-id %u", state); in pm_state_exit_post_ops()
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/Zephyr-latest/tests/kernel/sched/preempt/src/ |
D | main.c | 4 * SPDX-License-Identifier: Apache-2.0 18 * The wakeup test is repeated for all four combinations of threads 24 #error Preemption test requires single-CPU operation 73 /* Command to worker: use irq_offload() to indirect the wakeup? */ 76 /* Command to worker: sleep after wakeup? */ 79 /* Command to worker: yield after wakeup? */ 84 void wakeup_src_thread(int id) in wakeup_src_thread() argument 86 volatile k_tid_t src_thread = &worker_threads[id]; in wakeup_src_thread() 101 /* A little bit of white-box inspection: check that all the in wakeup_src_thread() 116 k_sem_give(&worker_sems[id]); in wakeup_src_thread() [all …]
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/Zephyr-latest/include/zephyr/pm/ |
D | device.h | 4 * SPDX-License-Identifier: Apache-2.0 43 /** Indicates if the device is being used as wakeup source. */ 116 * @retval -ENOTSUP If the requested action is not supported. 182 * be performed in the critical section as they are short and non-blocking. 271 * @param dev_id Device id. 285 * @param dev_id Device id. 299 * @param dev_id Device id. 312 * @param dev_id Device id. 326 * @note This macro is a no-op if @kconfig{CONFIG_PM_DEVICE} is not enabled. 328 * @param dev_id Device id. [all …]
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/Zephyr-latest/drivers/interrupt_controller/ |
D | intc_nxp_pint.c | 4 * SPDX-License-Identifier: Apache-2.0 7 /* Based on STM32 EXTI driver, which is (c) 2016 Open-RnD Sp. z o.o. */ 32 /* Tracks IRQ configuration for each pint interrupt source */ 34 /* Tracks pint interrupt source selected for each pin */ 45 /* Three parameters here- INPUTMUX base, the ID of the PINT slot, in attach_pin_to_pint() 58 * @brief Enable PINT interrupt source. 60 * @param pin: pin to use as interrupt source 61 * 0-64, corresponding to GPIO0 pin 1 - GPIO1 pin 31) 63 * @param wake: indicates if the pin should wakeup the system 71 /* Invalid pin ID */ in nxp_pint_pin_enable() [all …]
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/Zephyr-latest/boards/nxp/rd_rw612_bga/ |
D | rd_rw612_bga.dtsi | 2 * Copyright 2022-2024 NXP 4 * SPDX-License-Identifier: Apache-2.0 8 #include "rd_rw612_bga-pinctrl.dtsi" 9 #include <zephyr/dt-bindings/input/input-event-codes.h> 16 usart-0 = &flexcomm3; 18 i2c-0 = &flexcomm2; 20 dmic-dev = &dmic0; 21 mcuboot-button0 = &sw_4; 22 pwm-0 = &sctimer; 28 zephyr,code-partition = &slot0_partition; [all …]
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/Zephyr-latest/drivers/counter/ |
D | counter_mcux_lpc_rtc.c | 2 * Copyright 2021-23, NXP 4 * SPDX-License-Identifier: Apache-2.0 28 /* Device defined as wake-up source */ 38 const struct counter_config_info *info = dev->config; in mcux_lpc_rtc_isr() 41 struct mcux_lpc_rtc_data *data = dev->data; in mcux_lpc_rtc_isr() 43 uint32_t current = RTC_GetSecondsTimerCount(config->base); in mcux_lpc_rtc_isr() 47 if ((RTC_GetStatusFlags(config->base) & RTC_CTRL_ALARM1HZ_MASK) && in mcux_lpc_rtc_isr() 48 (data->alarm_callback)) { in mcux_lpc_rtc_isr() 49 cb = data->alarm_callback; in mcux_lpc_rtc_isr() 50 data->alarm_callback = NULL; in mcux_lpc_rtc_isr() [all …]
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D | counter_max32_timer.c | 4 * SPDX-License-Identifier: Apache-2.0 44 const struct max32_tmr_config *cfg = dev->config; in api_start() 46 Wrap_MXC_TMR_EnableInt(cfg->regs); in api_start() 47 MXC_TMR_Start(cfg->regs); in api_start() 54 const struct max32_tmr_config *cfg = dev->config; in api_stop() 56 Wrap_MXC_TMR_DisableInt(cfg->regs); in api_stop() 57 MXC_TMR_Stop(cfg->regs); in api_stop() 64 const struct max32_tmr_config *cfg = dev->config; in api_get_value() 66 *ticks = MXC_TMR_GetCount(cfg->regs); in api_get_value() 72 const struct max32_tmr_config *cfg = dev->config; in api_set_top_value() [all …]
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/Zephyr-latest/drivers/rtc/ |
D | rtc_pcf8523.c | 2 * Copyright (c) 2019-2023 Henrik Brix Andersen <henrik@brixandersen.dk> 4 * SPDX-License-Identifier: Apache-2.0 108 /* The PCF8523 only supports two-digit years, calculate offset to use */ 109 #define PCF8523_YEARS_OFFSET (2000 - 1900) 114 /* Helper macro to guard int1-gpios related code */ 152 const struct pcf8523_config *config = dev->config; in pcf8523_read_regs() 155 err = i2c_write_read_dt(&config->i2c, &addr, sizeof(addr), buf, len); in pcf8523_read_regs() 171 const struct pcf8523_config *config = dev->config; in pcf8523_write_regs() 178 err = i2c_write_dt(&config->i2c, block, sizeof(block)); in pcf8523_write_regs() 219 const struct pcf8523_config *config = dev->config; in pcf8523_int1_enable_unlocked() [all …]
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/Zephyr-latest/drivers/regulator/ |
D | regulator_npm2100.c | 3 * SPDX-License-Identifier: Apache-2.0 14 #include <zephyr/dt-bindings/regulator/npm2100.h> 110 uint8_t source; member 142 const struct regulator_npm2100_config *config = dev->config; in regulator_npm2100_count_voltages() 144 switch (config->source) { in regulator_npm2100_count_voltages() 157 const struct regulator_npm2100_config *config = dev->config; in regulator_npm2100_list_voltage() 159 switch (config->source) { in regulator_npm2100_list_voltage() 165 return -EINVAL; in regulator_npm2100_list_voltage() 171 const struct regulator_npm2100_config *config = dev->config; in regulator_npm2100_set_voltage() 175 switch (config->source) { in regulator_npm2100_set_voltage() [all …]
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/Zephyr-latest/dts/arm/atmel/ |
D | sam3x.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv7-m.dtsi> 8 #include <zephyr/dt-bindings/i2c/i2c.h> 9 #include <zephyr/dt-bindings/clock/atmel_sam_pmc.h> 17 zephyr,flash-controller = &eefc; 21 #address-cells = <1>; 22 #size-cells = <0>; 26 compatible = "arm,cortex-m3"; 33 compatible = "atmel,sam-pmc"; 36 #clock-cells = <2>; [all …]
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D | sam4s.dtsi | 5 * SPDX-License-Identifier: Apache-2.0 8 #include <arm/armv7-m.dtsi> 9 #include <zephyr/dt-bindings/adc/adc.h> 10 #include <zephyr/dt-bindings/i2c/i2c.h> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/pwm/pwm.h> 13 #include <zephyr/dt-bindings/clock/atmel_sam_pmc.h> 21 zephyr,flash-controller = &eefc; 25 #address-cells = <1>; 26 #size-cells = <0>; [all …]
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D | sam4e.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv7-m.dtsi> 8 #include <zephyr/dt-bindings/adc/adc.h> 9 #include <zephyr/dt-bindings/i2c/i2c.h> 10 #include <zephyr/dt-bindings/gpio/gpio.h> 11 #include <zephyr/dt-bindings/clock/atmel_sam_pmc.h> 19 zephyr,flash-controller = &eefc; 23 #address-cells = <1>; 24 #size-cells = <0>; 28 compatible = "arm,cortex-m4f"; [all …]
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D | same70.dtsi | 5 * SPDX-License-Identifier: Apache-2.0 8 #include <arm/armv7-m.dtsi> 9 #include <zephyr/dt-bindings/adc/adc.h> 10 #include <zephyr/dt-bindings/i2c/i2c.h> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/pwm/pwm.h> 13 #include <zephyr/dt-bindings/clock/atmel_sam_pmc.h> 21 zephyr,flash-controller = &eefc; 29 #address-cells = <1>; 30 #size-cells = <0>; [all …]
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/Zephyr-latest/boards/st/nucleo_l412rb_p/doc/ |
D | index.rst | 6 The Nucleo L412RB board features an ARM Cortex-M4 based STM32L412RB MCU 10 - STM32 microcontroller in LQFP64 package 11 - 1 user LED shared with ARDUINO |reg| 12 - 1 user and 1 reset push-buttons 13 - 32.768 kHz crystal oscillator 14 - Two types of extension resources: 16 - Arduino Uno V3 connectivity 17 - ST morpho extension pin headers for full access to all STM32 I/Os 19 - On-board ST-LINK debugger/programmer with USB re-enumeration capability: mass storage, Virtual CO… 20 - Flexible power-supply options: ST-LINK, USB VBUS, or external sources [all …]
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/Zephyr-latest/include/zephyr/bluetooth/classic/ |
D | sdp.h | 8 * SPDX-License-Identifier: Apache-2.0 49 #define BT_SDP_AUDIO_SOURCE_SVCLASS 0x110a /**< Audio Source */ 105 #define BT_SDP_VIDEO_SOURCE_SVCLASS 0x1303 /**< Video Source */ 109 #define BT_SDP_HDP_SOURCE_SVCLASS 0x1401 /**< HDP Source */ 123 * Possible values for attribute-id are listed below. 129 #define BT_SDP_ATTR_SVCLASS_ID_LIST 0x0001 /**< Service Class ID List */ 131 #define BT_SDP_ATTR_SERVICE_ID 0x0003 /**< Service ID */ 134 #define BT_SDP_ATTR_LANG_BASE_ATTR_ID_LIST 0x0006 /**< Language Base Attribute ID List */ 143 #define BT_SDP_ATTR_GROUP_ID 0x0200 /**< Group ID */ 164 #define BT_SDP_ATTR_FAX_CLASS2_SUPPORT 0x0304 /**< Fax Class 2 Support (vendor-specific)*/ [all …]
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/Zephyr-latest/dts/arm/st/wba/ |
D | stm32wba.dtsi | 2 * Copyright (c) 2023-2024 STMicroelectronics 4 * SPDX-License-Identifier: Apache-2.0 8 #include <arm/armv8-m.dtsi> 9 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> 10 #include <zephyr/dt-bindings/clock/stm32wba_clock.h> 11 #include <zephyr/dt-bindings/reset/stm32wba_reset.h> 12 #include <zephyr/dt-bindings/adc/stm32u5_adc.h> 13 #include <zephyr/dt-bindings/gpio/gpio.h> 14 #include <zephyr/dt-bindings/i2c/i2c.h> 15 #include <zephyr/dt-bindings/pwm/pwm.h> [all …]
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/Zephyr-latest/drivers/timer/ |
D | stm32_lptim_timer.c | 5 * SPDX-License-Identifier: Apache-2.0 34 #warning Kconfig for LPTIM source clock (LSI/LSE) is deprecated, use device tree. 37 /* Use Kconfig to configure source clocks fields */ 54 * - system clock based on an LPTIM instance, clocked by LSI or LSE 55 * - prescaler is set to a 2^value from 1 (division of the LPTIM source clock by 1) 56 * to 128 (division of the LPTIM source clock by 128) 57 * - using LPTIM AutoReload capability to trig the IRQ (timeout irq) 58 * - when timeout irq occurs the counter is already reset 59 * - the maximum timeout duration is reached with the lptim_time_base value 60 * - with prescaler of 1, the max timeout (LPTIM_TIMEBASE) is 2 seconds: [all …]
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/Zephyr-latest/boards/nxp/mimxrt595_evk/ |
D | mimxrt595_evk_mimxrt595s_cm33.dts | 2 * Copyright 2022-2023, NXP 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 10 #include <zephyr/dt-bindings/input/input-event-codes.h> 12 #include "mimxrt595_evk_mimxrt595s_cm33-pinctrl.dtsi" 16 model = "NXP MIMXRT595-EVK board"; 25 usart-0 = &flexcomm0; 30 pwm-0 = &sc_timer; 31 dmic-dev = &dmic0; 32 mcuboot-button0 = &user_button_1; [all …]
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/Zephyr-latest/soc/nxp/imxrt/imxrt11xx/ |
D | power.c | 4 * SPDX-License-Identifier: Apache-2.0 11 #include <zephyr/dt-bindings/power/imx_spc.h> 180 GPC_CPU_MODE_CTRL->CM_IRQ_WAKEUP_MASK[i] |= 0xFFFFFFFF; in gpc_configure_interrupts() 183 /* Enable GPT interrupt source for GPC- this is system timer */ in gpc_configure_interrupts() 195 GPC_SET_POINT_CTRL->SP_ROSC_CTRL = ~OSC_RC_16M_STBY_VAL; in gpc_init() 240 SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; in system_enter_sleep() 243 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in system_enter_sleep() 265 /* Mask debugger wakeup */ in cpu_mode_transition() 266 GPC_CPU_MODE_CTRL->CM_NON_IRQ_WAKEUP_MASK |= in cpu_mode_transition() 278 /* Execute WFI- GPC will receive sleep request from CPU */ in cpu_mode_transition() [all …]
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/Zephyr-latest/drivers/serial/ |
D | uart_mchp_xec.c | 2 * Copyright (c) 2010, 2012-2015 Wind River Systems, Inc. 6 * SPDX-License-Identifier: Apache-2.0 43 /* Clock source is 1.8432 MHz derived from PLL 48 MHz */ 45 /* Clock source is PLL 48 MHz output */ 47 /* Clock source is the UART_CLK alternate pin function. */ 57 #define REG_IIR 0x02 /* Interrupt ID reg. */ 81 #define IIR_MASK 0x07 /* interrupt id bits mask */ 82 #define IIR_ID 0x06 /* interrupt ID mask without NIP */ 97 * RXRDY pin will go inactive when there are no more charac- 102 * reached, the RXRDY pin will go low active. Once it is acti- [all …]
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/Zephyr-latest/include/zephyr/xen/public/ |
D | xen.h | 1 /* SPDX-License-Identifier: MIT */ 33 #include "arch-arm.h" 178 * DOMID_IO is used to restrict page-table updates to mapping I/O memory. 182 * aren't adjusted on the I/O-mapping code path). 194 * - HYPERVISOR_mmu_update()'s, HYPERVISOR_mmuext_op()'s, or 196 * - with XENMAPSPACE_gmfn_foreign, 212 /* Mask for valid domain id values */ 221 * Event channel endpoints per domain (when using the 2-level ABI): 231 * looking for changes to 'version'. If the least-significant bit of 245 * ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32) [all …]
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/Zephyr-latest/boards/nxp/mimxrt685_evk/ |
D | mimxrt685_evk_mimxrt685s_cm33.dts | 2 * Copyright 2020-2024 NXP 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 10 #include <zephyr/dt-bindings/pwm/pwm.h> 11 #include <zephyr/dt-bindings/input/input-event-codes.h> 13 #include "mimxrt685_evk-pinctrl.dtsi" 16 model = "NXP MIMXRT685-EVK board"; 25 usart-0 = &flexcomm0; 27 pwm-0 = &sc_timer; 28 pwm-led0 = &green_pwm_led; [all …]
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/Zephyr-latest/drivers/ethernet/ |
D | eth_lan9250.c | 1 /* LAN9250 Stand-alone Ethernet Controller with SPI 5 * SPDX-License-Identifier: Apache-2.0 26 const struct lan9250_config *config = dev->config; in lan9250_write_sys_reg() 43 return spi_write_dt(&config->spi, &tx); in lan9250_write_sys_reg() 48 const struct lan9250_config *config = dev->config; in lan9250_read_sys_reg() 72 return spi_transceive_dt(&config->spi, &tx, &rx); in lan9250_read_sys_reg() 89 return -EIO; in lan9250_wait_ready() 141 return -EIO; in lan9250_wait_mac_ready() 155 * https://github.com/microchip-pic-avr-solutions/ethernet-lan9250/ in lan9250_read_phy_reg() 189 * https://github.com/microchip-pic-avr-solutions/ethernet-lan9250/ in lan9250_write_phy_reg() [all …]
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/Zephyr-latest/dts/arm/st/u5/ |
D | stm32u5.dtsi | 7 * SPDX-License-Identifier: Apache-2.0 11 #include <arm/armv8-m.dtsi> 12 #include <zephyr/dt-bindings/adc/adc.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 14 #include <zephyr/dt-bindings/clock/stm32u5_clock.h> 15 #include <zephyr/dt-bindings/gpio/gpio.h> 16 #include <zephyr/dt-bindings/i2c/i2c.h> 17 #include <zephyr/dt-bindings/flash_controller/ospi.h> 18 #include <zephyr/dt-bindings/reset/stm32u5_reset.h> 19 #include <zephyr/dt-bindings/dma/stm32_dma.h> [all …]
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