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/Zephyr-latest/include/zephyr/drivers/dma/
Ddma_mcux_lpc.h18 * request line associated with this channel is used to pace DMA transfers.
46 * up to 1024 transfers in BURSTPOWER. The value set here will result in
47 * 2^BURSTPOWER transfers occurring. So for BURSTPOWER=3, 8 transfers would
/Zephyr-latest/drivers/mipi_dbi/
DKconfig.nxp_lcdic16 bool "Use DMA for transfers with LCDIC driver"
19 Use DMA for transfers when sending data with the LCDIC driver.
/Zephyr-latest/dts/bindings/dma/
Dgd,gd32-dma.yaml17 - 0x0: no address increment between transfers
18 - 0x1: increment address between transfers
21 - 0x0: no address increase between transfers
22 - 0x1: increase address between transfers
Dst,stm32u5-dma.yaml31 0x0: no address increment between transfers
32 0x1: increment address between transfers
34 0x0: no address increment between transfers
35 0x1: increment address between transfers
Dandestech,atcdmac300.yaml41 0x0: no address increment between transfers
42 0x1: increment address between transfers
44 0x0: no address increment between transfers
45 0x1: increment address between transfers
Dgd,gd32-dma-v1.yaml19 - 0x0: no address increment between transfers
20 - 0x1: increment address between transfers
23 - 0x0: no address increase between transfers
24 - 0x1: increase address between transfers
80 A single burst transfer transfers [(4 * fifo-threshold)] bytes using with DMA's FIFO.
Dst,stm32-dma-v1.yaml14 this value is 0 for Memory-to-memory transfers
25 0x0: STM32_DMA_PERIPH_NO_INC: no address increment between transfers
26 0x1: STM32_DMA_PERIPH_INC: increment address between transfers
28 0x0: STM32_DMA_MEM_NO_INC: no address increment between transfers
29 0x1: STM32_DMA_MEM_INC: increment address between transfers
Dst,stm32-dma-v2.yaml17 this value is 0 for Memory-to-memory transfers
32 0x0: STM32_DMA_PERIPH_NO_INC: no address increment between transfers
33 0x1: STM32_DMA_PERIPH_INC: increment address between transfers
35 0x0: STM32_DMA_MEM_NO_INC: no address increment between transfers
36 0x1: STM32_DMA_MEM_INC: increment address between transfers
Dst,stm32-dmamux.yaml21 0x0: no address increment between transfers
22 0x1: increment address between transfers
24 0x0: no address increment between transfers
25 0x1: increment address between transfers
Dst,stm32-bdma.yaml23 0x0: no address increment between transfers
24 0x1: increment address between transfers
26 0x0: no address increment between transfers
27 0x1: increment address between transfers
Dst,stm32-dma-v2bis.yaml26 0x0: STM32_DMA_PERIPH_NO_INC: no address increment between transfers
27 0x1: STM32_DMA_PERIPH_INC: increment address between transfers
29 0x0: STM32_DMA_MEM_NO_INC: no address increment between transfers
30 0x1: STM32_DMA_MEM_INC: increment address between transfers
/Zephyr-latest/drivers/i2c/
DKconfig.sc18im70423 bool "Verify SC18IM704 I2C transfers"
26 Verify the I2C state register after I2C transfers to detect errors.
DKconfig.max3219 transfers.
26 Use DMA for MAX32 MCU I2C controller mode transfers.
DKconfig.dw24 data transfers. All Tx operations are done using dma channel 0 and
/Zephyr-latest/drivers/usb/uhc/
DKconfig15 int "Number of transfers in the pool"
19 Number of UHC transfers available.
/Zephyr-latest/dts/bindings/i3c/
Di3c-controller.yaml23 Frequency of the SCL signal used for I3C transfers. When undefined,
29 Frequency of the SCL signal used for I2C transfers. When undefined
/Zephyr-latest/samples/drivers/audio/dmic/
DREADME.rst5 Perform PDM transfers using different configurations.
12 It performs two PDM transfers with different configurations (using one channel
/Zephyr-latest/samples/drivers/i2c/rtio_loopback/
DREADME.rst5 Perform I2C transfers between I2C controller and custom I2C target using RTIO.
10 This sample demonstrates how to perform I2C transfers, synchronously and async
/Zephyr-latest/drivers/dma/
Ddma_pl330.h19 * b0001 = 2 data transfers
20 * b0010 = 3 data transfers
23 * b1111 = 16 data transfers
/Zephyr-latest/samples/drivers/spi_flash/boards/
Db_u585i_iot02a.overlay8 /* channel 12-15 are for transfers to/from external memories */
/Zephyr-latest/doc/connectivity/bluetooth/api/mesh/
Ddfu_cli.rst8 transfers.
/Zephyr-latest/tests/drivers/dma/chan_blen_transfer/
DKconfig26 bool "Enable loop transfers of 16-beat bursts"
/Zephyr-latest/drivers/spi/
DKconfig.smartbond19 synchronous transfers.
DKconfig.xmc4xxx25 Enables DMA for SPI transfers.
/Zephyr-latest/drivers/video/
DKconfig.emul_imager16 driver uses to simulate MIPI transfers. This is the first field of

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