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/Zephyr-latest/soc/st/stm32/stm32f0x/
DKconfig.defconfig1 # ST Microelectronics STM32F0 MCU line
6 # Kconfig symbols common to STM32F0 series
10 rsource "Kconfig.defconfig.stm32f0*"
DKconfig.soc1 # ST Microelectronics STM32F0 MCU line
61 # STM32F0 Cube package advises to use 'stm32f030x6' code
DKconfig1 # ST Microelectronics STM32F0 MCU series
Dsoc.h8 * @file SoC configuration macros for the STM32F0 family processors.
Dsoc.c9 * @brief System/hardware module for STM32F0 processor
/Zephyr-latest/dts/bindings/clock/
Dst,stm32f0-pll-clock.yaml5 Main PLL node binding for STM32F0 and STM32F3 devices.
9 Note: Some STM32F0 SoC variants (STM32072 for instance) may also support HSI48
27 compatible: "st,stm32f0-pll-clock"
Dst,stm32f0-rcc.yaml5 STM32F0 and G0 Reset and Clock controller node.
8 compatible: "st,stm32f0-rcc"
/Zephyr-latest/dts/arm/st/f0/
Dstm32f030.dtsi7 #include <st/f0/stm32f0.dtsi>
11 compatible = "st,stm32f030", "st,stm32f0", "simple-bus";
Dstm32f031.dtsi7 #include <st/f0/stm32f0.dtsi>
11 compatible = "st,stm32f031", "st,stm32f0", "simple-bus";
55 /* All STM32F0 series have ADC VBAT channel, except STM32F0x0 value line */
Dstm32f072.dtsi11 compatible = "st,stm32f072", "st,stm32f0", "simple-bus";
Dstm32f070.dtsi11 compatible = "st,stm32f070", "st,stm32f0", "simple-bus";
Dstm32f071.dtsi20 compatible = "st,stm32f071", "st,stm32f0", "simple-bus";
Dstm32f091.dtsi11 compatible = "st,stm32f091", "st,stm32f0", "simple-bus";
Dstm32f042.dtsi21 compatible = "st,stm32f042", "st,stm32f0", "simple-bus";
Dstm32f051.dtsi11 compatible = "st,stm32f051", "st,stm32f0", "simple-bus";
Dstm32f0.dtsi79 compatible = "st,stm32f0-pll-clock";
104 compatible = "st,stm32f0-rcc";
/Zephyr-latest/boards/st/stm32f0_disco/
Dboard.yml3 full_name: STM32F0 Discovery
Dstm32f0_disco.yaml2 name: ST STM32F0 Discovery
/Zephyr-latest/tests/arch/arm/arm_irq_vector_table/
Dirq-vector-table.ld7 * table (like STM32F0). The symbol defined here is overriding the one in
/Zephyr-latest/samples/subsys/task_wdt/boards/
Dnucleo_f091rc.overlay8 * stm32F0 has a WWDG clock by APB1 where the APB1 prescaler is 1..16
/Zephyr-latest/include/zephyr/linker/
Dirq-vector-table-section.ld10 * table (like STM32F0). The symbol defined here is overriding the one in
/Zephyr-latest/dts/bindings/dma/
Dst,stm32-dma-v2bis.yaml5 STM32 DMA controller (V2bis) for the stm32F0, stm32F1 and stm32L1 soc families
/Zephyr-latest/scripts/build/
Duf2families.json104 "short_name": "STM32F0",
/Zephyr-latest/boards/st/stm32f0_disco/doc/
Dindex.rst6 The STM32F0 Discovery development board uses an STM32F051R8T6 MCU and
/Zephyr-latest/dts/arm/st/c0/
Dstm32c0.dtsi104 compatible = "st,stm32f0-rcc";

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