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/Zephyr-latest/dts/bindings/power-domain/
Dpower-domain-gpio.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "power-domain-gpio"
8 include: power-domain.yaml
11 enable-gpios:
12 type: phandle-array
18 provide the GPIO polarity and open-drain status in the phandle
19 selector. The Linux enable-active-high and gpio-open-drain
22 startup-delay-us:
25 description: Startup time, in microseconds
27 off-on-delay-us:
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/Zephyr-latest/dts/bindings/regulator/
Dnxp,vref.yaml1 # Copyright 2023-2024 NXP
2 # SPDX-License-Identifier: Apache-2.0
9 - name: base.yaml
10 - name: regulator.yaml
11 property-allowlist:
12 - regulator-name
13 - regulator-init-microvolt
14 - regulator-min-microvolt
15 - regulator-max-microvolt
16 - regulator-initial-mode
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Dregulator-fixed.yaml1 # Copyright 2019-2020 Peter Bigot Consulting, LLC
3 # SPDX-License-Identifier: Apache-2.0
8 - name: base.yaml
9 - name: regulator.yaml
10 property-allowlist:
11 - regulator-name
12 - regulator-boot-on
13 - regulator-always-on
14 - regulator-min-microvolt
15 - regulator-max-microvolt
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Dnordic,npm1300-regulator.yaml2 # SPDX-License-Identifier: Apache-2.0
16 compatible = "nordic,npm1300-regulator";
33 compatible: "nordic,npm1300-regulator"
38 dvs-gpios:
39 type: phandle-array
47 The effect of the mode change is defined by the enable-gpios
50 child-binding:
52 - name: regulator.yaml
53 property-allowlist:
54 - regulator-always-on
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Dregulator.yaml1 # Copyright 2019-2020, Peter Bigot Consulting, LLC
3 # SPDX-License-Identifier: Apache-2.0
14 regulator-name:
18 regulator-init-microvolt:
22 regulator-min-microvolt:
26 regulator-max-microvolt:
30 regulator-microvolt-offset:
34 regulator-init-microamp:
38 regulator-min-microamp:
42 regulator-max-microamp:
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Dregulator-gpio.yaml2 # SPDX-License-Identifier: Apache-2.0
5 GPIO-controlled voltage of regulators
8 vccq_sd0: regulator-vccq-sd0 {
9 compatible = "regulator-gpio";
11 regulator-name = "SD0 VccQ";
12 regulator-min-microvolt = <1800000>;
13 regulator-max-microvolt = <3300000>;
15 enable-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
20 regulator-boot-on;
28 - name: base.yaml
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/Zephyr-latest/tests/drivers/regulator/fixed/dts/
Dtest_common.dtsi3 * SPDX-License-Identifier: Apache-2.0
8 compatible = "regulator-fixed";
9 regulator-name = "test";
10 regulator-boot-on;
11 startup-delay-us = <1000000>;
12 off-on-delay-us = <20000>;
16 compatible = "test-regulator-fixed";
/Zephyr-latest/boards/olimex/olimex_esp32_evb/
Dolimex_esp32_evb_procpu.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "olimex_esp32_evb-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 model = "Olimex ESP32-EVB";
16 compatible = "olimex,esp32-evb", "espressif,esp32-wroom-32e", "espressif,esp32";
20 zephyr,shell-uart = &uart0;
23 zephyr,code-partition = &slot0_partition;
24 zephyr,bt-hci = &esp32_bt_hci;
33 compatible = "gpio-keys";
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/Zephyr-latest/boards/silabs/dev_kits/sltb010a/
Dthunderboard.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/input/input-event-codes.h>
11 zephyr,bt-c2h-uart = &usart1;
13 zephyr,shell-uart = &usart1;
14 zephyr,uart-pipe = &usart1;
20 compatible = "gpio-leds";
28 compatible = "gpio-keys";
36 wake_up_trigger: gpio-wake-up {
37 compatible = "silabs,gecko-wake-up-trigger";
43 compatible = "regulator-fixed";
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/Zephyr-latest/boards/silabs/dev_kits/xg27_dk2602a/
Dthunderboard.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/input/input-event-codes.h>
11 zephyr,bt-c2h-uart = &usart1;
13 zephyr,shell-uart = &usart1;
14 zephyr,uart-pipe = &usart1;
20 compatible = "gpio-leds";
28 compatible = "gpio-keys";
36 wake_up_trigger: gpio-wake-up {
37 compatible = "silabs,gecko-wake-up-trigger";
43 compatible = "regulator-fixed";
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/Zephyr-latest/soc/espressif/esp32/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
35 int "Extra delay in deep sleep wake stub (in us)"
43 without any extra delay, this time is approximately 900us, although
46 By default extra delay is set to 2000us. When optimizing startup time
/Zephyr-latest/dts/bindings/auxdisplay/
Dhit,hd44780.yaml4 # SPDX-License-Identifier: Apache-2.0
11 include: [auxdisplay-device.yaml]
17 description: Operating mode of display, 8-bit or 4 for 4-bit mode
19 - 4
20 - 8
22 register-select-gpios:
23 type: phandle-array
27 read-write-gpios:
28 type: phandle-array
31 enable-gpios:
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/Zephyr-latest/soc/nordic/nrf52/
DKconfig3 # Copyright (c) 2016-2023 Nordic Semiconductor ASA
4 # SPDX-License-Identifier: Apache-2.0
42 regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
69 gpio-as-nreset;
73 bool "The instruction cache (I-Cache)"
78 int "Anomaly 132 workaround delay (microseconds)"
84 window after stopping (230 us to 330 us). Software reset also stops the
86 to start at reboot. A delay is added before starting LF clock to ensure
87 that anomaly conditions are not met. Delay should be long enough to ensure
88 that clock is started later than 330 us after reset. If crystal oscillator
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/Zephyr-latest/boards/innblue/innblue21/
Dinnblue21_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
6 #include "innblue21_common-pinctrl.dtsi"
7 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 zephyr,shell-uart = &uart0;
16 zephyr,uart-mcumgr = &uart0;
20 compatible = "gpio-leds";
41 compatible = "gpio-keys";
50 en_3v3_sensor: enable-3v3-sensor {
51 compatible = "regulator-fixed";
52 regulator-name = "en_3v3_sensor";
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/Zephyr-latest/boards/seeed/xiao_ble/
Dxiao_ble_nrf52840_sense.dts2 * Copyright (c) 2022-2023 Marcin Niestroj
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/gpio/nordic-nrf-gpio.h>
14 compatible = "seeed,xiao-ble", "seeed,xiao-ble-sense";
16 msm261d3526hicpm-c-en {
17 compatible = "regulator-fixed";
18 enable-gpios = <&gpio1 10 (NRF_GPIO_DRIVE_S0H1 | GPIO_ACTIVE_HIGH)>;
19 regulator-name = "MSM261D3526HICPM-C-EN";
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/Zephyr-latest/boards/nxp/vmu_rt1170/
Dvmu_rt1170_mimxrt1176_cm7.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/led/led.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
24 pwm-led0 = &buzzer0;
25 mcuboot-button0 = &arming_button;
34 zephyr,shell-uart = &lpuart1;
36 zephyr,flash-controller = &mx25um51345g;
38 zephyr,code-partition = &slot0_partition;
39 zephyr,uart-mcumgr = &lpuart1;
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/Zephyr-latest/boards/innblue/innblue22/
Dinnblue22_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
6 #include "innblue22_common-pinctrl.dtsi"
7 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 zephyr,shell-uart = &uart0;
16 zephyr,uart-mcumgr = &uart0;
20 compatible = "gpio-leds";
41 compatible = "gpio-keys";
50 en_5v0_boost: enable-5v0-boost {
51 compatible = "regulator-fixed";
52 regulator-name = "en_5v0_boost";
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/Zephyr-latest/boards/arduino/nano_33_ble/
Darduino_nano_33_ble-common.dtsi4 * SPDX-License-Identifier: Apache-2.0
10 zephyr,shell-uart = &uart0;
11 zephyr,uart-mcumgr = &uart0;
12 zephyr,bt-mon-uart = &uart0;
13 zephyr,bt-c2h-uart = &uart0;
16 zephyr,code-partition = &code_partition;
21 compatible = "gpio-leds";
46 compatible = "pwm-leds";
67 compatible = "pwm-leds";
77 vdd_env: vdd-env {
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/Zephyr-latest/boards/nordic/thingy52/
Dthingy52_nrf52832.dts6 * SPDX-License-Identifier: Apache-2.0
9 /dts-v1/;
11 #include "thingy52_nrf52832-pinctrl.dtsi"
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "nordic,thingy52-nrf52832";
20 zephyr,shell-uart = &uart0;
21 zephyr,bt-mon-uart = &uart0;
22 zephyr,bt-c2h-uart = &uart0;
25 zephyr,code-partition = &slot0_partition;
39 compatible = "gpio-leds";
[all …]
/Zephyr-latest/dts/arm/nxp/
Dnxp_mcxw71.dtsi2 * Copyright 2023-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/clock/scg_k4.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/pwm/pwm.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
21 zephyr,bt-hci = &hci;
26 #address-cells = <1>;
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Dnxp_lpc55S3x_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h>
14 #include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
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/Zephyr-latest/boards/nxp/mimxrt1062_fmurt6/
Dmimxrt1062_fmurt6.dts2 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "mimxrt1062_fmurt6-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/pwm/pwm.h>
25 telem4-gps2 = &lpuart5;
29 zephyr,flash-controller = &s26ks512s0;
31 zephyr,code-partition = &slot0_partition;
32 zephyr,uart-mcumgr = &lpuart7;
37 zephyr,shell-uart = &lpuart7;
42 compatible = "gpio-leds";
[all …]
/Zephyr-latest/boards/nxp/rddrone_fmuk66/
Drddrone_fmuk66.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/pwm/pwm.h>
11 #include "rddrone_fmuk66-pinctrl.dtsi"
21 pwm-led0 = &red_pwm_led;
22 pwm-led1 = &green_pwm_led;
23 pwm-led2 = &blue_pwm_led;
25 red-pwm-led = &red_pwm_led;
26 green-pwm-led = &green_pwm_led;
27 blue-pwm-led = &blue_pwm_led;
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/Zephyr-latest/drivers/lora/
Dsx126x.c5 * SPDX-License-Identifier: Apache-2.0
196 LOG_DBG("-> status: 0x%" PRIx8, rx_req[1]); in SX126xReadCommand()
334 /* Delay in units of 15.625 us (1/64 ms) */ in SX126xIoTcxoInit()
402 * standby mode (via startup) in SX126xWakeup()
425 /* Re-enable the interrupt if we are not in sleep mode */ in sx126x_dio1_irq_work_handler()
433 const struct sx126x_config *config = dev->config; in sx126x_lora_init()
441 return -EIO; in sx126x_lora_init()
452 if (!spi_is_ready_dt(&config->bus)) { in sx126x_lora_init()
454 return -ENODEV; in sx126x_lora_init()
/Zephyr-latest/drivers/clock_control/
Dclock_control_mchp_xec.c4 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/dt-bindings/clock/mchp_xec_pcr.h>
30 * 32KHz period counter minimum for pass/fail: 16-bit
31 * 32KHz period counter maximum for pass/fail: 16-bit
32 * 32KHz duty cycle variation max for pass/fail: 16-bit
33 * 32KHz valid count minimum: 8-bit
35 * 32768 Hz period is 30.518 us
99 uint32_t RSVD4[(0x00c0 - 0x0094) / 4];
157 #define XEC_CC_VBATR_CS_XTAL_DHC BIT(10) /* disable high XTAL startup current */
192 uint8_t core_clk_div; /* Cortex-M4 clock divider (CPU and NVIC) */
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