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/Zephyr-latest/dts/bindings/reserved-memory/
Dnordic,owned-memory.yaml2 # SPDX-License-Identifier: Apache-2.0
5 Nordic Owned Memory
7 Memory region with permission attributes. Each enabled region of this kind
8 will be recorded in the UICR of the compiled domain. Memory ownership and
13 reserved-memory {
14 memory@2fc00000 {
15 compatible = "nordic,owned-memory";
23 A single local domain can request a memory region to be reserved on behalf of
24 multiple access owners. A single memory region shall be reserved by at most
32 Note: one domain can also reserve memory for another domain and not itself.
[all …]
/Zephyr-latest/boards/raytac/mdbt53_db_40/
Dpre_dt_board.cmake2 # SPDX-License-Identifier: Apache-2.0
5 # - flash-controller@39000 & kmu@39000
6 # - power@5000 & clock@5000
7 # - /reserved-memory/image@20000000 & /reserved-memory/image_s@20000000
8 list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
/Zephyr-latest/boards/raytac/mdbt53v_db_40/
Dpre_dt_board.cmake2 # SPDX-License-Identifier: Apache-2.0
5 # - flash-controller@39000 & kmu@39000
6 # - power@5000 & clock@5000
7 # - /reserved-memory/image@20000000 & /reserved-memory/image_s@20000000
8 list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
/Zephyr-latest/boards/ezurio/bl5340_dvk/
Dpre_dt_board.cmake2 # SPDX-License-Identifier: Apache-2.0
5 # - flash-controller@39000 & kmu@39000
6 # - power@5000 & clock@5000
7 # - /reserved-memory/image@20000000 & /reserved-memory/image_s@20000000
8 list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
/Zephyr-latest/boards/nordic/nrf5340_audio_dk/
Dpre_dt_board.cmake2 # SPDX-License-Identifier: Apache-2.0
5 # - flash-controller@39000 & kmu@39000
6 # - power@5000 & clock@5000
7 # - /reserved-memory/image@20000000 & /reserved-memory/image_s@20000000
8 list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
/Zephyr-latest/boards/nordic/nrf5340dk/
Dpre_dt_board.cmake2 # SPDX-License-Identifier: Apache-2.0
5 # - flash-controller@39000 & kmu@39000
6 # - power@5000 & clock@5000
7 # - /reserved-memory/image@20000000 & /reserved-memory/image_s@20000000
8 list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
/Zephyr-latest/boards/nordic/thingy53/
Dpre_dt_board.cmake2 # SPDX-License-Identifier: Apache-2.0
5 # - flash-controller@39000 & kmu@39000
6 # - power@5000 & clock@5000
7 # - /reserved-memory/image@20000000 & /reserved-memory/image_s@20000000
8 list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
/Zephyr-latest/boards/panasonic/pan1783/
Dpre_dt_board.cmake2 # SPDX-License-Identifier: Apache-2.0
5 # - flash-controller@39000 & kmu@39000
6 # - power@5000 & clock@5000
7 # - /reserved-memory/image@20000000 & /reserved-memory/image_s@20000000
8 list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
/Zephyr-latest/boards/nordic/nrf7002dk/
Dpre_dt_board.cmake2 # SPDX-License-Identifier: Apache-2.0
5 # - flash-controller@39000 & kmu@39000
6 # - power@5000 & clock@5000
7 # - /reserved-memory/image@20000000 & /reserved-memory/image_s@20000000
8 list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
/Zephyr-latest/dts/bindings/dma/
Dgd,gd32-dma.yaml2 # SPDX-License-Identifier: Apache-2.0
10 - bit 6-7: Direction (see dma.h)
11 - 0x0: MEMORY to MEMORY
12 - 0x1: MEMORY to PERIPH
13 - 0x2: PERIPH to MEMORY
14 - 0x3: reserved for PERIPH to PERIPH
16 - bit 9: Peripheral address increase
17 - 0x0: no address increment between transfers
18 - 0x1: increment address between transfers
20 - bit 10: Memory address increase
[all …]
Dst,stm32-bdma.yaml2 # SPDX-License-Identifier: Apache-2.0
7 The STM32 BDMA is a general-purpose direct memory access controller
11 described in the dma.txt file, using a four-cell specifier for each
13 1. channel: the bdma stream from 0 to <bdma-requests>
15 3. channel-config: A 32bit mask specifying the BDMA channel configuration
17 -bit 6-7 : Direction (see dma.h)
21 0x3: reserved for PERIPH to PERIPH
22 -bit 9 : Peripheral Increment Address
25 -bit 10 : Memory Increment Address
28 -bit 11-12 : Peripheral data size
[all …]
Dgd,gd32-dma-v1.yaml2 # SPDX-License-Identifier: Apache-2.0
12 - bit 6-7: Direction (see dma.h)
13 - 0x0: MEMORY to MEMORY
14 - 0x1: MEMORY to PERIPH
15 - 0x2: PERIPH to MEMORY
16 - 0x3: reserved for PERIPH to PERIPH
18 - bit 9: Peripheral address increase
19 - 0x0: no address increment between transfers
20 - 0x1: increment address between transfers
22 - bit 10: Memory address increase
[all …]
Dst,stm32u5-dma.yaml2 # SPDX-License-Identifier: Apache-2.0
9 DMA clients connected to the STM32 DMA controller must use a three-cell
17 dma-names = "tx", "rx";
20 1. channel: the stream or channel from 0 to (<dma-channels> - 1).
22 the slot is a value between <0> .. (<dma-requests> - 1).
23 3. channel-config: A 32bit mask specifying the DMA channel configuration
25 -bit 6-7 : Direction (see dma.h)
29 0x3: reserved for PERIPH to PERIPH
30 -bit 9 : Peripheral Increment Address
33 -bit 10 : Memory Increment Address
[all …]
Dst,stm32-dma-v2.yaml2 # SPDX-License-Identifier: Apache-2.0
10 described in the dma.txt file, using a four-cell specifier for each
13 described in the dma.txt file, using a 3-cell specifier for each
15 1. channel: the dma stream from 1 to <dma-requests>
17 this value is 0 for Memory-to-memory transfers
18 or a value between <1> .. <dma-generators> (not supported yet)
19 or a value between <dma-generators>+1 .. <dma-generators>+<dma-requests>
20 3. channel-config: A 32bit mask specifying the DMA channel configuration
23 -bit 5 : DMA cyclic mode config
26 -bit 6-7 : Direction (see dma.h)
[all …]
/Zephyr-latest/snippets/nordic-flpr/soc/
Dnrf54l15_cpuapp.overlay3 * SPDX-License-Identifier: Apache-2.0
8 reserved-memory {
9 #address-cells = <1>;
10 #size-cells = <1>;
17 cpuflpr_sram_code_data: memory@20028000 {
18 compatible = "mmio-sram";
20 #address-cells = <1>;
21 #size-cells = <1>;
28 status = "reserved";
37 execution-memory = <&cpuflpr_sram_code_data>;
[all …]
/Zephyr-latest/snippets/nordic-flpr-xip/soc/
Dnrf54l15_cpuapp.overlay3 * SPDX-License-Identifier: Apache-2.0
8 reserved-memory {
9 #address-cells = <1>;
10 #size-cells = <1>;
20 status = "reserved";
24 execution-memory = <&cpuflpr_code_partition>;
Dnrf54h20_cpuapp.overlay3 * SPDX-License-Identifier: Apache-2.0
7 execution-memory = <&cpuflpr_code_partition>;
8 /delete-property/ source-memory;
12 status = "reserved";
13 interrupt-parent = <&cpuflpr_clic>;
/Zephyr-latest/soc/espressif/esp32/
Dmemory.h3 * SPDX-License-Identifier: Apache-2.0
7 /* SRAM0 (192kB) instruction cache+memory */
12 /* SRAM1 (128kB) instruction/data memory */
19 #define SRAM1_USER_SIZE (0x40000000 - SRAM1_DRAM_USER_START)
21 /* SRAM2 (200kB) data memory */
27 #define SRAM2_DRAM_USER_SIZE (SRAM2_DRAM_END - SRAM2_DRAM_USER_START)
29 /** Simplified memory map for the bootloader.
30 * Make sure the bootloader can load into main memory without overwriting itself.
33 * - 0x3ffae000 - 0x3ffb0000 (Reserved: data memory for ROM functions)
34 * - 0x3ffb0000 - 0x3ffe0000 (RAM bank 1 for application usage)
[all …]
/Zephyr-latest/doc/develop/languages/c/
Dnewlib.rst13 Other 3rd-party toolchains, such as :ref:`toolchain_gnuarmemb`, also bundle
18 :file:`lib/libc/newlib/libc-hooks.c` and translate the library internal system
37 :kconfig:option:`CONFIG_NEWLIB_LIBC` and de-selecting the
45 size-optimized version of the Newlib, and supports all features that the full
77 Dynamic Memory Management
80 Newlib implements an internal heap allocator to manage the memory blocks used
81 by the standard dynamic memory management interface functions (for example,
87 requests larger memory chunks to the operating system and has a significantly
88 higher minimum memory requirement compared to that of the Nano Newlib
91 The only interface between the Newlib dynamic memory management functions and
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/Zephyr-latest/doc/kernel/memory_management/
Dvirtual_memory.rst3 Virtual Memory
6 Virtual memory (VM) in Zephyr provides developers with the ability to fine tune
7 access to memory. To utilize virtual memory, the platform must support
8 Memory Management Unit (MMU) and it must be enabled in the build. Due to
9 the target of Zephyr mainly being embedded systems, virtual memory
15 between physical and virtual memory address spaces, if demand paging
20 Basic virtual memory support does not utilize secondary storage to
21 extend usable memory. The maximum usable memory is the same as
22 the physical memory.
25 secondary storage as a backing store for virtual memory, thus
[all …]
/Zephyr-latest/snippets/nordic-ppr-xip/soc/
Dnrf54h20_cpuapp.overlay3 * SPDX-License-Identifier: Apache-2.0
11 execution-memory = <&cpuppr_code_partition>;
12 /delete-property/ source-memory;
16 status = "reserved";
Dnrf9280_cpuapp.overlay3 * SPDX-License-Identifier: Apache-2.0
11 execution-memory = <&cpuppr_code_partition>;
12 /delete-property/ source-memory;
16 status = "reserved";
/Zephyr-latest/drivers/dma/
Ddma_iproc_pax_v1.h4 * SPDX-License-Identifier: Apache-2.0
43 /* Bits 0:1 ignored by PAX DMA, i.e. 4-byte address alignment */
51 * Per-ring memory, with 8K & 4K alignment
54 * ensure aligned memory space.
64 uint64_t res1 : 20; /*reserved 35:16*/
67 uint64_t res2 : 13; /*reserved 55:43*/
71 uint64_t res3 : 1; /*reserved :59*/
78 uint64_t res1: 31; /*reserved 55:25*/
80 uint64_t res2: 2; /*reserved 61:60*/
87 uint64_t res : 14; /*reserved 48:61*/
[all …]
/Zephyr-latest/include/zephyr/kernel/internal/
Dmm.h4 * SPDX-License-Identifier: Apache-2.0
14 * @defgroup kernel_mm_internal_apis Kernel Memory Management Internal APIs
41 #define K_MEM_VIRT_OFFSET ((CONFIG_KERNEL_VM_BASE + CONFIG_KERNEL_VM_OFFSET) - \
56 #define K_MEM_PHYS_ADDR(virt) ((virt) - K_MEM_VIRT_OFFSET)
71 * @brief Kernel is mapped in virtual memory if defined.
75 #error "XIP and a virtual memory kernel are not allowed"
117 /* Should be identity-mapped */ in k_mem_phys_addr()
181 * Map a physical memory region into the kernel's virtual address space
183 * This function is intended for mapping memory-mapped I/O regions into
188 * The memory mapped via this function must be unmapped using
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/Zephyr-latest/boards/nordic/nrf9280pdk/
Dnrf9280pdk_nrf9280-memory_map.dtsi4 * SPDX-License-Identifier: Apache-2.0
6 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
9 reserved-memory {
10 /* The first 64kb are reserved for SecDom.
11 * The next 4kb are reserved for IPC between SecDom and Cellcore.
14 cpurad_ram0x_region: memory@2f011000 {
15 compatible = "nordic,owned-memory";
19 #address-cells = <1>;
20 #size-cells = <1>;
23 cpusec_cpurad_ipc_shm: memory@0 {
[all …]

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