/Zephyr-latest/samples/subsys/dap/ |
D | app.overlay | 4 * SPDX-License-Identifier: Apache-2.0 9 compatible = "zephyr,swdp-gpio"; 12 clk-gpios = <&arduino_header 10 GPIO_ACTIVE_HIGH>; /* D4 */ 13 noe-gpios = <&arduino_header 9 GPIO_ACTIVE_HIGH>; /* D3 */ 14 dio-gpios = <&arduino_header 8 GPIO_PULL_UP>; /* D2 */ 15 port-write-cycles = <2>;
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/Zephyr-latest/samples/subsys/dap/boards/ |
D | nrf52840dk_nrf52840.overlay | 4 * SPDX-License-Identifier: Apache-2.0 9 compatible = "zephyr,swdp-gpio"; 11 clk-gpios = <&arduino_header 10 GPIO_ACTIVE_HIGH>; /* D4 */ 12 dio-gpios = <&arduino_header 8 GPIO_PULL_UP>; /* D2 */ 13 dout-gpios = <&arduino_header 9 GPIO_ACTIVE_HIGH>; /* D3 */ 14 dnoe-gpios = <&arduino_header 12 GPIO_ACTIVE_HIGH>; /* D6 */ 15 noe-gpios = <&arduino_header 11 GPIO_ACTIVE_HIGH>; /* D5 */ 16 reset-gpios = <&arduino_header 13 GPIO_ACTIVE_HIGH>; /* D7 */ 17 port-write-cycles = <2>;
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/Zephyr-latest/dts/bindings/misc/ |
D | zephyr,swdp-gpio.yaml | 3 # SPDX-License-Identifier: Apache-2.0 6 This is a representation of the Serial Wire Debug Port interface 7 implementation by GPIO bit-banging. 9 Schematic using dual-supply bus transceiver and separate dout and dnoe pins 13 | +-------------+ | 14 +-------|vcca vccb|-----+ 16 clk-gpios -------|a b|-------------- SWD CLK 18 noe-gpios -------|dir gnd|-----+ 19 +-------------+ | 26 | +-------------+ | [all …]
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/Zephyr-latest/drivers/espi/ |
D | Kconfig.it8xxx2 | 2 # SPDX-License-Identifier: Apache-2.0 131 # Port 80 and 81 I/O cycles share the same interrupt source and there is no 135 # It means that the Host must alwasy write 2 bytes of data to port 80 otherwise 136 # port 81 data will not be updated. 142 This allows EC to accept 2 bytes of port 80 data written from the Host.
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D | espi_it8xxx2.c | 4 * SPDX-License-Identifier: Apache-2.0 189 /* I/O Port Base Address (data/command ports) */ 205 * This feature allows host access EC's memory directly by eSPI I/O cycles. 242 #define H2RAM_WINDOW_SIZE(ram_size) ((find_msb_set((ram_size) / 16) - 1) & 0x7) 257 const struct espi_it8xxx2_config *const config = dev->config; in smfi_it8xxx2_init() 259 (struct smfi_it8xxx2_regs *)config->base_smfi; in smfi_it8xxx2_init() 266 gctrl->GCTRL_H2ROFSR = in smfi_it8xxx2_init() 267 (gctrl->GCTRL_H2ROFSR & ~IT8XXX2_ESPI_H2RAM_OFFSET_MASK) | in smfi_it8xxx2_init() 274 smfi_reg->SMFI_HRAMW0BA = in smfi_it8xxx2_init() 277 smfi_reg->SMFI_HRAMW0AAS = in smfi_it8xxx2_init() [all …]
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/Zephyr-latest/include/zephyr/drivers/ |
D | swdp.h | 4 * SPDX-License-Identifier: Apache-2.0 9 * @brief Serial Wire Debug Port interface driver API 46 * @brief Write count bits to SWDIO from data LSB first 49 * @param count Number of bits to write 50 * @param data Bits to write 75 * @param idle_cycles Idle cycles between request and response 120 * @param turnaround Line turnaround cycles 139 * @brief Disable interface, set pins to High-Z mode
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/Zephyr-latest/soc/silabs/silabs_sim3/sim3u/ |
D | soc.c | 4 * SPDX-License-Identifier: Apache-2.0 25 * port bank pins into a high impedance digital input mode. in gpio_init() 92 /* VMON must be enabled for flash write/erase support */ in vmon_init() 104 __no_optimization static void busy_delay(uint32_t cycles) in busy_delay() argument 106 while (cycles) { in busy_delay() 107 cycles--; in busy_delay()
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/Zephyr-latest/drivers/flash/ |
D | flash_mcux_flexspi_nor.c | 4 * SPDX-License-Identifier: Apache-2.0 39 read-while-write hazards. This configuration is not recommended." 76 flexspi_port_t port; member 91 /* 1S-1S-1S flash read command, should be compatible with all SPI nor flashes */ 107 /* Standard 1S-1S-1S flash write command, can be switched to 1S-1S-4S when QE is set */ 155 .port = data->port, in flash_flexspi_nor_read_id_helper() 165 ret = memc_flexspi_transfer(&data->controller, &transfer); in flash_flexspi_nor_read_id_helper() 177 struct flash_flexspi_nor_data *data = dev->data; in flash_flexspi_nor_read_id() 187 .port = data->port, in flash_flexspi_nor_read_status() 197 return memc_flexspi_transfer(&data->controller, &transfer); in flash_flexspi_nor_read_status() [all …]
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D | spi_nor.c | 2 * Copyright (c) 2018 Savoir-Faire Linux. 8 * SPDX-License-Identifier: Apache-2.0 36 * * Some devices support a Deep Power-Down mode which reduces current 41 * * PM_DEVICE_STATE_SUSPENDED corresponds to deep-power-down mode; 63 #define DEV_CFG(_dev_) ((const struct spi_nor_config * const) (_dev_)->config) 66 /* MXICY Low-power/high perf mode is second bit in configuration register 2 */ 72 /* Build-time data associated with the device. */ 92 /* Expected JEDEC ID, from jedec-id property */ 96 /* Optional support for entering 32-bit address mode. */ 101 /* Length of BFP structure, in 32-bit words. */ [all …]
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/Zephyr-latest/drivers/spi/ |
D | spi_rpi_pico_pio.c | 4 * SPDX-License-Identifier: Apache-2.0 56 /* ------------ */ 58 /* ------------ */ 71 /* ------------ */ 73 /* ------------ */ 88 /* ------------------- */ 90 /* ------------------- */ 105 /* ------------------------- */ 107 /* ------------------------- */ 119 0x0042, /* 3: jmp x--, 2 side 0 */ [all …]
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/Zephyr-latest/drivers/i2c/ |
D | i2c_ite_it8xxx2.c | 4 * SPDX-License-Identifier: Apache-2.0 18 #include <zephyr/dt-bindings/i2c/it8xxx2-i2c.h> 25 #include "i2c-priv.h" 46 uint8_t port; member 79 /* Read or write byte counts. */ 114 /* Time-out error */ 134 const struct i2c_it8xxx2_config *config = dev->config; in i2c_parsing_return_value() 135 struct i2c_it8xxx2_data *data = dev->data; in i2c_parsing_return_value() 137 if (!data->err) { in i2c_parsing_return_value() 141 if (data->err == ETIMEDOUT) { in i2c_parsing_return_value() [all …]
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D | i2c_ite_enhance.c | 4 * SPDX-License-Identifier: Apache-2.0 23 #include "i2c-priv.h" 34 #define I2C_CQ_MODE_TX_MAX_PAYLOAD_SIZE (CONFIG_I2C_CQ_MODE_MAX_PAYLOAD_SIZE - 5) 39 * R/W (Read/ Write) decides the I2C read or write direction. 40 * 1: read, 0: write 65 uint8_t port; member 195 /* Read/Write */ 231 struct i2c_enhance_data *data = dev->data; in i2c_parsing_return_value() 233 if (!data->err) { in i2c_parsing_return_value() 238 if (data->err == ETIMEDOUT) { in i2c_parsing_return_value() [all …]
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/Zephyr-latest/subsys/dap/ |
D | cmsis_dap.c | 2 * Copyright (c) 2018-2019 PHYTEC Messtechnik GmbH 5 * SPDX-License-Identifier: Apache-2.0 9 * This file is based on DAP.c from CMSIS-DAP Source (Revision: V2.0.0) 10 * https://github.com/ARM-software/CMSIS_5/tree/develop/CMSIS/DAP/Firmware 11 * Copyright (c) 2013-2017 ARM Limited. All rights reserved. 12 * SPDX-License-Identifier: Apache-2.0 37 /* Idle cycles after transfer */ 51 MIN(CONFIG_CMSIS_DAP_PACKET_SIZE - 2, UINT8_MAX - 2), 54 MIN(CONFIG_CMSIS_DAP_PACKET_SIZE - 2, UINT8_MAX - 2), 57 MIN(CONFIG_CMSIS_DAP_PACKET_SIZE - 2, UINT8_MAX - 2), [all …]
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/Zephyr-latest/drivers/dp/ |
D | swdp_bitbang.c | 2 * Copyright (c) 2018-2019 PHYTEC Messtechnik GmbH 5 * SPDX-License-Identifier: Apache-2.0 9 * This file is based on SW_DP.c from CMSIS-DAP Source (Revision: V2.0.0) 10 * https://github.com/ARM-software/CMSIS_5/tree/develop/CMSIS/DAP/Firmware 11 * Copyright (c) 2013-2017, ARM Limited, All Rights Reserved 12 * SPDX-License-Identifier: Apache-2.0 16 /* Serial Wire Debug Port interface bit-bang driver */ 69 * - CMSIS-DAP Command Specification, DAP_Transfer 70 * - ARM Debug Interface v5 Architecture Specification 91 const struct sw_config *config = dev->config; in pin_swclk_set() [all …]
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/Zephyr-latest/soc/intel/intel_adsp/ace/ |
D | comm_widget.h | 2 * SPDX-License-Identifier: Apache-2.0 28 * Destination Port ID 31 * Destination Port ID received in message. 36 * Source Port ID 39 * Source Port ID received in message. 103 * 0: 16-bit address 104 * 1: 48-bit address 170 * 10: Non-posted message 202 * Downstream Source Port ID 203 * Source port ID register for ACE IP. [all …]
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/Zephyr-latest/drivers/display/ |
D | display_hx8394.c | 4 * SPDX-License-Identifier: Apache-2.0 176 0x7, /* EQ_DELAY_ON1 (in cycles of TCON CLK */ 177 0x7, /* EQ_DELAY_OFF1 (in cycles of TCON CLK */ 179 0x7, /* GPWR signal non overlap timing (in cycles of TCON */ 445 LOG_WRN("Write not supported, use LCD controller display driver"); in hx8394_write() 451 const struct hx8394_config *config = dev->config; in hx8394_blanking_off() 453 if (config->bl_gpio.port != NULL) { in hx8394_blanking_off() 454 return gpio_pin_set_dt(&config->bl_gpio, 1); in hx8394_blanking_off() 456 return -ENOTSUP; in hx8394_blanking_off() 462 const struct hx8394_config *config = dev->config; in hx8394_blanking_on() [all …]
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/Zephyr-latest/drivers/sdhc/ |
D | sdhc_spi.c | 4 * SPDX-License-Identifier: Apache-2.0 147 * to the card (this should result in 80 SCK cycles) in sdhc_spi_init_card() 149 const struct sdhc_spi_config *config = dev->config; in sdhc_spi_init_card() 150 struct sdhc_spi_data *data = dev->data; in sdhc_spi_init_card() 151 struct spi_config *spi_cfg = data->spi_cfg; in sdhc_spi_init_card() 154 if (spi_cfg->frequency == 0) { in sdhc_spi_init_card() 156 spi_cfg->frequency = SDMMC_CLOCK_400KHZ; in sdhc_spi_init_card() 160 if (pm_device_runtime_get(config->spi_dev) < 0) { in sdhc_spi_init_card() 161 return -EIO; in sdhc_spi_init_card() 165 spi_cfg->operation |= SPI_CS_ACTIVE_HIGH; in sdhc_spi_init_card() [all …]
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/Zephyr-latest/soc/nuvoton/npcx/common/reg/ |
D | reg_def.h | 4 * SPDX-License-Identifier: Apache-2.0 20 * must meet the alignment requirement of cortex-m4. 44 __ASSERT(reg == val, "16-bit reg access failed!"); \ 50 __ASSERT(reg == val, "32-bit reg access failed!"); \ 90 /* 0x102: High-Frequency Reference Divisor I */ 92 /* 0x104: High-Frequency Reference Divisor F */ 127 /* 0x008 - 0D: Power-Down Control 1 - 6 */ 130 /* 0x020 - 21: Power-Down Control 1 - 2 */ 133 /* 0x024: Power-Down Control 7 */ 137 /* PMC internal inline functions for multi-registers */ [all …]
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/Zephyr-latest/soc/altr/zephyr_nios2f/cpu/ |
D | ghrd_10m50da.sopcinfo | 1 <?xml version="1.0" encoding="UTF-8"?> 3 <!-- Format version 17.0 595 (Future versions may contain additional information.) --> 4 <!-- 2017.12.05.14:35:53 --> 5 <!-- A collection of modules and connections --> 53 <value>-1</value> 63 <value>-1</value> 73 <value>-1</value> 103 <!-- Describes a single module. Module parameters are 104 the requested settings for a module instance. --> 127 <value>altr,16550-FIFO64 ns16550a</value> [all …]
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/Zephyr-latest/dts/riscv/ |
D | riscv32-litex-vexriscv.dtsi | 2 * Copyright (c) 2018 - 2020 Antmicro <www.antmicro.com> 4 * SPDX-License-Identifier: Apache-2.0 7 #include <zephyr/dt-bindings/i2c/i2c.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 12 compatible = "litex,vexriscv", "litex-dev"; 21 #address-cells = <1>; 22 #size-cells = <0>; 24 clock-frequency = <100000000>; 25 compatible = "litex,vexriscv-standard", "riscv"; [all …]
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/Zephyr-latest/doc/releases/ |
D | release-notes-1.11.rst | 12 * Thread-level memory protection on x86, ARC and Arm, userspace and memory 15 * Initial Armv8-M architecture support. 20 * Firmware over-the-air (FOTA) updates over BLE using MCUmgr. 32 * SMP-aware scheduler 47 * Armv8-M initial architecture support, including the following cores: 49 * Arm Cortex-M23 50 * Arm Cortex-M33 74 * Refactored dts.fixup so common SoC-related fixes are in arch/<*>/soc 75 and board dts.fixup is only used for board-specific items. 82 * Added I2C master, QSPI flash, and GPIO drivers for nios-II [all …]
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D | release-notes-3.2.rst | 13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`). 15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`. 31 * CVE-2022-2993: Under embargo until 2022-11-03 33 * CVE-2022-2741: Under embargo until 2022-10-14 56 This definition can be used by third-party code to compile code conditional 58 Therefore, any third-party code integrated using the Zephyr build system will 91 changed from ``-ENETDOWN`` to ``-ENETUNREACH``. A return value of ``-ENETDOWN`` now indicates 129 * Removed support for configuring the CAN-FD maximum DLC value via Kconfig 156 valid for specific bindings to specify like :dtcompatible:`gpio-leds` and 157 :dtcompatible:`fixed-partitions`. [all …]
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D | release-notes-2.3.rst | 18 with future support for features like 64-bit and absolute timeouts in mind 21 * Zephyr now integrates with the TF-M (Trusted Firmware M) PSA-compliant 24 * The CMSIS-DSP library is now included and integrated 33 * CVE-2020-10022: UpdateHub Module Copies a Variable-Sized Hash String 34 into a fixed-size array. 35 * CVE-2020-10059: UpdateHub Module Explicitly Disables TLS 37 * CVE-2020-10061: Improper handling of the full-buffer case in the 39 * CVE-2020-10062: Packet length decoding error in MQTT 40 * CVE-2020-10063: Remote Denial of Service in CoAP Option Parsing Due 42 * CVE-2020-10068: In the Zephyr project Bluetooth subsystem, certain [all …]
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D | release-notes-1.14.rst | 17 * CVE-2020-10066 18 * CVE-2020-10069 19 * CVE-2020-13601 20 * CVE-2020-13602 32 * :github:`issuenumber` - issue title 34 * :github:`18334` - DNS resolution is broken for some addresses in master/2.0-pre 35 * :github:`19917` - Bluetooth: Controller: Missing LL_ENC_RSP after HCI LTK Negative Reply 36 * :github:`21107` - LL_ASSERT and 'Imprecise data bus error' in LL Controller 37 * :github:`21257` - tests/net/net_pkt failed on mimxrt1050_evk board. 38 * :github:`21299` - bluetooth: Controller does not release buffer on central side after peripheral … [all …]
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D | release-notes-4.0.rst | 15 is now the standard way to provide device-specific protection to data at rest. (:github:`76222`) 18 :ref:`ZMS <zms_api>` is a new key-value storage subsystem compatible with all non-volatile storage 20 write without erasure. 25 runtime configuration through vendor specific APIs. Initially the :dtcompatible:`nordic,nrf-comp`, 26 :dtcompatible:`nordic,nrf-lpcomp` and :dtcompatible:`nxp,kinetis-acmp` are supported. 31 Initially implemented drivers include a simple :dtcompatible:`zephyr,gpio-steppers` and a complex 32 sensor-less stall-detection capable with integrated ramp-controller :dtcompatible:`adi,tmc5041`. 50 directory for :zephyr:code-sample-category:`code samples <samples>`. 70 * :cve:`2024-8798`: Under embargo until 2024-11-22 71 * :cve:`2024-10395`: Under embargo until 2025-01-23 [all …]
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