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Searched full:polarity (Results 1 – 25 of 147) sorted by relevance

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/Zephyr-latest/dts/bindings/tcpc/
Dnuvoton,numaker-tcpc.yaml23 vconn-overcurrent-event-polarity:
26 Polarity of VCONN overcurrent event
31 vconn-discharge-polarity:
34 Polarity of VCONN discharge
39 vconn-enable-polarity:
42 Polarity of VCONN enable
47 vbus-overcurrent-event-polarity:
50 Polarity of VBUS overcurrent event
55 vbus-forceoff-event-polarity:
58 Polarity of VBUS force-off event
[all …]
/Zephyr-latest/include/zephyr/arch/x86/
Dx86_acpi.h10 * @param polarity the interrupt polarity received from ACPICA lib
14 uint32_t arch_acpi_encode_irq_flags(uint8_t polarity, uint8_t trigger);
/Zephyr-latest/arch/x86/core/
Dx86_acpi.c9 uint32_t arch_acpi_encode_irq_flags(uint8_t polarity, uint8_t trigger) in arch_acpi_encode_irq_flags() argument
19 if (polarity == ACPI_ACTIVE_HIGH) { in arch_acpi_encode_irq_flags()
21 } else if (polarity == ACPI_ACTIVE_LOW) { in arch_acpi_encode_irq_flags()
/Zephyr-latest/dts/bindings/pinctrl/
Dnuvoton,npcx-pinctrl.yaml18 - psl-in-pol: Select the assertion detection polarity of PSL input
73 psl-polarity:
76 A map to DEVALTn that configures detection polarity of PSL input pads.
96 The assertion detection polarity of PSL input selection
97 - "low-falling": Select the detection polarity to low/falling
98 - "high-rising": Select the detection polarity to high/rising
/Zephyr-latest/include/zephyr/dt-bindings/pwm/
Dpwm.h39 * @name PWM polarity flags
41 * or pwm_configure_capture() to specify the polarity of a PWM channel.
46 /** PWM pin normal polarity (active-high pulse). */
49 /** PWM pin inverted polarity (active-low pulse). */
/Zephyr-latest/dts/bindings/display/panel/
Dpanel-timing.yaml86 Polarity of horizontal sync pulse
97 Polarity of vertical sync pulse
108 Polarity of data enable, sent with each horizontal interval.
119 Polarity of pixel clock. Selects which edge to drive data to display on.
/Zephyr-latest/dts/bindings/sensor/
Dlm77.yaml21 When present, the polarity on the INT signal is inverted (active-high).
26 When present, the polarity on the T_CRIT_A signal is inverted
Dbosch,bmm150.yaml13 The polarity default is active high when sensor data is ready.
Dlm75.yaml20 When present, the polarity on the INT signal is inverted (active-high).
/Zephyr-latest/dts/bindings/sdhc/
Dzephyr,sdhc-spi-slot.yaml19 Clock polarity to use for SPI SDHC. Some cards respond properly
26 on the clock's polarity. When mode-cpol is set and this option as well,
/Zephyr-latest/dts/bindings/display/
Dftdi,ft800.yaml27 Polarity of PCLK. If it is set to zero, PCLK polarity is on
28 the rising edge. If it is set to one, PCLK polarity is on
Dst,stm32-ltdc.yaml16 Configure the GPIO polarity (active high/active low) according to LCD datasheet.
22 Configure the GPIO polarity (active high/active low) according to LCD datasheet.
Dgalaxycore,gc9x01x.yaml98 description: Gamma correction 1 register values (negative polarity)
122 description: Gamma correction 3 register values (positive polarity)
/Zephyr-latest/dts/bindings/pwm/
Dnxp,s32-emios-pwm.yaml23 polarity = "ACTIVE_HIGH";
32 polarity = "ACTIVE_LOW";
41 polarity = "ACTIVE_LOW";
127 polarity:
130 Output polarity for PWM channel.
/Zephyr-latest/dts/bindings/video/
Dst,stm32-dcmi.yaml66 Polarity of horizontal synchronization (DCMI_HSYNC_Polarity).
81 Polarity of vertical synchronization (DCMI_VSYNC_Polarity).
96 Polarity of pixel clock (DCMI_PIXCK_Polarity).
/Zephyr-latest/soc/nuvoton/npcx/common/
Dpinctrl_soc.h59 * @brief Suppoerted PSL input detection polarity in NPCX series
77 /** The polarity for peripheral device functionality. */
106 * such as detection polarity, port number, and so on.
111 /** Related register group for detection polarity of PSL input. */
113 /** Related register bit for detection polarity of PSL input. */
234 * @param prop Property name for pull-up/down configuration. (i.e. 'polarity')
/Zephyr-latest/drivers/dai/nxp/esai/
Desai.h71 /* invert a clock's polarity. This works because a clock's polarity
74 #define ESAI_INVERT_POLARITY(polarity) (polarity) = !(polarity) argument
227 /* HCLK polarity - LOW or HIGH */
232 /* BCLK polarity - LOW or HIGH */
237 /* FSYNC polarity - LOW or HIGH */
493 LOG_DBG("HCLK polarity: %d", cfg->hclk_polarity); in esai_dump_xceiver_config()
496 LOG_DBG("BCLK polarity: %d", cfg->bclk_polarity); in esai_dump_xceiver_config()
499 LOG_DBG("FSYNC polarity: %d", cfg->fsync_polarity); in esai_dump_xceiver_config()
/Zephyr-latest/soc/st/stm32/common/
Dstm32_wkup_pins.c42 * @brief flags for wake-up pin polarity configuration
122 bool polarity; /* True if detection on the low level : falling edge */ member
199 /* Set wake-up pin polarity */ in wkup_pin_setup()
200 if (wakeup_pin_cfg->polarity == STM32_PWR_WKUP_PIN_P_FALLING) { in wkup_pin_setup()
298 * get polarity config from GPIO flags specified in device "gpios" property in stm32_pwr_wkup_pin_cfg_gpio()
301 wakeup_pin_cfg.polarity = STM32_PWR_WKUP_PIN_P_FALLING; in stm32_pwr_wkup_pin_cfg_gpio()
303 wakeup_pin_cfg.polarity = STM32_PWR_WKUP_PIN_P_RISING; in stm32_pwr_wkup_pin_cfg_gpio()
/Zephyr-latest/include/zephyr/drivers/gpio/
Dgpio_cmsdk_ahb.h38 /* Offset: 0x030 (r/w) interrupt polarity set register */
40 /* Offset: 0x034 (r/w) interrupt polarity clear register */
/Zephyr-latest/drivers/pwm/
Dpwm_nxp_flexio.c103 enum pwm_nxp_flexio_polarity polarity; in pwm_nxp_flexio_set_cycles() local
134 polarity = FLEXIO_PWM_ACTIVE_HIGH; in pwm_nxp_flexio_set_cycles()
136 polarity = FLEXIO_PWM_ACTIVE_LOW; in pwm_nxp_flexio_set_cycles()
139 if (polarity == FLEXIO_PWM_ACTIVE_HIGH) { in pwm_nxp_flexio_set_cycles()
164 timerConfig.pinPolarity = polarity; in pwm_nxp_flexio_set_cycles()
262 /* Enable the pin out and set a default polarity for the selected timer */ in mcux_flexio_pwm_init()
/Zephyr-latest/tests/drivers/spi/spi_controller_peripheral/
DKconfig8 SPI mode value (clock polarity and phase) used in the test.
/Zephyr-latest/samples/sensor/qdec/boards/
Dnucleo_f401re.overlay22 st,input-polarity-inverted;
/Zephyr-latest/boards/nxp/mr_canhubk3/
Dmr_canhubk3.dts519 polarity = "ACTIVE_HIGH";
528 polarity = "ACTIVE_HIGH";
537 polarity = "ACTIVE_HIGH";
546 polarity = "ACTIVE_HIGH";
555 polarity = "ACTIVE_HIGH";
564 polarity = "ACTIVE_HIGH";
572 polarity = "ACTIVE_LOW";
611 polarity = "ACTIVE_LOW";
619 polarity = "ACTIVE_LOW";
/Zephyr-latest/soc/microchip/mec/common/reg/
Dmec_vci.h59 /* VCI Polarity register */
104 volatile uint32_t POLARITY; member
/Zephyr-latest/dts/bindings/mspi/
Dmspi-device.yaml70 MSPI clock polarity setting.
84 mspi-ce-polarity:
90 MSPI CE polarity. In most cases, it is active low.

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