1 /* 2 * Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef _MEC_VCI_H 8 #define _MEC_VCI_H 9 10 #include <stdint.h> 11 #include <stddef.h> 12 13 /* VCI Config register */ 14 #define MCHP_VCI_CFG_REG_OFS 0u 15 #define MCHP_VCI_CFG_REG_MASK 0x71f8fu 16 #define MCHP_VCI_CFG_IN_MASK 0x7fu 17 #define MCHP_VCI_CFG_IN0_HI 0x01u 18 #define MCHP_VCI_CFG_IN1_HI 0x02u 19 #define MCHP_VCI_CFG_IN2_HI 0x04u 20 #define MCHP_VCI_CFG_IN3_HI 0x08u 21 #define MCHP_VCI_CFG_IN4_HI 0x10u 22 #define MCHP_VCI_VCI_OVRD_IN_HI BIT(8) 23 #define MCHP_VCI_VCI_OUT_HI BIT(9) 24 #define MCHP_VCI_FW_CTRL_EN BIT(10) 25 #define MCHP_VCI_FW_EXT_SEL BIT(11) 26 #define MCHP_VCI_FILTER_BYPASS BIT(12) 27 #define MCHP_VCI_WEEK_ALARM BIT(16) 28 #define MCHP_VCI_RTC_ALARM BIT(17) 29 #define MCHP_VCI_SYS_PWR_PRES BIT(18) 30 31 /* VCI Latch Enable register */ 32 /* VCI Latch Reset register */ 33 #define MCHP_VCI_LE_REG_OFS 4u 34 #define MCHP_VCI_LR_REG_OFS 8u 35 #define MCHP_VCI_LER_REG_MASK 0x3007fu 36 #define MCHP_VCI_LER_IN_MASK 0x7fu 37 #define MCHP_VCI_LER_IN0 0x01u 38 #define MCHP_VCI_LER_IN1 0x02u 39 #define MCHP_VCI_LER_IN2 0x04u 40 #define MCHP_VCI_LER_IN3 0x08u 41 #define MCHP_VCI_LER_IN4 0x10u 42 #define MCHP_VCI_LER_WEEK_ALARM BIT(16) 43 #define MCHP_VCI_LER_RTC_ALARM BIT(17) 44 45 /* VCI Input Enable register */ 46 #define MCHP_VCI_INPUT_EN_REG_OFS 0x0cu 47 #define MCHP_VCI_INPUT_EN_REG_MASK 0x7fu 48 #define MCHP_VCI_INPUT_EN_IE_MASK 0x7fu 49 #define MCHP_VCI_INPUT_EN_IN0 0x01u 50 #define MCHP_VCI_INPUT_EN_IN1 0x02u 51 #define MCHP_VCI_INPUT_EN_IN2 0x04u 52 #define MCHP_VCI_INPUT_EN_IN3 0x08u 53 #define MCHP_VCI_INPUT_EN_IN4 0x10u 54 55 /* VCI Hold Off Count register */ 56 #define MCHP_VCI_HDO_REG_OFS 0x10u 57 #define MCHP_VCI_HDO_REG_MASK 0xffu 58 59 /* VCI Polarity register */ 60 #define MCHP_VCI_POL_REG_OFS 0x14u 61 #define MCHP_VCI_POL_REG_MASK 0x7fu 62 #define MCHP_VCI_POL_IE30_MASK 0x0Fu 63 #define MCHP_VCI_POL_ACT_HI_IN0 0x01u 64 #define MCHP_VCI_POL_ACT_HI_IN1 0x02u 65 #define MCHP_VCI_POL_ACT_HI_IN2 0x04u 66 #define MCHP_VCI_POL_ACT_HI_IN3 0x08u 67 #define MCHP_VCI_POL_ACT_HI_IN4 0x10u 68 69 /* VCI Positive Edge Detect register */ 70 #define MCHP_VCI_PDET_REG_OFS 0x18u 71 #define MCHP_VCI_PDET_REG_MASK 0x7fu 72 #define MCHP_VCI_PDET_IN0 0x01u 73 #define MCHP_VCI_PDET_IN1 0x02u 74 #define MCHP_VCI_PDET_IN2 0x04u 75 #define MCHP_VCI_PDET_IN3 0x08u 76 #define MCHP_VCI_PDET_IN4 0x10u 77 78 /* VCI Positive Edge Detect register */ 79 #define MCHP_VCI_NDET_REG_OFS 0x1cu 80 #define MCHP_VCI_NDET_REG_MASK 0x7fu 81 #define MCHP_VCI_NDET_IN0 0x01u 82 #define MCHP_VCI_NDET_IN1 0x02u 83 #define MCHP_VCI_NDET_IN2 0x04u 84 #define MCHP_VCI_NDET_IN3 0x08u 85 #define MCHP_VCI_NDET_IN4 0x10u 86 87 /* VCI Buffer Enable register */ 88 #define MCHP_VCI_BEN_REG_OFS 0x20u 89 #define MCHP_VCI_BEN_REG_MASK 0x7fu 90 #define MCHP_VCI_BEN_IE30_MASK 0x0fu 91 #define MCHP_VCI_BEN_IN0 0x01u 92 #define MCHP_VCI_BEN_IN1 0x02u 93 #define MCHP_VCI_BEN_IN2 0x04u 94 #define MCHP_VCI_BEN_IN3 0x08u 95 #define MCHP_VCI_BEN_IN4 0x10u 96 97 /** @brief VBAT powered control interface (VCI) */ 98 struct vci_regs { 99 volatile uint32_t CONFIG; 100 volatile uint32_t LATCH_EN; 101 volatile uint32_t LATCH_RST; 102 volatile uint32_t INPUT_EN; 103 volatile uint32_t HOLD_OFF; 104 volatile uint32_t POLARITY; 105 volatile uint32_t PEDGE_DET; 106 volatile uint32_t NEDGE_DET; 107 volatile uint32_t BUFFER_EN; 108 }; 109 110 #endif /* #ifndef _MEC_VCI_H */ 111
