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/Zephyr-latest/soc/atmel/sam0/common/
Dsoc_port.c16 int soc_port_pinmux_set(PortGroup *pg, uint32_t pin, uint32_t func) in soc_port_pinmux_set() argument
26 pg->PMUX[idx].bit.PMUXO = func; in soc_port_pinmux_set()
28 pg->PMUX[idx].bit.PMUXE = func; in soc_port_pinmux_set()
30 pg->PINCFG[pin].bit.PMUXEN = 1; in soc_port_pinmux_set()
37 PortGroup *pg = pin->regs; in soc_port_configure() local
43 pg->PINCFG[pin->pinum] = pincfg; in soc_port_configure()
44 pg->DIRCLR.reg = (1 << pin->pinum); in soc_port_configure()
45 pg->OUTCLR.reg = (1 << pin->pinum); in soc_port_configure()
48 soc_port_pinmux_set(pg, pin->pinum, func); in soc_port_configure()
54 pg->OUTSET.reg = (1 << pin->pinum); in soc_port_configure()
[all …]
Dsoc_port.h86 * @param pg PortGroup register
90 int soc_port_pinmux_set(PortGroup *pg, uint32_t pin, uint32_t func);
/Zephyr-latest/soc/microchip/mec/mec15xx/
Dsoc.c21 GIRQ_Type *pg; in soc_ecia_init() local
34 pg = &ECIA_REGS->GIRQ08; in soc_ecia_init()
36 pg->EN_CLR = 0xFFFFFFFFul; in soc_ecia_init()
37 pg->SRC = 0xFFFFFFFFul; in soc_ecia_init()
38 pg++; in soc_ecia_init()
/Zephyr-latest/dts/bindings/net/wireless/
Dnordic,nrf21540-fem.yaml100 Settling time in microseconds from state PG to TX.
109 Settling time in microseconds from state PG to RX.
118 Settling time in microseconds from state PD to PG.
127 Power-off time in microseconds when changing from RX or TX to PG.
/Zephyr-latest/boards/shields/waveshare_ups/
Dwaveshare_pico_ups_b.overlay13 pg = <3>;
/Zephyr-latest/samples/sensor/ina219/boards/
Dblackpill_f411ce.overlay17 pg = <0>;
/Zephyr-latest/cmake/linker/ld/gcc/
Dlinker_flags.cmake10 check_set_linker_property(TARGET linker APPEND PROPERTY gprof -pg)
/Zephyr-latest/drivers/sensor/ti/ina219/
Dina219.c85 (cfg->pg & INA219_PG_MASK) << INA219_PG_SHIFT | in ina219_set_config()
293 .pg = DT_INST_PROP(n, pg), \
Dina219.h53 uint8_t pg; member
/Zephyr-latest/drivers/flash/
Dflash_stm32g0x.c86 /* Set the PG bit */ in write_dword()
99 /* Clear the PG bit */ in write_dword()
Dflash_stm32l4x.c113 /* Set the PG bit */ in write_dword()
126 /* Clear the PG bit */ in write_dword()
Dflash_stm32g4x.c120 /* Set the PG bit */ in write_dword()
133 /* Clear the PG bit */ in write_dword()
Dflash_stm32wbx.c159 /* Set the PG bit */ in write_dword()
196 /* Clear the PG bit */ in write_dword()
Dflash_stm32f2x.c84 /* Clear the PG bit */ in write_byte()
Dflash_stm32f1x.c97 /* Clear the PG bit */ in write_disable()
Dflash_stm32h7x.c426 /* Set the PG bit */
446 /* Clear the PG bit */
/Zephyr-latest/dts/bindings/sensor/
Dti,ina219.yaml37 pg:
/Zephyr-latest/boards/intel/ish/doc/
Dindex.rst19 - 8KB AON RF space for code resident during deep D0i2/3 PG states.
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dnumaker-m46x-pinctrl.h1628 /* PG.0 MFP */
1638 /* PG.1 MFP */
1649 /* PG.2 MFP */
1659 /* PG.3 MFP */
1669 /* PG.4 MFP */
1676 /* PG.5 MFP */
1685 /* PG.6 MFP */
1694 /* PG.7 MFP */
1703 /* PG.8 MFP */
1712 /* PG.9 MFP */
[all …]
/Zephyr-latest/arch/posix/
DCMakeLists.txt139 target_link_options(native_simulator INTERFACE "-pg")
/Zephyr-latest/drivers/audio/
Dtlv320dac310x.c193 LOG_DBG("WR PG:%u REG:%02u VAL:0x%02x", in codec_write_reg()
210 LOG_DBG("RD PG:%u REG:%02u VAL:0x%02x", in codec_read_reg()
/Zephyr-latest/cmake/compiler/gcc/
Dcompiler_flags.cmake226 set_compiler_property(PROPERTY gprof -pg)
/Zephyr-latest/arch/x86/core/ia32/
Dcrt0.S87 /* Enable paging (CR0.PG, bit 31) / write protect (CR0.WP, bit 16) */
/Zephyr-latest/soc/intel/intel_adsp/ace/
Dpower.c111 * proper cpu restore after PG.
/Zephyr-latest/dts/arm/nxp/
Dnxp_rt11xx_cm4.dtsi38 * GPIO3, see pg. 1410 of RT1170 ref manual for example

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