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/Zephyr-latest/dts/bindings/auxdisplay/
Dhit,hd44780.yaml4 # SPDX-License-Identifier: Apache-2.0
11 include: [auxdisplay-device.yaml]
17 description: Operating mode of display, 8-bit or 4 for 4-bit mode
19 - 4
20 - 8
22 register-select-gpios:
23 type: phandle-array
27 read-write-gpios:
28 type: phandle-array
31 enable-gpios:
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/Zephyr-latest/drivers/auxdisplay/
Dauxdisplay_jhd1313.c4 * Copyright (c) 2022-2023 Jamie McCrae
6 * SPDX-License-Identifier: Apache-2.0
88 uint8_t command[2] = { addr, data }; in auxdisplay_jhd1313_reg_set() local
90 i2c_write(i2c, command, sizeof(command), JHD1313_BACKLIGHT_ADDR); in auxdisplay_jhd1313_reg_set()
95 const struct auxdisplay_jhd1313_config *config = dev->config; in auxdisplay_jhd1313_print()
102 rc = i2c_write_dt(&config->bus, buf, sizeof(buf)); in auxdisplay_jhd1313_print()
112 const struct auxdisplay_jhd1313_config *config = dev->config; in auxdisplay_jhd1313_cursor_position_set()
116 return -EINVAL; in auxdisplay_jhd1313_cursor_position_set()
128 return i2c_write_dt(&config->bus, data, 2); in auxdisplay_jhd1313_cursor_position_set()
134 const struct auxdisplay_jhd1313_config *config = dev->config; in auxdisplay_jhd1313_clear()
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/Zephyr-latest/drivers/display/
Ddisplay_hx8394.c4 * SPDX-License-Identifier: Apache-2.0
149 0x73, /* SPON delay */
150 0x74, /* SPOFF delay */
151 0x73, /* CON delay */
152 0x74, /* COFF delay */
153 0x73, /* CON1 delay */
154 0x74, /* COFF1 delay */
161 0x73, /* SPON_MPU delay */
162 0x74, /* SPOFF_MPU delay */
163 0x73, /* CON_MPU delay */
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/Zephyr-latest/drivers/sdhc/
Dimx_usdhc.c4 * SPDX-License-Identifier: Apache-2.0
101 struct usdhc_data *data = dev->data; in transfer_complete_cb()
104 data->transfer_status |= TRANSFER_DATA_FAILED; in transfer_complete_cb()
106 data->transfer_status |= TRANSFER_DATA_COMPLETE; in transfer_complete_cb()
108 data->transfer_status |= TRANSFER_CMD_FAILED; in transfer_complete_cb()
110 data->transfer_status |= TRANSFER_CMD_COMPLETE; in transfer_complete_cb()
112 k_sem_give(&data->transfer_sem); in transfer_complete_cb()
119 struct usdhc_data *data = dev->data; in sdio_interrupt_cb()
121 if (data->sdhc_cb) { in sdio_interrupt_cb()
122 data->sdhc_cb(dev, SDHC_INT_SDIO, data->sdhc_cb_user_data); in sdio_interrupt_cb()
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/Zephyr-latest/include/zephyr/bluetooth/
Dconn.h6 * Copyright (c) 2015-2016 Intel Corporation
8 * SPDX-License-Identifier: Apache-2.0
73 * Connection Interval: 30-50 ms
152 /** Maximum Link Layer transmission payload time in us. */
156 /** Maximum Link Layer reception payload time in us. */
164 /** Maximum Link Layer transmission payload time in us. */
171 * @param _tx_max_time Maximum Link Layer transmission payload time in us.
182 * @param _tx_max_time Maximum Link Layer transmission payload time in us.
208 * after a packet containing a Link Layer PDU with a non-zero Length
224 * a packet containing a Link Layer PDU with a non-zero Length
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Dbluetooth.h7 * Copyright (c) 2015-2016 Intel Corporation
9 * SPDX-License-Identifier: Apache-2.0
162 * If rpa sharing is enabled and rpa expired cb of any adv-sets belonging
163 * to same adv id returns false, then adv-sets will continue with old rpa
235 * This API will clear all configured identities and keys that are not persistently
239 * This API does _not_ clear previously registered callbacks
242 * That is, the application shall not re-register them when
243 * the Bluetooth subsystem is re-enabled later.
292 * @see https://specificationrefs.bluetooth.com/assigned-values/Appearance%20Values.pdf
325 * subsequent call to this function with non-NULL @a addrs parameter.
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/Zephyr-latest/subsys/bluetooth/controller/ll_sw/openisa/hal/RV32M1/radio/
Dradio.c2 * Copyright (c) 2016 - 2019 Nordic Semiconductor ASA
4 * Copyright 2019 - 2020 NXP
6 * SPDX-License-Identifier: Apache-2.0
43 #define RADIO_AESCCM_HDR_MASK 0xE3 /* AES-CCM: NESN, SN, MD bits masked to 0 */
44 #define RADIO_PDU_LEN_MAX (BIT(8) - 1)
46 ((bytes) * 8 >> (__builtin_ffs(bits_per_usec) - 1))
48 /* us values */
52 #define RX_WTMRK 5 /* (AA + PDU header) - 1 */
66 #define RADIO_DISABLE_TMR 4 /* us */
68 /* Delay needed in order to enter Manual DSM.
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/Zephyr-latest/include/zephyr/tracing/
Dtracing.h4 * SPDX-License-Identifier: Apache-2.0
27 * inner-working of the kernel and various other subsystems.
127 * @param us Duration in microseconds
129 #define sys_port_trace_k_thread_usleep_enter(us) argument
133 * @param us Duration in microseconds
136 #define sys_port_trace_k_thread_usleep_exit(us, ret) argument
496 * @param delay Delay period
498 #define sys_port_trace_k_work_schedule_for_queue_enter(queue, dwork, delay) argument
504 * @param delay Delay period
507 #define sys_port_trace_k_work_schedule_for_queue_exit(queue, dwork, delay, ret) argument
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/Zephyr-latest/drivers/espi/
Despi_saf_mchp_xec.c5 * SPDX-License-Identifier: Apache-2.0
20 /* SAF EC Portal read/write flash access limited to 1-64 bytes */
26 /* 64 bytes @ 24MHz quad is approx. 6 us */
44 * Delay before first Poll-1 command after suspend in 20 ns units
46 * Add delay between Poll STATUS1 commands in 20 ns units.
75 regs->SAF_CS_OP[cs].OP_DESCR = val; in mchp_saf_cs_descr_wr()
83 regs->SAF_CS0_CFG_P2M = val; in mchp_saf_poll2_mask_wr()
85 regs->SAF_CS1_CFG_P2M = val; in mchp_saf_poll2_mask_wr()
93 regs->SAF_CS0_CM_PRF = val; in mchp_saf_cm_prefix_wr()
95 regs->SAF_CS1_CM_PRF = val; in mchp_saf_cm_prefix_wr()
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Despi_saf_mchp_xec_v2.c5 * SPDX-License-Identifier: Apache-2.0
17 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
27 /* SAF EC Portal read/write flash access limited to 1-64 bytes */
35 /* 64 bytes @ 24MHz quad is approx. 6 us */
61 * Delay before first Poll-1 command after suspend in 20 ns units
63 * Add delay between Poll STATUS1 commands in 20 ns units.
99 regs->SAF_CS_OP[cs].OP_DESCR = val; in mchp_saf_cs_descr_wr()
107 regs->SAF_CS0_CFG_P2M = val; in mchp_saf_poll2_mask_wr()
109 regs->SAF_CS1_CFG_P2M = val; in mchp_saf_poll2_mask_wr()
117 regs->SAF_CS0_CM_PRF = val; in mchp_saf_cm_prefix_wr()
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Despi_mchp_xec.c4 * SPDX-License-Identifier: Apache-2.0
18 /* Minimum delay before acknowledging a virtual wire */
22 * 10 ms expressed in multiples of 100us
33 /* While issuing flash erase command, it should be ensured that the transfer
34 * length specified is non-zero.
116 * --------------------------------------------------------------------------------|
118 * --------------------------------------------------------------------------------|
120 * --------------------------------------------------------------------------------|
127 * --------------------------------------------------------------------------------|
129 * --------------------------------------------------------------------------------|
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Despi_mchp_xec_v2.c5 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
24 /* Minimum delay before acknowledging a virtual wire */
28 * 10 ms expressed in multiples of 100us
39 /* While issuing flash erase command, it should be ensured that the transfer
40 * length specified is non-zero.
61 ((struct espi_iom_regs *)ESPI_XEC_CONFIG(dev)->base_addr)
64 ((struct espi_msvw_ar_regs *)(ESPI_XEC_CONFIG(dev)->vw_base_addr))
70 (ESPI_XEC_CONFIG(dev)->vw_base_addr + ESPI_XEC_SMVW_REG_OFS))
77 * ------------------------------------------------------------------------|
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Despi_npcx.c4 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/dt-bindings/espi/npcx_espi.h>
32 /* mapping table between eSPI reset signal and wake-up input */
77 ((struct espi_reg *)((const struct espi_npcx_config *)(dev)->config)->base)
94 /* Minimum delay before acknowledging a virtual wire */
95 #define NPCX_ESPI_VWIRE_ACK_DELAY 10ul /* 10 us */
132 /* eSPI Virtual Wire Input (Master-to-Slave) signals configuration structure */
136 uint8_t bitmask; /* VW signal bits-mask */
140 /* eSPI Virtual Wire Output (Slave-to-Master) signals configuration structure */
144 uint8_t bitmask; /* VW signal bits-mask */
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/Zephyr-latest/subsys/mgmt/ec_host_cmd/backends/
Dec_host_cmd_backend_shi_npcx.c4 * SPDX-License-Identifier: Apache-2.0
32 #define HAL_INSTANCE(dev) (struct shi_reg *)(((const struct shi_npcx_config *)(dev)->config)->base)
48 * This affects the slowest SPI clock we can support. A delay of 8192 us permits a 512-byte request
62 * Space allocation of the past-end status byte (EC_SHI_PAST_END) in the out_msg buffer.
73 * one last past-end byte at the end so any additional bytes clocked out by
81 * overhead, as passed to the host command handler, must be 32-bit aligned.
87 SHI_STATE_NONE = -1,
117 /* Chip-select interrupts */
145 * With the workaround, CS assertion/de-assertion INT and SHI module's INT come from
173 if (atomic_test_and_set_bit(data->pm_policy_state_flag, flag) == 0) { in shi_npcx_pm_policy_state_lock_get()
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/Zephyr-latest/drivers/flash/
Dspi_nor.c2 * Copyright (c) 2018 Savoir-Faire Linux.
8 * SPDX-License-Identifier: Apache-2.0
36 * * Some devices support a Deep Power-Down mode which reduces current
41 * * PM_DEVICE_STATE_SUSPENDED corresponds to deep-power-down mode;
63 #define DEV_CFG(_dev_) ((const struct spi_nor_config * const) (_dev_)->config)
66 /* MXICY Low-power/high perf mode is second bit in configuration register 2 */
72 /* Build-time data associated with the device. */
92 /* Expected JEDEC ID, from jedec-id property */
96 /* Optional support for entering 32-bit address mode. */
101 /* Length of BFP structure, in 32-bit words. */
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/Zephyr-latest/drivers/ieee802154/
Dieee802154_dw1000.c4 * SPDX-License-Identifier: Apache-2.0
79 uint8_t rx_ns_sfd; /* non-standard SFD */
81 * (tx_shr_nsync + 1 + SFD_length - rx_pac_l)
136 .rx_sfd_to = (129 + 8 - 8),
158 struct dwt_context *ctx = dev->data; in dwt_spi_read()
159 const struct dwt_hi_cfg *hi_cfg = dev->config; in dwt_spi_read()
187 if (spi_transceive(hi_cfg->bus.bus, ctx->spi_cfg, &tx, &rx)) { in dwt_spi_read()
189 return -EIO; in dwt_spi_read()
202 struct dwt_context *ctx = dev->data; in dwt_spi_write()
203 const struct dwt_hi_cfg *hi_cfg = dev->config; in dwt_spi_write()
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Dieee802154_dw1000_regs.h4 * SPDX-License-Identifier: Apache-2.0
7 * https://github.com/Decawave/mynewt-dw1000-core.git
14 * Copyright (C) 2017-2018, Decawave Limited, All Rights Reserved
24 * http://www.apache.org/licenses/LICENSE-2.0
75 /* Frame Filtering Behave as a Co-ordinator */
83 /* Frame Filtering Allow MAC command frame reception */
117 * Receiver Auto-Re-enable.
118 * This bit is used to cause the receiver to re-enable automatically
126 /* System Time Counter (40-bit) */
180 * of non-standard values
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/Zephyr-latest/drivers/modem/
Dwncm14a2a.c4 * SPDX-License-Identifier: Apache-2.0
80 .cmd_len = (uint16_t)sizeof(cmd_)-1, \
191 while (length--) { in hexdump()
223 for (i = 0; i < (16 - (n % 16)); i++) { in hexdump()
278 sock->context = NULL; in socket_put()
279 sock->socket_id = 0; in socket_put()
280 (void)memset(&sock->src, 0, sizeof(struct sockaddr)); in socket_put()
281 (void)memset(&sock->dst, 0, sizeof(struct sockaddr)); in socket_put()
289 if (addr->sa_family == AF_INET6) { in wncm14a2a_sprint_ip_addr()
290 return net_addr_ntop(AF_INET6, &net_sin6(addr)->sin6_addr, in wncm14a2a_sprint_ip_addr()
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Dquectel-bg9x.c4 * SPDX-License-Identifier: Apache-2.0
12 #include "quectel-bg9x.h"
63 struct modem_data *data = dev->data; in modem_get_mac()
66 data->mac_addr[0] = 0x00; in modem_get_mac()
67 data->mac_addr[1] = 0x10; in modem_get_mac()
72 UNALIGNED_PUT(hash_value, (uint32_t *)(data->mac_addr + 2)); in modem_get_mac()
74 return data->mac_addr; in modem_get_mac()
127 return -EAGAIN; in on_cmd_sockread_common()
131 if (!data->rx_buf) { in on_cmd_sockread_common()
133 return -EINVAL; in on_cmd_sockread_common()
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Dhl7800.c4 * SPDX-License-Identifier: Apache-2.0
211 #define MDM_INVALID_SOCKET_ID -1
217 #define SIZE_WITHOUT_NUL(v) (sizeof(v) - SIZE_OF_NUL)
221 .cmd = cmd_, .cmd_len = (uint16_t)sizeof(cmd_) - 1, \
250 #define RSSI_UNKNOWN -999
294 /* The ? can be a + or - */
301 #define TIME_STRING_TO_TM_STRUCT_YEAR_OFFSET (2000 - 1900)
340 /* Complex has "no_id_resp" set to true because the sending command
341 * is the command used to process the response
373 static const char EOF_PATTERN[] = "--EOF--Pattern--";
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/Zephyr-latest/subsys/net/lib/lwm2m/
Dlwm2m_rd_client.c3 * Copyright (c) 2017-2019 Foundries.io
5 * SPDX-License-Identifier: Apache-2.0
227 if (event > LWM2M_RD_CLIENT_EVENT_NONE && client.ctx->event_cb) { in set_sm_state_delayed()
228 client.ctx->event_cb(client.ctx, event); in set_sm_state_delayed()
328 if (event > LWM2M_RD_CLIENT_EVENT_NONE && client.ctx->event_cb) { in sm_handle_timeout_state()
329 client.ctx->event_cb(client.ctx, event); in sm_handle_timeout_state()
358 if (event > LWM2M_RD_CLIENT_EVENT_NONE && client.ctx->event_cb) { in sm_handle_failure_state()
359 client.ctx->event_cb(client.ctx, event); in sm_handle_failure_state()
371 client.ctx->sec_obj_inst = -1; in socket_fault_cb()
377 * after receiving Ack to Bootstrap-Finish command. in socket_fault_cb()
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/Zephyr-latest/subsys/bluetooth/controller/ll_sw/
Dull_central_iso.c4 * SPDX-License-Identifier: Apache-2.0
152 * - Calculate ISO_Interval to allow SDU_Interval < ISO_Interval
187 /* CIG does not exist - create it */ in ll_cig_parameters_commit()
195 cig->lll.num_cis = 0U; in ll_cig_parameters_commit()
198 } else if (cig->state != CIG_STATE_CONFIGURABLE) { in ll_cig_parameters_commit()
204 num_cis = cig->lll.num_cis; in ll_cig_parameters_commit()
206 /* Transfer parameters from configuration cache and clear LLL fields */ in ll_cig_parameters_commit()
209 cig->state = CIG_STATE_CONFIGURABLE; in ll_cig_parameters_commit()
212 cig->lll.handle = ll_conn_iso_group_handle_get(cig); in ll_cig_parameters_commit()
213 cig->lll.role = BT_HCI_ROLE_CENTRAL; in ll_cig_parameters_commit()
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Disoal.c4 * SPDX-License-Identifier: Apache-2.0
100 * Zero-init entire ISO-AL state
109 * @brief Initialize ISO-AL
146 * @return Validity - valid if time_after leads time_before with
160 if ((time_before - time_after) <= ISOAL_TIME_SPAN_HALF_US) { in isoal_get_time_diff()
164 *result = time_after + ISOAL_TIME_SPAN_FULL_US - time_before; in isoal_get_time_diff()
172 *result = time_after - time_before; in isoal_get_time_diff()
197 * @brief Find free sink from statically-sized pool and allocate it
248 * @param stream_sync_delay[in] CIS / BIS sync delay
249 * @param group_sync_delay[in] CIG / BIG sync delay
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/Zephyr-latest/doc/releases/
Drelease-notes-2.1.rst13 * Expanded support for ARMv6-M architecture.
50 hardware-based stack overflow detection) in ARMv6-M architecture
51 * Added QEMU support for ARMv6-M architecture
52 * Extended test coverage for ARM-specific kernel features in ARMv6-M
54 * Enhanced runtime MPU programming in ARMv8-M architecture, making
55 the full partitioning of kernel SRAM memory a user-configurable
57 * Added CMSIS support for Cortex-R architectures.
59 * Added missing Cortex-R CPU device tree bindings.
60 * Fixed incorrect Cortex-R device tree specification.
68 * RISC-V:
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Drelease-notes-3.3.rst14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery)
17 CMSIS-DSP as the default backend.
30 * CVE-2023-0359: Under embargo until 2023-04-20
32 * CVE-2023-0779: Under embargo until 2023-04-22
66 removed in favor of new :dtcompatible:`zephyr,flash-disk` devicetree binding.
71 * Starting from this release ``zephyr-`` prefixed tags won't be created
82 image states). Use of a truncated hash or non-sha256 hash will still work
88 registration function at boot-up. If applications register this then
93 application code, these will now automatically be registered at boot-up (this
129 This may cause out-of-tree scripts or commands to fail if they have relied
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