Searched +full:bus +full:- +full:select +full:- +full:gpios (Results 1 – 25 of 49) sorted by relevance
12
| /Zephyr-latest/dts/bindings/wifi/ |
| D | infineon,airoc-wifi-spi.yaml | 2 AIROC Wi-Fi Connectivity over SPI.
4 compatible: "infineon,airoc-wifi"
6 include: [spi-device.yaml, "infineon,airoc-wifi.yaml"]
9 wifi-host-wake-gpios:
12 bus-select-gpios:
15 Select bus mode. This gpio must be held low before
16 wifi-reg-on-gpios goes high to select SPI bus mode.
17 type: phandle-array
19 spi-half-duplex:
21 Use half-duplex communication; if not present, full-
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| /Zephyr-latest/include/zephyr/devicetree/ |
| D | spi.h | 9 * SPDX-License-Identifier: Apache-2.0
20 * @defgroup devicetree-spi Devicetree SPI API
26 * @brief Does a SPI controller node have chip select GPIOs configured?
28 * SPI bus controllers use the "cs-gpios" property for configuring
29 * chip select GPIOs. Its value is a phandle-array which specifies the
30 * chip select lines.
36 * cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,
49 * @param spi a SPI bus controller node identifier
50 * @return 1 if "spi" has a cs-gpios property, 0 otherwise
55 * @brief Number of chip select GPIOs in a SPI controller's cs-gpios property
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| /Zephyr-latest/drivers/sensor/bosch/bmg160/ |
| D | Kconfig | 4 # SPDX-License-Identifier: Apache-2.0
10 select I2C
17 prompt "BMG160 I2C bus speed"
23 Standard bus speed of up to 100kHz.
28 Fast bus speed of up to 400KHz.
43 depends on $(dt_compat_any_has_prop,$(DT_COMPAT_BOSCH_BMG160),int-gpios)
44 select BMG160_TRIGGER
49 depends on $(dt_compat_any_has_prop,$(DT_COMPAT_BOSCH_BMG160),int-gpios)
50 select BMG160_TRIGGER
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| /Zephyr-latest/drivers/sensor/ti/tmag5170/ |
| D | Kconfig | 1 # Texas Instruments TMAG5170 high-precision, linear 3D Hall-effect sensor with SPI bus interface
4 # SPDX-License-Identifier: Apache-2.0
7 bool "TMAG5170 SPI Hall-effect sensor driver"
10 select SPI
12 Enable driver for TMAG5170 Hall-effect sensor driver
27 depends on $(dt_compat_any_has_prop,$(DT_COMPAT_TI_TMAG5170),int-gpios)
28 select TMAG5170_TRIGGER
33 depends on $(dt_compat_any_has_prop,$(DT_COMPAT_TI_TMAG5170),int-gpios)
34 select TMAG5170_TRIGGER
39 depends on $(dt_compat_any_has_prop,$(DT_COMPAT_TI_TMAG5170),int-gpios)
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| /Zephyr-latest/dts/bindings/mipi-dbi/ |
| D | zephyr,mipi-dbi-bitbang.yaml | 3 # SPDX-License-Identifier: Apache-2.0
6 MIPI-DBI Mode A and B bit banging controller. This driver emulates MIPI DBI mode A and B (6800
9 compatible: "zephyr,mipi-dbi-bitbang"
11 include: ["mipi-dbi-controller.yaml", "pinctrl-device.yaml"]
15 dc-gpios:
16 type: phandle-array
21 reset-gpios:
22 type: phandle-array
27 rd-gpios:
28 type: phandle-array
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| D | nxp,mipi-dbi-flexio-lcdif.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,mipi-dbi-flexio-lcdif"
8 include: [mipi-dbi-controller.yaml, base.yaml, pinctrl-device.yaml]
11 shifters-count:
17 timers-count:
23 enwr-pin:
27 Pin select for WR(8080 mode), EN(6800 mode).
29 rd-pin:
32 Pin select for RD(8080 mode), not used in 6800 mode.
34 data-pin-start:
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| /Zephyr-latest/dts/bindings/spi/ |
| D | spi-controller.yaml | 1 # Copyright (c) 2018, I-SENSE group of ICCS
2 # SPDX-License-Identifier: Apache-2.0
8 bus: spi
11 clock-frequency:
15 "#address-cells":
18 "#size-cells":
21 cs-gpios:
22 type: phandle-array
24 An array of chip select GPIOs to use. Each element
31 cs-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>,
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| /Zephyr-latest/samples/drivers/auxdisplay/boards/ |
| D | nucleo_f746zg.overlay | 2 * Copyright (c) 2022-2023 Jamie McCrae
4 * SPDX-License-Identifier: Apache-2.0
14 register-select-gpios = <&gpiob 8 (GPIO_ACTIVE_HIGH)>;
15 enable-gpios = <&gpiob 9 (GPIO_ACTIVE_HIGH)>;
16 data-bus-gpios = <0>, <0>, <0>, <0>,
24 /delete-node/ &spi1;
|
| D | esp_wrover_kit.overlay | 9 gpio-controller;
11 #gpio-cells = <2>;
21 boot-delay-ms = <100>;
22 enable-line-rise-delay-us = <1000>;
23 enable-line-fall-delay-us = <500>;
24 register-select-gpios = <&aux_display_gpio 0 (GPIO_ACTIVE_HIGH)>;
25 read-write-gpios = <&aux_display_gpio 1 (GPIO_ACTIVE_HIGH)>;
26 enable-gpios = <&aux_display_gpio 2 (GPIO_ACTIVE_HIGH)>;
27 backlight-gpios = <&aux_display_gpio 3 (GPIO_ACTIVE_HIGH)>;
28 data-bus-gpios = <0>, <0>, <0>, <0>,
|
| /Zephyr-latest/boards/raspberrypi/rpi_pico/ |
| D | rpi_pico_rp2040_w.dts | 2 * Copyright (c) 2023 Dave Rensberger - Beechwoods Software
5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include "rpi_pico-common.dtsi"
14 /* gpio 25 is used for chip select, not assigned to the PIO */
24 input-enable;
33 input-enable;
42 compatible = "raspberrypi,pico-spi-pio";
44 #address-cells = <1>;
45 #size-cells = <0>;
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| /Zephyr-latest/dts/bindings/watchdog/ |
| D | nxp,fs26-wdog.yaml | 2 # SPDX-License-Identifier: Apache-2.0
15 The FS26 uses a 32-bit SPI interface. The MCU is the primary driving MOSI and
17 in a SPI bus. For example, if FS26 is connected to spi3 bus, on Chip Select 0:
24 compatible = "nxp,fs26-wdog";
26 spi-max-frequency = <DT_FREQ_M(5)>;
28 int-gpios = <&gpioa_h 3 GPIO_ACTIVE_LOW>;
37 indicated through int-gpios property. It is also required to configure the
40 compatible: "nxp,fs26-wdog"
42 include: spi-device.yaml
49 - simple
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| /Zephyr-latest/dts/bindings/auxdisplay/ |
| D | hit,hd44780.yaml | 4 # SPDX-License-Identifier: Apache-2.0
11 include: [auxdisplay-device.yaml]
17 description: Operating mode of display, 8-bit or 4 for 4-bit mode
19 - 4
20 - 8
22 register-select-gpios:
23 type: phandle-array
25 description: GPIO connected to Register Select (RS) of LCD
27 read-write-gpios:
28 type: phandle-array
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| /Zephyr-latest/dts/bindings/mspi/ |
| D | mspi-controller.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 bus: mspi
11 clock-frequency:
15 "#address-cells":
18 "#size-cells":
22 op-mode:
25 - "MSPI_CONTROLLER"
26 - "MSPI_PERIPHERAL"
34 - "MSPI_HALF_DUPLEX"
35 - "MSPI_FULL_DUPLEX"
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| /Zephyr-latest/doc/hardware/peripherals/sensor/ |
| D | device_tree.rst | 10 .. code-block:: dts
12 #include <zephyr/dt-bindings/icm42688.h>
15 /* SPI bus options here, not shown */
20 … int-gpios = <&pioc 6 GPIO_ACTIVE_HIGH>; /* SoC specific pin to select for interrupt line */
21 spi-max-frequency = <DT_FREQ_M(24)>; /* Maximum SPI bus frequency */
22 accel-pwr-mode = <ICM42688_ACCEL_LN>; /* Low noise mode */
23 accel-odr = <ICM42688_ACCEL_ODR_2000>; /* 2000 Hz sampling */
24 accel-fs = <ICM42688_ACCEL_FS_16>; /* 16G scale */
25 gyro-pwr-mode = <ICM42688_GYRO_LN>; /* Low noise mode */
26 gyro-odr = <ICM42688_GYRO_ODR_2000>; /* 2000 Hz sampling */
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|
| /Zephyr-latest/boards/nordic/nrf5340_audio_dk/ |
| D | nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi | 2 * Copyright (c) 2020-2022 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
6 #include "nrf5340_audio_dk_nrf5340_cpuapp_common-pinctrl.dtsi"
7 #include <zephyr/dt-bindings/sensor/ina230.h>
12 zephyr,shell-uart = &uart0;
13 zephyr,uart-mcumgr = &uart0;
14 zephyr,bt-mon-uart = &uart0;
15 zephyr,bt-c2h-uart = &uart0;
16 zephyr,bt-hci = &bt_hci_ipc0;
20 gpio_fwd: nrf-gpio-forwarder {
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|
| /Zephyr-latest/samples/sensor/bme280/ |
| D | README.rst | 1 .. zephyr:code-sample:: bme280
3 :relevant-api: sensor_interface
14 https://www.bosch-sensortec.com/products/environmental-sensors/humidity-sensors-bme280/
24 or SPI. Configuration is done via :ref:`devicetree <dt-guide>`. The devicetree
34 https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bme280-ds002.pdf
36 Boards with a built-in BME280
42 .. zephyr-app-commands::
43 :zephyr-app: samples/sensor/bme280
53 .. zephyr-app-commands::
54 :zephyr-app: samples/sensor/bme280
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| /Zephyr-latest/boards/st/stm32l496g_disco/ |
| D | stm32l496g_disco.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/l4/stm32l496a(e-g)ix-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 model = "STMicroelectronics STM32L496G-DISCO board";
15 compatible = "st,stm32l496g-disco";
19 zephyr,shell-uart = &usart2;
22 zephyr,flash-controller = &mx25r6435;
26 compatible = "gpio-leds";
28 gpios = <&gpiob 13 GPIO_ACTIVE_HIGH>;
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| /Zephyr-latest/dts/bindings/dma/ |
| D | gd,gd32-dma-v1.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 channel: Select channel for data transmitting
9 slot: Select peripheral to connect DMA
12 - bit 6-7: Direction (see dma.h)
13 - 0x0: MEMORY to MEMORY
14 - 0x1: MEMORY to PERIPH
15 - 0x2: PERIPH to MEMORY
16 - 0x3: reserved for PERIPH to PERIPH
18 - bit 9: Peripheral address increase
19 - 0x0: no address increment between transfers
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| D | gd,gd32-dma.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 channel: Select channel for data transmitting
10 - bit 6-7: Direction (see dma.h)
11 - 0x0: MEMORY to MEMORY
12 - 0x1: MEMORY to PERIPH
13 - 0x2: PERIPH to MEMORY
14 - 0x3: reserved for PERIPH to PERIPH
16 - bit 9: Peripheral address increase
17 - 0x0: no address increment between transfers
18 - 0x1: increment address between transfers
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| /Zephyr-latest/boards/nxp/rddrone_fmuk66/ |
| D | rddrone_fmuk66.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/pwm/pwm.h>
11 #include "rddrone_fmuk66-pinctrl.dtsi"
21 pwm-led0 = &red_pwm_led;
22 pwm-led1 = &green_pwm_led;
23 pwm-led2 = &blue_pwm_led;
25 red-pwm-led = &red_pwm_led;
26 green-pwm-led = &green_pwm_led;
27 blue-pwm-led = &blue_pwm_led;
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| /Zephyr-latest/boards/st/stm32l562e_dk/ |
| D | stm32l562e_dk_common.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
8 #include <st/l5/stm32l562qeixq-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
11 #include <zephyr/dt-bindings/memory-controller/stm32-fmc-nor-psram.h>
12 #include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
16 compatible = "gpio-leds";
18 gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
22 gpios = <&gpiog 12 GPIO_ACTIVE_LOW>;
28 compatible = "gpio-keys";
31 gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
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|
| /Zephyr-latest/doc/services/storage/disk/ |
| D | access.rst | 15 API provides IOCTLs to initialize and de-initialize the disk. They are
22 * :c:macro:`DISK_IOCTL_CTRL_DEINIT`: De-initialize the disk. Once this IOCTL
26 Init/deinit IOCTL calls are balanced, so a disk will not de-initialize until
29 It is also possible to force a disk de-initialization by passing a
35 Note that de-initializing a disk is a low level operation- typically the
36 de-initialization and initialization calls should be left to the filesystem
38 de-initialize the disk and can instead call :c:func:`fs_unmount`
46 Both standard and high-capacity SD cards are supported.
66 interface. Example uses pin ``PA27`` for chip select, and runs the SPI bus
69 .. code-block:: devicetree
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| /Zephyr-latest/doc/services/input/ |
| D | gpio-kbd.rst | 1 .. _gpio-kbd:
6 The :dtcompatible:`gpio-kbd-matrix` driver supports a large variety of keyboard
12 row GPIOs (inputs) and selects on the columns GPIOs (output).
14 Base use case, no isolation diodes, interrupt capable GPIOs
21 .. figure:: no-diodes.svg
28 row GPIOs at the same time.
30 .. code-block:: devicetree
32 kbd-matrix {
33 compatible = "gpio-kbd-matrix";
34 row-gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>,
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|
| /Zephyr-latest/soc/microchip/mec/ |
| D | Kconfig | 5 # SPDX-License-Identifier: Apache-2.0
18 Boot-ROM. Use the full Microchip SPI image generator program for
19 authentication and all other Boot-ROM loader features. Refer to the MCHP
65 bool "SPI flash operates full-duplex with frequency (< 25 MHz)"
68 bool "SPI flash operates full-duplex with fast reading mode"
220 Select Debug SoC interface support for MEC SoC family
226 pin is ignored. All other JTAG pins can be used as GPIOs
227 or other non-JTAG alternate functions.
245 Select tracing mode for debug interface
251 ETM re-assigns 5 pins for clock and 4-bit data bus.
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| /Zephyr-latest/include/zephyr/drivers/ |
| D | spi.h | 4 * SPDX-License-Identifier: Apache-2.0
27 #include <zephyr/dt-bindings/spi/spi.h>
73 * Whatever data is transmitted is looped-back to the receiving buffer of
115 /** Requests - if possible - to keep CS asserted after the transaction */
153 * @brief SPI Chip Select control structure
176 * @brief Get a <tt>struct gpio_dt_spec</tt> for a SPI device's chip select pin
187 * cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,
190 * a: spi-dev-a@0 {
194 * b: spi-dev-b@1 {
210 * @return #gpio_dt_spec struct corresponding with spi_dev's chip select
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