Searched full:a55 (Results 1 – 25 of 41) sorted by relevance
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| /Zephyr-latest/boards/renesas/rcar_spider_s4/ |
| D | rcar_spider_s4_r8a779f0_a55.yaml | 1 identifier: rcar_spider_s4/r8a779f0/a55
2 name: Cortex A55 for Renesas Spider
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| /Zephyr-latest/dts/bindings/cpu/ |
| D | arm,cortex-a55.yaml | 4 description: This is a representation of ARM Cortex-A55 CPU.
6 compatible: "arm,cortex-a55"
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| /Zephyr-latest/boards/nxp/imx95_evk/ |
| D | imx95_evk_mimx9596_a55.yaml | 7 identifier: imx95_evk/mimx9596/a55
8 name: NXP i.MX95 EVK A55
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| D | imx95_evk_mimx9596_a55_smp.yaml | 7 identifier: imx95_evk/mimx9596/a55/smp
8 name: NXP i.MX95 EVK A55 with SMP kernel
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| D | board.yml | 9 cpucluster: a55
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| /Zephyr-latest/boards/phytec/phyboard_nash/ |
| D | phyboard_nash_a55.yaml | 4 identifier: phyboard_nash/mimx9352/a55
5 name: PHYTEC phyBOARD-Nash i.MX93 A55
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| /Zephyr-latest/boards/nxp/imx93_evk/ |
| D | imx93_evk_mimx9352_a55.yaml | 7 identifier: imx93_evk/mimx9352/a55
8 name: NXP i.MX93 EVK A55
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| /Zephyr-latest/dts/arm64/rockchip/ |
| D | rk3568.dtsi | 27 compatible = "arm,cortex-a55";
34 compatible = "arm,cortex-a55";
41 compatible = "arm,cortex-a55";
49 compatible = "arm,cortex-a55";
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| /Zephyr-latest/soc/nxp/imx/imx9/imx93/ |
| D | CMakeLists.txt | 5 zephyr_include_directories(a55)
7 zephyr_sources_ifdef(CONFIG_ARM_MMU a55/mmu_regions.c)
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| D | Kconfig.soc | 12 NXP i.MX93 A55
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| /Zephyr-latest/soc/renesas/rcar/rcar_gen4/ |
| D | CMakeLists.txt | 8 zephyr_include_directories(a55)
9 zephyr_library_sources_ifdef(CONFIG_ARM_MMU a55/mmu_regions.c)
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| D | Kconfig.soc | 18 r8a779f0 a55
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| /Zephyr-latest/soc/renesas/rz/rzg3s/ |
| D | soc.c | 15 /* System core clock is set to 250 MHz by IPL of A55 */
22 /* This delay is required to wait for the A55 to complete its setting first before */ in soc_early_init_hook()
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| /Zephyr-latest/soc/nxp/imx/ |
| D | soc.yml | 40 - name: a55
44 - name: a55
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| /Zephyr-latest/boards/phytec/phyboard_nash/doc/ |
| D | index.rst | 15 i.MX93 MPU is composed of one cluster of 2x Cortex-A55 cores and a single
16 Cortex-M33 core. Zephyr OS is ported to run on one of the Cortex-A55 core as
41 - USB-C for UART debug, 2x serial ports for A55 and M33
55 The ``phyboard_nash/mimx9352/a55`` board target supports the following hardware
96 This board configuration uses a system clock frequency of 24 MHz. Cortex-A55
104 CPU's UART2 for A55 core and M33 core. The u-boot bootloader or Linux use the
107 Programming and Debugging (A55)
114 Use U-Boot to load and execute zephyr.bin on Cortex-A55 Core0:
126 :board: phyboard_nash/mimx9352/a55
134 Hello World! phyboard_nash/mimx9352/a55
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| /Zephyr-latest/dts/arm64/nxp/ |
| D | nxp_mimx95_a55.dtsi | 24 compatible = "arm,cortex-a55";
30 compatible = "arm,cortex-a55";
36 compatible = "arm,cortex-a55";
42 compatible = "arm,cortex-a55";
48 compatible = "arm,cortex-a55";
54 compatible = "arm,cortex-a55";
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| /Zephyr-latest/boards/nxp/imx93_evk/doc/ |
| D | index.rst | 12 i.MX93 MPU is composed of one cluster of 2x Cortex-A55 cores and a single
13 Cortex®-M33 core. Zephyr OS is ported to run on one of the Cortex®-A55 core.
42 - MicroUSB for UART debug, two COM ports for A55 and M33
102 Cortex-A55 Core runs up to 1.7 GHz.
109 CPU's UART2 for A55 core and M33 core.
153 :board: imx93_evk/mimx9352/a55
159 Note: The overlay only supports ``mimx9352/a55``, but can be extended to support
162 Programming and Debugging (A55)
180 Use U-Boot to load and kick zephyr.bin to Cortex-A55 Core1:
187 Or use the following command to kick zephyr.bin to Cortex-A55 Core0:
[all …]
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| /Zephyr-latest/boards/nxp/imx95_evk/doc/ |
| D | index.rst | 18 - The processor integrates up to six Arm Cortex-A55 cores, and supports
96 The Zephyr ``imx95_evk/mimx9596/a55`` and ``imx95_evk/mimx9596/a55/smp`` board targets support
116 This board configuration uses a system clock frequency of 24 MHz for Cortex-A55.
117 Cortex-A55 Core runs up to 1.8 GHz.
124 CPU's UART1 for Cortex-A55, UART3 for Cortex-M7.
135 Programming and Debugging (A55)
146 :board: imx95_evk/mimx9596/a55
155 Use U-Boot to load and kick zephyr.bin to Cortex-A55 Core1:
162 Or use the following command to kick zephyr.bin to Cortex-A55 Core0:
185 :board: imx95_evk/mimx9596/a55/smp
[all …]
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| /Zephyr-latest/boards/firefly/roc_rk3568_pc/ |
| D | board.yml | 3 full_name: ROC-RK3568-PC (Quad-core Cortex-A55)
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| /Zephyr-latest/soc/nxp/imx/imx9/imx95/ |
| D | CMakeLists.txt | 8 add_subdirectory(a55)
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| D | Kconfig.soc | 18 NXP i.MX95 A55
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| /Zephyr-latest/soc/renesas/rcar/ |
| D | soc.yml | 16 - name: a55
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| /Zephyr-latest/snippets/xen_dom0/ |
| D | snippet.yml | 16 rcar_spider_s4/r8a779f0/a55:
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| /Zephyr-latest/drivers/serial/ |
| D | Kconfig.renesas_rz | 20 This option is to make a delay to wait for the A55 to complete its setting first
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| /Zephyr-latest/boards/renesas/rzg3s_smarc/doc/ |
| D | index.rst | 10 * Cortex-A55 Single, Cortex-M33 x 2
78 to run BL2 TF-A on Cortex-A55 System Core before starting Zephyr. The minimal steps are described b…
113 …at SCIF download (SW_MODE[1:4] = OFF, ON, OFF, ON) and Cortex-A55 cold boot (SW_CONFIG[1:6] = OFF,…
138 Currently it's required Renesas BL2 TF-A to be started on Cortex-A55 System Core
152 Renesas BL2 TF-A running on the Cortex-A55 System Core and starting binary on the Cortex-M33 System…
209 After flashing, it must be set back to Cortex-A55 cold boot to run.
228 …ssors/rz-mpus/rzg3s-general-purpose-microprocessors-single-core-arm-cortex-a55-11-ghz-cpu-and-dual…
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