1.. zephyr:board:: rzg3s_smarc
2
3Overview
4********
5
6The Renesas RZ/G3S SMARC Evaluation Board Kit (RZ/G3S-EVKIT) consists of a SMARC v2.1 module board and a carrier board.
7
8* Device: RZ/G3S R9A08G045S33GBG
9
10  * Cortex-A55 Single, Cortex-M33 x 2
11  * BGA 359-pin, 14mmSq body, 0.5mm pitch
12
13* SMARC v2.1 Module Board Functions
14
15  * LPDDR4 SDRAM: 1GB x 1pc
16  * QSPI flash memory: 128Mb x 1pc
17  * eMMC memory: 64GB x 1pc
18  * PMIC power supply RAA215300A2GNP#HA3 implemented
19  * microSD card x2
20  * I3C connector
21  * JTAG connector
22  * ADC x8 channels
23  * Current monitor (USB Micro B)
24
25* Carrier Board Functions
26
27  * Gigabit Ethernet x2
28  * USB2.0 x2ch (OTG x1ch, Host x1ch)
29  * CAN-FD x2
30  * microSD card x1
31  * Mono speaker, Stereo headphone, Mic., and Aux..
32  * PMOD x2
33  * USB-Type C for power input
34  * PCIe Gen2 4-lane slot (G3S supports only 1-lane)
35  * M.2 Key E
36  * M.2 Key B and SIM card
37  * Coin cell battery holder (3.0V support)
38
39Hardware
40********
41
42The Renesas RZ/G3S MPU documentation can be found at `RZ/G3S Group Website`_
43
44.. figure:: rzg3s_block_diagram.webp
45	:width: 600px
46	:align: center
47	:alt: RZ/G3S group feature
48
49	RZ/G3S block diagram (Credit: Renesas Electronics Corporation)
50
51Supported Features
52==================
53
54The ``rzg3s_smarc/r9a08g045s33gbg/cm33`` board target supports the ARM Cortex-M33 System Core without FPU
55and the following hardware features:
56
57+-----------+------------+-------------------------------------+
58| Interface | Controller | Driver/Component                    |
59+===========+============+=====================================+
60| NVIC      | on-chip    | arch/arm                            |
61+-----------+------------+-------------------------------------+
62| SYSTICK   | on-chip    | arch/arm                            |
63+-----------+------------+-------------------------------------+
64| PINCTRL   | on-chip    | pinctrl                             |
65+-----------+------------+-------------------------------------+
66| GPIO      | on-chip    | gpio                                |
67+-----------+------------+-------------------------------------+
68| UART      | on-chip    | serial                              |
69+-----------+------------+-------------------------------------+
70
71Other hardware features are currently not supported by the port.
72
73Programming and Debugging
74*************************
75
76RZ/G3S-EVKIT is designed to start different systems on different cores.
77It uses Yocto as the build system to build Linux system and boot loaders
78to run BL2 TF-A on Cortex-A55 System Core before starting Zephyr. The minimal steps are described below.
79
80  1. Follow ''2.2 Building Images'' of `SMARC EVK of RZ/G3S Linux Start-up Guide`_ to prepare the build environment.
81
82  2. Before build, add ``PLAT_M33_BOOT_SUPPORT=1`` to meta-renesas/meta-rzg3s/recipes-bsp/trusted-firmware-a/trusted-firmware-a.bbappend.
83
84  .. code-block:: bash
85    :emphasize-lines: 6
86
87      require trusted-firmware-a.inc
88      COMPATIBLE_MACHINE_rzg3s = "(rzg3s-dev|smarc-rzg3s)"
89      PLATFORM_rzg3s-dev = "g3s"
90      EXTRA_FLAGS_rzg3s-dev = "BOARD=dev14_1_lpddr PLAT_SYSTEM_SUSPEND=vbat"
91      PLATFORM_smarc-rzg3s = "g3s"
92      EXTRA_FLAGS_smarc-rzg3s = "BOARD=smarc PLAT_SYSTEM_SUSPEND=vbat PLAT_M33_BOOT_SUPPORT=1"
93
94  3. Start the build:
95
96  .. code-block:: bash
97
98      MACHINE=smarc-rzg3s bitbake core-image-minimal
99
100  The below necessary artifacts will be located in the build/tmp/deploy/images
101
102  +---------------+-----------------------------+
103  | Artifacts     | File name                   |
104  +===============+=============================+
105  | Boot loader   | bl2_bp_spi-smarc-rzg3s.srec |
106  |               |                             |
107  |               | fip-smarc-rzg3s.srec        |
108  +---------------+-----------------------------+
109  | Flash Writer  | FlashWriter-smarc-rzg3s.mot |
110  +---------------+-----------------------------+
111
112  4. Follow ''4.2 Startup Procedure'' of `SMARC EVK of RZ/G3S Linux Start-up Guide`_ for power supply and board setting
113     at SCIF download (SW_MODE[1:4] = OFF, ON, OFF, ON) and Cortex-A55 cold boot (SW_CONFIG[1:6] = OFF, OFF, ON, OFF, OFF, OFF)
114
115  5. Follow ''4.3 Download Flash Writer to RAM'' of `SMARC EVK of RZ/G3S Linux Start-up Guide`_ to download Flash Writer to RAM
116
117  6. Follow ''4.4 Write the Bootloader'' of `SMARC EVK of RZ/G3S Linux Start-up Guide`_ to write the boot loader
118     to the target board by using Flash Writer.
119
120Applications for the ``rzg3s_smarc`` board can be built in the usual way as
121documented in :ref:`build_an_application`.
122
123Console
124=======
125
126The UART port for Cortex-M33 System Core can be accessed by connecting `Pmod USBUART <https://store.digilentinc.com/pmod-usbuart-usb-to-uart-interface/>`_
127to the upper side of ``PMOD1_3A``.
128
129Debugging
130=========
131
132It is possible to load and execute a Zephyr application binary on
133this board on the Cortex-M33 System Core from
134the internal SRAM, using ``JLink`` debugger (:ref:`jlink-debug-host-tools`).
135
136.. note::
137
138    Currently it's required Renesas BL2 TF-A to be started on Cortex-A55 System Core
139    before starting Zephyr as it configures clocks and the Cortex-M33 System Core before starting it.
140
141Here is an example for building and debugging with the :zephyr:code-sample:`hello_world` application.
142
143.. zephyr-app-commands::
144   :zephyr-app: samples/hello_world
145   :board: rzg3s_smarc/r9a08g045s33gbg/cm33
146   :goals: build debug
147
148Flashing
149========
150
151Zephyr application can be flashed to QSPI storage and then loaded by
152Renesas BL2 TF-A running on the Cortex-A55 System Core and starting binary on the Cortex-M33 System Core.
153
154The Zephyr application binary has to be converted to Motorolla S-record `SREC`_ format
155which is generated automatically in Zephyr application build directory with the extension ``s19``.
156
157.. _SREC: https://en.wikipedia.org/wiki/SREC_(file_format)
158
159.. _Flashing on QSPI:
160
161Flashing on QSPI using Flash Writer
162---------------------------------------
163
164Zephyr binary has to be converted to **srec** format.
165
166* Download and start **Flash Writer** as described in ''4.3 Download Flash Writer to RAM'' of `SMARC EVK of RZ/G3S Linux Start-up Guide`_
167* Use **XLS2** command to flash Zephyr binary
168* Input when asked:
169
170.. code-block:: console
171
172    ===== Please Input Program Top Address ============
173      Please Input : H'23000
174    ===== Please Input Qspi Save Address ===
175      Please Input : H'200000
176
177* Then send Zephyr **s19** file from terminal (use ''ascii'' mode)
178* Reboot the board in the **QSPI Boot Mode**
179
180.. code-block:: console
181
182     -- Load Program to SRAM ---------------
183
184    Flash writer for RZ/G3S Series V0.60 Jan.26,2023
185     Product Code : RZ/G3S
186    >XLS2
187    ===== Qspi writing of RZ/G2 Board Command =============
188    Load Program to Spiflash
189    Writes to any of SPI address.
190    Program size & Qspi Save Address
191    ===== Please Input Program Top Address ============
192      Please Input : H'23000
193
194    ===== Please Input Qspi Save Address ===
195      Please Input : H'200000
196    please send ! ('.' & CR stop load)
197    I Flash memory...
198    Erase Completed
199    Write to SPI Flash memory.
200    ======= Qspi  Save Information  =================
201     SpiFlashMemory Stat Address : H'00200000
202     SpiFlashMemory End Address  : H'002098E6
203    ===========================================================
204
205Flashing on QSPI using west
206---------------------------
207
208Before using ``flash`` command, the board must be set to Cortex-M33 cold boot (SW_CONFIG[1:6] = OFF, OFF, ON, OFF, OFF, ON).
209After flashing, it must be set back to Cortex-A55 cold boot to run.
210
211The minimal version of SEGGER JLink SW which can perform flashing of QSPI memory is v7.96.
212
213**Note:** It's verified that we can perform flashing successfully with SEGGER JLink SW v7.98g so please use this or later
214version.
215
216.. zephyr-app-commands::
217   :zephyr-app: samples/hello_world
218   :board: rzg3s_smarc/r9a08g045s33gbg/cm33
219   :goals: build flash
220   :compact:
221
222References
223**********
224
225.. target-notes::
226
227.. _RZ/G3S Group Website:
228   https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzg3s-general-purpose-microprocessors-single-core-arm-cortex-a55-11-ghz-cpu-and-dual-core-cortex-m33-250
229
230.. _RZG3S-EVKIT Website:
231   https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzg3s-evkit-evaluation-board-kit-rzg3s-mpu
232
233.. _SMARC EVK of RZ/G3S Linux Start-up Guide:
234   https://www.renesas.com/us/en/document/gde/smarc-evk-rzg3s-linux-start-guide-rev104
235