Searched full:stm32mp1 (Results 1 – 17 of 17) sorted by relevance
| /Zephyr-latest/dts/bindings/clock/ |
| D | st,stm32mp1-rcc.yaml | 5 STM32MP1 Reset and Clock controller node.
6 On STM32MP1 platforms, clock control configuration is performed on A9 side.
10 compatible: "st,stm32mp1-rcc"
|
| /Zephyr-latest/soc/st/stm32/stm32mp1x/ |
| D | Kconfig.defconfig | 1 # STMicroelectronics STM32MP1 MCU/MPU line
|
| D | Kconfig | 1 # STMicroelectronics STM32MP1 MPU series
|
| D | Kconfig.soc | 1 # STMicroelectronics STM32MP1 MPU line
|
| D | soc.h | 8 * @file SoC configuration macros for the STM32MP1 family processors.
|
| /Zephyr-latest/dts/bindings/spi/ |
| D | st,stm32h7-spi.yaml | 10 For instance, but not limited to: STM32MP1, STM32U5
|
| /Zephyr-latest/soc/st/stm32/common/ |
| D | stm32_hsem.h | 79 /** HW semaphore from STM32MP1
80 * EXTI and GPIO are inherited from STM32MP1 Linux.
|
| /Zephyr-latest/boards/96boards/avenger96/doc/ |
| D | index.rst | 231 is based on the Linux STM32MP1 SDK OpenOCD and is available only for a Linux
237 install `stm32mp1 developer package`_.
267 …_com/en/products/microcontrollers-microprocessors/stm32-arm-cortex-mpus/stm32mp1-series/stm32mp157…
|
| /Zephyr-latest/dts/arm/st/mp1/ |
| D | stm32mp157.dtsi | 43 compatible = "st,stm32mp157", "st,stm32mp1", "simple-bus";
46 compatible = "st,stm32mp1-rcc";
|
| /Zephyr-latest/modules/ |
| D | Kconfig.stm32 | 654 Enable STM32Cube DelayBlock (DELAYBLOCK) LL module driver (stm32H7 or stm32MP1)
|
| /Zephyr-latest/boards/st/stm32mp157c_dk2/doc/ |
| D | stm32mp157_dk2.rst | 271 …_com/en/products/microcontrollers-microprocessors/stm32-arm-cortex-mpus/stm32mp1-series/stm32mp157…
|
| /Zephyr-latest/doc/releases/ |
| D | release-notes-2.0.rst | 255 * Added support for STM32MP1, STM32WB, and STM32L1X to STM32 driver
269 * Added support for STM32G0X, STM32H7, STM32WB, and STM32MP1 to STM32 driver
290 * Added SPI support to STM32MP1
|
| D | release-notes-3.0.rst | 814 * stm32cube/stm32mp1: Upgraded to version V1.5.0
|
| D | release-notes-2.4.rst | 288 * STM32H7/STM32WB/STM32MP1: Added Dual Core concurrent register access
|
| D | release-notes-2.6.rst | 1263 * :github:`35083` - dts: stm32mp1: SPI2 mixup with SAI2, SPI3 mixup with SAI3
|
| D | release-notes-3.3.rst | 687 * STM32 DMA Support for the STM32MP1 series
|
| /Zephyr-latest/drivers/spi/ |
| D | spi_ll_stm32.c | 829 /* With the STM32MP1, STM32U5 and the STM32H7, in transceive()
|
