1# Copyright (c) 2021, Linaro ltd
2# SPDX-License-Identifier: Apache-2.0
3
4description: |
5  STM32MP1 Reset and Clock controller node.
6  On STM32MP1 platforms, clock control configuration is performed on A9 side.
7  As a consequence, the only property to be set in devicetree node is the
8  clock-frequency (mlhclk_ck).
9
10compatible: "st,stm32mp1-rcc"
11
12include:
13  - name: st,stm32-rcc.yaml
14    property-blocklist:
15      - ahb-prescaler
16      - apb1-prescaler
17      - apb2-prescaler
18      - undershoot-prevention
19