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/Zephyr-latest/drivers/sdhc/
DKconfig.mcux_sdif5 bool "NXP MCUX SDIF Driver"
11 Enable the NXP SDIF Host controller driver
16 bool "DMA support for MCUX SDIF driver"
19 Enable DMA support for MCUX SDIF driver. May be disabled to reduce
24 # SDIF DMA needs 32 bit aligned buffers
32 Size of MCUX SDIF DMA descriptor buffer in bytes
Dmcux_sdif.c18 LOG_MODULE_REGISTER(sdif, CONFIG_SDHC_LOG_LEVEL);
80 /* SDIF IRQ handler not exposed in SDK header, so declare it here */
84 * MCUX SDIF interrupt service routine
145 LOG_DBG("SDIF clock set to %d", bus_clk_hz); in mcux_sdif_set_io()
252 /* Copy Zephyr data fields to SDIF struct */ in mcux_sdif_transfer()
/Zephyr-latest/dts/bindings/sdhc/
Dnxp,lpc-sdif.yaml4 description: NXP LPC SDIF SD host controller
6 compatible: "nxp,lpc-sdif"
18 Data timeout, as multiple of the SD clock. See DATA_TIMEOUT field of SDIF.
26 of SDIF. Default value is the maximum possible timeout
33 DEBOUNCE_COUNT field of SDIF. Default value is the reset value of SOC.
/Zephyr-latest/boards/nxp/lpcxpresso55s69/
Dlpcxpresso55s69_lpc55s69_cpu0.dts33 sdhc0 = &sdif;
118 &sdif {
/Zephyr-latest/dts/arm/nxp/
Dnxp_lpc55S6x_common.dtsi319 sdif: sdif@9b000 { label
320 compatible = "nxp,lpc-sdif";
/Zephyr-latest/soc/nxp/lpc/lpc55xxx/
Dsoc.c317 #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(sdif), nxp_lpc_sdif, okay) && \ in clock_init()
319 /* attach main clock to SDIF */ in clock_init()
/Zephyr-latest/boards/nxp/lpcxpresso55s69/doc/
Dindex.rst95 | SDIF | on-chip | sdhc |
/Zephyr-latest/doc/releases/
Drelease-notes-3.2.rst1126 * :dtcompatible:`nxp,lpc-sdif`
Drelease-notes-3.3.rst1717 - :dtcompatible:`nxp,lpc-sdif`: