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/Zephyr-latest/tests/drivers/audio/dmic_api/boards/
Dmimxrt595_evk_mimxrt595s_cm33.overlay15 dc-cutoff = "155hz";
16 dc-gain = <1>;
22 dc-cutoff = "155hz";
23 dc-gain = <1>;
29 dc-cutoff = "155hz";
30 dc-gain = <1>;
36 dc-cutoff = "155hz";
37 dc-gain = <1>;
Drd_rw612_bga.overlay15 dc-cutoff = "155hz";
16 dc-gain = <1>;
22 dc-cutoff = "155hz";
23 dc-gain = <1>;
29 dc-cutoff = "155hz";
30 dc-gain = <1>;
36 dc-cutoff = "155hz";
37 dc-gain = <1>;
/Zephyr-latest/dts/bindings/regulator/
Dsilabs,series2-dcdc.yaml5 Silicon Labs Series 2 DC-DC converter.
13 Enable DC-DC converter at boot. If not set, the DC-DC converter is powered off.
15 Enable bypass mode. If combined with `regulator-boot-on`, the DC-DC converter
Dmps,mpm54304.yaml6 Monolithic Power Systems MPM54304 quad-output DC/DC step-down power module.
Dcirrus,cp9314.yaml5 Cirrus CP9314 Buck Switched Cap DC/DC Converter
/Zephyr-latest/drivers/regulator/
DKconfig.mpm543045 bool "MPM54304 DC/DC step-down power module"
10 Enable MPM54304 DC/DC step-down power module support.
/Zephyr-latest/soc/silabs/
DKconfig160 bool "SoC DC/DC regulator"
163 Enable the on chip DC/DC regulator
166 prompt "DC/DC mode"
169 Select power configuration mode of the on chip DC/DC converter.
175 bool "DC/DC On"
178 bool "DC/DC Off"
/Zephyr-latest/drivers/pwm/
Dpwm_mchp_xec.c46 /* Precision factor for DC calculation
134 static void xec_compute_on_off(uint32_t freq, uint32_t dc, uint32_t clk, in xec_compute_on_off() argument
141 *on = ((on_off * dc) / XEC_PWM_DC_PF) - 1; in xec_compute_on_off()
147 int dc = (on + 1) + (off + 1); in xec_compute_dc() local
150 dc = (((uint64_t)(on + 1) * XEC_PWM_DC_PF) / dc); in xec_compute_dc()
152 return (uint32_t)dc; in xec_compute_dc()
155 static uint16_t xec_compare_div_on_off(uint32_t target_freq, uint32_t dc, in xec_compare_div_on_off() argument
162 xec_compute_on_off(target_freq, dc, max_freq[div_a], in xec_compare_div_on_off()
167 xec_compute_on_off(target_freq, dc, max_freq[div_b], in xec_compare_div_on_off()
188 static uint8_t xec_select_best_div_on_off(uint32_t target_freq, uint32_t dc, in xec_select_best_div_on_off() argument
[all …]
Dpwm_mchp_xec_bbled.c145 static void xec_pwmbb_progam_pwm(const struct device *dev, uint32_t ld, uint32_t dc) in xec_pwmbb_progam_pwm() argument
152 val |= ((dc << XEC_PWM_BBLED_LIM_MIN_POS) & XEC_PWM_BBLED_LIM_MIN_MSK); in xec_pwmbb_progam_pwm()
218 uint32_t dc, ld; in pwm_bbled_xec_set_cycles() local
252 dc = ((XEC_PWM_BBLED_DC_MAX + 1) * pulse_cycles / period_cycles); in pwm_bbled_xec_set_cycles()
253 if (dc < XEC_PWM_BBLED_DC_MIN) { in pwm_bbled_xec_set_cycles()
254 dc = XEC_PWM_BBLED_DC_MIN; in pwm_bbled_xec_set_cycles()
255 } else if (dc > XEC_PWM_BBLED_DC_MAX) { in pwm_bbled_xec_set_cycles()
256 dc = XEC_PWM_BBLED_DC_MAX; in pwm_bbled_xec_set_cycles()
259 LOG_DBG("Program: ld = 0x%0x dc = 0x%0x", ld, dc); in pwm_bbled_xec_set_cycles()
261 xec_pwmbb_progam_pwm(dev, ld, dc); in pwm_bbled_xec_set_cycles()
/Zephyr-latest/dts/bindings/audio/
Dnxp,dmic.yaml77 dc-cutoff:
86 DC cutoff filter setting. Default is reset value of register. Note that
91 dc-gain:
95 DC gain fine adjustment. Number of bits to downshift the final
/Zephyr-latest/include/zephyr/dt-bindings/regulator/
Dnrf5x.h21 /** DC/DC mode */
/Zephyr-latest/soc/nordic/nrf52/
DKconfig45 Enable nRF52 series System on Chip DC/DC converter.
59 Enable nRF52 series System on Chip High Voltage DC/DC converter.
/Zephyr-latest/soc/nordic/nrf53/
DKconfig52 DC/DC mode is enabled for the VREGMAIN or VREGRADIO regulator
124 Enable nRF53 series System on Chip Application MCU DC/DC converter.
138 Enable nRF53 series System on Chip Network MCU DC/DC converter.
151 Enable nRF53 series System on Chip High Voltage DC/DC converter.
/Zephyr-latest/doc/_static/images/
Dlogo-readme-light.svg3 xmlns:dc="http://purl.org/dc/elements/1.1/"
19 <dc:format>image/svg+xml</dc:format>
20 <dc:type
21 rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
22 <dc:title></dc:title>
Dlogo-readme-dark.svg3 xmlns:dc="http://purl.org/dc/elements/1.1/"
19 <dc:format>image/svg+xml</dc:format>
20 <dc:type
21 rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
22 <dc:title></dc:title>
Dlogo.svg3 xmlns:dc="http://purl.org/dc/elements/1.1/"
19 <dc:format>image/svg+xml</dc:format>
20 <dc:type
21 rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
22 <dc:title></dc:title>
/Zephyr-latest/doc/_doxygen/
Dlogo.svg3 xmlns:dc="http://purl.org/dc/elements/1.1/"
19 <dc:format>image/svg+xml</dc:format>
20 <dc:type
21 rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
22 <dc:title></dc:title>
/Zephyr-latest/boards/nxp/rd_rw612_bga/
Drd_rw612_bga.dtsi210 dc-cutoff = "155hz";
211 dc-gain = <1>;
217 dc-cutoff = "155hz";
218 dc-gain = <1>;
224 dc-cutoff = "155hz";
225 dc-gain = <1>;
231 dc-cutoff = "155hz";
232 dc-gain = <1>;
/Zephyr-latest/dts/bindings/display/
Dzephyr,dummy-dc.yaml6 compatible: "zephyr,dummy-dc"
Dzephyr,sdl-dc.yaml6 compatible: "zephyr,sdl-dc"
/Zephyr-latest/boards/nxp/s32z2xxdc2/
Dboard.yml3 full_name: X-S32Z27X-DC (DC2)
/Zephyr-latest/soc/silabs/common/
Dsoc.c147 /* Nothing to do, leave DC/DC converter in unconfigured, safe state. */ in dcdc_init()
157 #error "Unsupported power configuration mode of the on chip DC/DC converter." in dcdc_init()
/Zephyr-latest/dts/bindings/pinctrl/
Dambiq,apollo4-pinctrl.yaml150 38, DC_DPI_DE : DC DPI DE module
152 40, DC_SPI_CS_N : DC SPI CS_N module
153 41, DC_QSPI_CS_N : DC QSPI CS_N module
154 42, DC_RESX : DC module RESX
/Zephyr-latest/samples/modules/lvgl/demos/boards/
Dnative_posix.overlay8 compatible = "zephyr,sdl-dc";
Dnative_posix_64.overlay8 compatible = "zephyr,sdl-dc";

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