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/Zephyr-latest/samples/subsys/smf/smf_calculator/img/
Dsmf_calculator.svg158 ><path d="M20.5 1.5 L39 20.5 L20.5 39 L1.5 20.5 Z" stroke="none" clip-path="url(#clipPath3)"
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/Zephyr-latest/drivers/dai/intel/ssp/
Dssp_regs_v1.h30 #define SSCR0_DSIZE(x) DAI_INTEL_SSP_SET_BITS(3, 0, (x) - 1) argument
31 #define SSCR0_DSIZE_GET(x) (((x) & DAI_INTEL_SSP_MASK(3, 0)) + 1) argument
32 #define SSCR0_FRF DAI_INTEL_SSP_MASK(5, 4)
33 #define SSCR0_MOT DAI_INTEL_SSP_SET_BITS(5, 4, 0)
34 #define SSCR0_TI DAI_INTEL_SSP_SET_BITS(5, 4, 1)
35 #define SSCR0_NAT DAI_INTEL_SSP_SET_BITS(5, 4, 2)
36 #define SSCR0_PSP DAI_INTEL_SSP_SET_BITS(5, 4, 3)
40 #define SSCR0_SCR(x) DAI_INTEL_SSP_SET_BITS(19, 8, x) argument
45 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1) argument
46 #define SSCR0_FRDC_GET(x) ((((x) & DAI_INTEL_SSP_MASK(26, 24)) >> 24) + 1) argument
[all …]
Dssp_regs_v2.h31 #define SSCR0_DSIZE(x) DAI_INTEL_SSP_SET_BITS(3, 0, (x) - 1) argument
32 #define SSCR0_DSIZE_GET(x) (((x) & DAI_INTEL_SSP_MASK(3, 0)) + 1) argument
33 #define SSCR0_FRF DAI_INTEL_SSP_MASK(5, 4)
34 #define SSCR0_MOT DAI_INTEL_SSP_SET_BITS(5, 4, 0)
35 #define SSCR0_TI DAI_INTEL_SSP_SET_BITS(5, 4, 1)
36 #define SSCR0_NAT DAI_INTEL_SSP_SET_BITS(5, 4, 2)
37 #define SSCR0_PSP DAI_INTEL_SSP_SET_BITS(5, 4, 3)
41 #define SSCR0_SCR(x) DAI_INTEL_SSP_SET_BITS(19, 8, x) argument
46 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1) argument
47 #define SSCR0_FRDC_GET(x) ((((x) & DAI_INTEL_SSP_MASK(26, 24)) >> 24) + 1) argument
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Dssp_regs_v3.h32 #define PCMSyCM_OFFSET(x) 0x16 + 0x4*(x) argument
38 #define SSCR0_DSIZE(x) DAI_INTEL_SSP_SET_BITS(3, 0, (x) - 1) argument
39 #define SSCR0_DSIZE_GET(x) (((x) & DAI_INTEL_SSP_MASK(3, 0)) + 1) argument
40 #define SSCR0_FRF DAI_INTEL_SSP_MASK(5, 4)
41 #define SSCR0_MOT DAI_INTEL_SSP_SET_BITS(5, 4, 0)
42 #define SSCR0_TI DAI_INTEL_SSP_SET_BITS(5, 4, 1)
43 #define SSCR0_NAT DAI_INTEL_SSP_SET_BITS(5, 4, 2)
44 #define SSCR0_PSP DAI_INTEL_SSP_SET_BITS(5, 4, 3)
48 #define SSCR0_SCR(x) DAI_INTEL_SSP_SET_BITS(19, 8, x) argument
53 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1) argument
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/Zephyr-latest/doc/kernel/services/smp/
Dsmpinit.svg32 d="M 0,0 5,-5 -12.5,0 5,5 Z"
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/Zephyr-latest/drivers/sensor/adi/adxl372/
Dadxl372.h42 #define ADXL372_X_DATA_H 0x08u /* X-axis acceleration data [11:4] */
43 #define ADXL372_X_DATA_L 0x09u /* X-axis acceleration data [3:0] */
48 #define ADXL372_X_MAXPEAK_H 0x15u /* X-axis MaxPeak acceleration data */
49 #define ADXL372_X_MAXPEAK_L 0x16u /* X-axis MaxPeak acceleration data */
54 #define ADXL372_OFFSET_X 0x20u /* X axis offset */
57 #define ADXL372_X_THRESH_ACT_H 0x23u /* X axis Activity Threshold [15:8] */
58 #define ADXL372_X_THRESH_ACT_L 0x24u /* X axis Activity Threshold [7:0] */
64 #define ADXL372_X_THRESH_INACT_H 0x2Au /* X axis Inactivity Threshold */
65 #define ADXL372_X_THRESH_INACT_L 0x2Bu /* X axis Inactivity Threshold */
72 #define ADXL372_X_THRESH_ACT2_H 0x32u /* X axis Activity2 Threshold [15:8] */
[all …]
/Zephyr-latest/soc/nxp/lpc/lpc11u6x/
Dsoc.h31 * [5] hysteresis.
40 #define IOCON_PIO_FUNC(x) (((x) & 0x7)) argument
42 #define IOCON_PIO_MODE(x) (((x) & 0x3) << 3) argument
44 #define IOCON_PIO_HYS(x) (((x) & 0x1) << 5) argument
46 #define IOCON_PIO_INVERT(x) (((x) & 0x1) << 2) argument
48 #define IOCON_PIO_OD(x) (((x) & 0x1) << 10) argument
50 #define IOCON_PIO_SMODE(x) (((x) & 0x3) << 11) argument
52 #define IOCON_PIO_CLKDIV(x) (((x) & 0x7) << 13) argument
61 * [5] hysteresis.
72 #define IOCON_PIO_ADMODE(x) (((x) & 0x1) << 7) argument
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/Zephyr-latest/tests/bsim/bluetooth/mesh/src/
Dtest_friendship.c104 K_SECONDS(5)), in test_friend_est()
125 K_SECONDS(5)), in test_friend_est_multi()
131 K_MSEC(POLL_TIMEOUT_MS + 5 * MSEC_PER_SEC)); in test_friend_est_multi()
150 K_SECONDS(5)), in test_friend_msg()
159 ASSERT_OK_MSG(bt_mesh_test_send(bt_mesh_test_friendship_addr_get(), NULL, 5, 0, in test_friend_msg()
191 ASSERT_OK_MSG(bt_mesh_test_recv(5, cfg->addr, NULL, K_SECONDS(10)), in test_friend_msg()
218 K_SECONDS(5)), in test_friend_overflow()
228 bt_mesh_test_send(bt_mesh_test_friendship_addr_get(), NULL, 5, 0, K_NO_WAIT); in test_friend_overflow()
234 bt_mesh_test_send(bt_mesh_test_friendship_addr_get(), NULL, 5, 0, K_NO_WAIT); in test_friend_overflow()
250 bt_mesh_test_send(bt_mesh_test_friendship_addr_get(), NULL, 5, 0, K_NO_WAIT); in test_friend_overflow()
[all …]
/Zephyr-latest/tests/unit/crc/
Dmain.c19 uint8_t test2[] = { '1', '2', '3', '4', '5', '6', '7', '8', '9' }; in ZTEST()
46 uint8_t test2[] = { '1', '2', '3', '4', '5', '6', '7', '8', '9' }; in ZTEST()
57 uint8_t test2[] = { '1', '2', '3', '4', '5', '6', '7', '8', '9' }; in ZTEST()
67 zassert_equal(crc24_pgp_update(0x00BA353A, test2 + 5, 4), 0x0021CF02); in ZTEST()
72 uint8_t test[] = { '1', '2', '3', '4', '5', '6', '7', '8', '9' }; in ZTEST()
81 /* CRC-16/DECT-X in ZTEST()
82 * https://reveng.sourceforge.io/crc-catalogue/16.htm#crc.cat.crc-16-dect-x in ZTEST()
90 uint8_t test[] = { '1', '2', '3', '4', '5', '6', '7', '8', '9' }; in ZTEST()
107 uint8_t test2[] = { '1', '2', '3', '4', '5', '6', '7', '8', '9' }; in ZTEST()
118 /* CRC-16/X-25, CRC-16/IBM-SDLC, CRC-16/ISO-HDLC in ZTEST()
[all …]
/Zephyr-latest/samples/shields/x_nucleo_iks02a1/standard/
DREADME.rst1 .. zephyr:code-sample:: x-nucleo-iks02a1-std
2 :name: X-NUCLEO-IKS02A1 shield - Standard (Mode 1)
5 Interact with all the sensors of an X-NUCLEO-IKS02A1 shield using Standard mode.
9 This sample is provided as an example to test the X-NUCLEO-IKS02A1 shield
11 Please refer to :ref:`x-nucleo-iks02a1` for more info on this configuration.
13 This sample enables all sensors of a X-NUCLEO-IKS02A1 shield, and then
23 This sample communicates over I2C with the X-NUCLEO-IKS02A1 shield
39 - X-NUCLEO-IKS02A1: https://www.st.com/en/ecosystems/x-nucleo-iks02a1.html
44 This sample runs with X-NUCLEO-IKS02A1 stacked on any board with a matching
59 X-NUCLEO-IKS02A1 sensor Mode 1 dashboard
[all …]
/Zephyr-latest/samples/drivers/spi_bitbang/src/
Dmain.c20 * writes 5 9bit words, you can check the output with a logic analyzer
32 uint16_t buff[5] = { 0x0101, 0x00ff, 0x00a5, 0x0000, 0x0102}; in test_basic_write_9bit_words()
33 int len = 5 * sizeof(buff[0]); in test_basic_write_9bit_words()
41 printf(" wrote %04x %04x %04x %04x %04x\n", in test_basic_write_9bit_words()
59 enum { datacount = 5 }; in test_9bit_loopback_partial()
80 printf(" tx (i) : %04x %04x\n", buff[0], buff[1]); in test_9bit_loopback_partial()
81 printf(" tx (ii) : %04x %04x %04x\n", buff[2], buff[3], buff[4]); in test_9bit_loopback_partial()
82 printf(" rx (ii) : %04x %04x %04x\n", rxdata[0], rxdata[1], rxdata[2]); in test_9bit_loopback_partial()
98 enum { datacount = 5 }; in test_8bit_xfer()
115 printf(" tx (i) : %02x %02x %02x %02x %02x\n", in test_8bit_xfer()
[all …]
/Zephyr-latest/tests/ztest/base/src/
Dmain.cpp10 int x; member
17 fixture->x = 5; in cpp_setup()
30 zassert_equal(5, fixture->x); in ZTEST_F()
/Zephyr-latest/samples/subsys/portability/cmsis_rtos_v1/philosophers/src/
Dphil_obj_abstract.h39 osSemaphoreDef(5);
41 #define fork_init(x) osSemaphoreCreate(osSemaphore(##x), 1) argument
42 #define take(x) osSemaphoreWait(x, osWaitForever) argument
43 #define drop(x) osSemaphoreRelease(x) argument
53 osMutexDef(5);
55 #define fork_init(x) osMutexCreate(osMutex(##x)); argument
56 #define take(x) osMutexWait(x, 0) argument
57 #define drop(x) osMutexRelease(x) argument
/Zephyr-latest/dts/bindings/input/
Dpixart,pat912x.yaml17 zephyr,axis-x:
20 The input code for the X axis to report for the device, typically any of
21 INPUT_REL_*. No report produced for the device X axis if unspecified.
29 res-x-cpi:
32 CPI resolution for the X axis, range 0 to 1275, rounded down to the
33 closest supported value in increments of 5.
39 closest supported value in increments of 5.
41 invert-x:
44 Invert X axis values.
/Zephyr-latest/drivers/sensor/adi/adxl345/
Dadxl345.h36 #define ADXL345_REG_READ(x) ((x & 0xFF) | ADXL345_READ_CMD) argument
62 #define ADXL345_COMPLEMENT_MASK(x) GENMASK(15, (x)) argument
72 #define ADXL345_STATUS_DOUBLE_TAP(x) (((x) >> 5) & 0x1) argument
73 #define ADXL345_STATUS_SINGLE_TAP(x) (((x) >> 6) & 0x1) argument
74 #define ADXL345_STATUS_DATA_RDY(x) (((x) >> 7) & 0x1) argument
78 #define ADXL345_INT_MAP_OVERRUN_MODE(x) (((x) & 0x1) << 0) argument
80 #define ADXL345_INT_MAP_WATERMARK_MODE(x) (((x) & 0x1) << 1) argument
82 #define ADXL345_INT_MAP_FREE_FALL_MODE(x) (((x) & 0x1) << 2) argument
84 #define ADXL345_INT_MAP_INACT_MODE(x) (((x) & 0x1) << 3) argument
86 #define ADXL345_INT_MAP_ACT_MODE(x) (((x) & 0x1) << 4) argument
[all …]
/Zephyr-latest/soc/microchip/mec/common/spigen/
Dmec_spi_gen.py81 SPI_DRIVE_STRENGTH_MULT_DEFAULT = "1x"
89 print("0x{0:02x}, ".format(v), end='')
148 hdr[5] = HDR_SPI_CLK_48MHZ
150 hdr[5] = HDR_SPI_CLK_24MHZ
152 hdr[5] = HDR_SPI_CLK_16MHZ
154 hdr[5] = HDR_SPI_CLK_12MHZ
157 hdr[5] |= HDR_SPI_CPOL_HI
159 hdr[5] |= HDR_SPI_CHPHA_MOSI_EDGE_1
161 hdr[5] |= HDR_SPI_CHPHA_MISO_EDGE_2
163 # translate 1x, 2x, 4x, 6x to 0, 1, 2, 3
[all …]
/Zephyr-latest/dts/bindings/adc/
Dadc-controller.yaml41 - ADC_GAIN_1_6: x 1/6
42 - ADC_GAIN_1_5: x 1/5
43 - ADC_GAIN_1_4: x 1/4
44 - ADC_GAIN_1_3: x 1/3
45 - ADC_GAIN_2_5: x 2/5
46 - ADC_GAIN_1_2: x 1/2
47 - ADC_GAIN_2_3: x 2/3
48 - ADC_GAIN_4_5: x 4/5
49 - ADC_GAIN_1: x 1
50 - ADC_GAIN_2: x 2
[all …]
/Zephyr-latest/soc/sifive/sifive_freedom/fu700/
Dprci.h33 #define PLL_R(x) (((x) & 0x3f) << 0) argument
34 #define PLL_F(x) (((x) & 0x1ff) << 6) argument
35 #define PLL_Q(x) (((x) & 0x7) << 15) argument
36 #define PLL_RANGE(x) (((x) & 0x7) << 18) argument
37 #define PLL_BYPASS(x) (((x) & 0x1) << 24) argument
38 #define PLL_FSE(x) (((x) & 0x1) << 25) argument
39 #define PLL_LOCK(x) (((x) & 0x1) << 31) argument
46 #define PLL_RANGE_50MHZ 5
53 #define OUTDIV_PLLCKE(x) (((x) & 0x1) << 31) argument
58 #define CLKSEL_SEL(x) (((x) & 0x1) << 0) argument
[all …]
/Zephyr-latest/drivers/sdhc/
Dsdhc_cdns_ll.h15 #define CDNS_HRS09_EXT_RD_MODE(x) ((x) << 2) argument
16 #define CDNS_HRS09_EXTENDED_WR(x) ((x) << 3) argument
17 #define CDNS_HRS09_RDCMD_EN(x) ((x) << 15) argument
18 #define CDNS_HRS09_RDDATA_EN(x) ((x) << 16) argument
36 #define CDNS_SRS10_EDTW 5
40 #define BUS_VOLTAGE_1_8_V (5 << CDNS_SRS10_BVS)
84 #define BUFFER_BOUNDARY_128K 5U
122 #define CP_USE_EXT_LPBK_DQS(x) (x << 22) argument
123 #define CP_USE_LPBK_DQS(x) (x << 21) argument
124 #define CP_USE_PHONY_DQS(x) (x << 20) argument
[all …]
/Zephyr-latest/tests/subsys/display/cfb/basic/src/
Ddraw_rect.c53 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
64 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
76 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
87 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
98 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
112 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
122 struct cfb_position start = {display_width - 5, -(23 - 8)}; in ZTEST()
123 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
128 zassert_true(verify_image(display_width - 5, 0, outside_top_right, 5, 8), ""); in ZTEST()
133 struct cfb_position start = {display_width - 3, display_height - 5}; in ZTEST()
[all …]
/Zephyr-latest/drivers/sensor/adi/adxl362/
Dadxl362.h62 #define ADXL362_STATUS_INACT (1 << 5)
70 #define ADXL362_ACT_INACT_CTL_LINKLOOP(x) (((x) & 0x3) << 4) argument
76 /* ADXL362_ACT_INACT_CTL_LINKLOOP(x) options */
84 #define ADXL362_FIFO_CTL_FIFO_MODE(x) (((x) & 0x3) << 0) argument
86 /* ADXL362_FIFO_CTL_FIFO_MODE(x) options */
95 #define ADXL362_INTMAP1_INACT (1 << 5)
105 #define ADXL362_INTMAP2_INACT (1 << 5)
113 #define ADXL362_FILTER_CTL_RANGE(x) (((x) & 0x3) << 6) argument
114 #define ADXL362_FILTER_CTL_RES (1 << 5)
117 #define ADXL362_FILTER_CTL_ODR(x) (((x) & 0x7) << 0) argument
[all …]
/Zephyr-latest/samples/subsys/zbus/priority_boost/
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/Zephyr-latest/doc/services/zbus/images/
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[all …]
/Zephyr-latest/drivers/sensor/adi/adxl367/
Dadxl367.h57 #define ADXL367_XDATA 0x08u /* X-axis acceleration data [13:6] */
63 #define ADXL367_X_DATA_H 0x0Eu /* X-axis acceleration data [13:6] */
64 #define ADXL367_X_DATA_L 0x0Fu /* X-axis acceleration data [5:0] */
66 #define ADXL367_Y_DATA_L 0x11u /* Y-axis acceleration data [5:0] */
68 #define ADXL367_Z_DATA_L 0x13u /* Z-axis acceleration data [5:0] */
70 #define ADXL367_TEMP_L 0x15u /* Temperate data [5:0] */
72 #define ADXL367_EX_ADC_L 0x17u /* Extended ADC data [5:0] */
76 #define ADXL367_THRESH_ACT_L 0x21u /* Activity Threshold [5:0] */
79 #define ADXL367_THRESH_INACT_L 0x24u /* Inactivity Threshold [5:0] */
81 #define ADXL367_TIME_INACT_L 0x26u /* Inactivity Time [5:0] */
[all …]
/Zephyr-latest/doc/services/pm/images/
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94 Padding 5

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