| /Zephyr-latest/subsys/bluetooth/crypto/ |
| D | bt_crypto.h | 2 * SPDX-License-Identifier: Apache-2.0
14 * @brief Cypher based Message Authentication Code (CMAC) with AES 128 bit
18 * @param[in] key 128-bit key
24 * @retval -EIO Computation failed.
33 * @param[in] u 256-bit
34 * @param[in] v 256-bit
35 * @param[in] x 128-bit key
36 * @param[in] z 8-bit
40 * @retval -EIO Computation failed.
42 int bt_crypto_f4(const uint8_t *u, const uint8_t *v, const uint8_t *x, uint8_t z, uint8_t res[16]);
[all …]
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| /Zephyr-latest/include/zephyr/bluetooth/ |
| D | crypto.h | 6 * Copyright (c) 2017-2020 Nordic Semiconductor ASA
7 * Copyright (c) 2015-2017 Intel Corporation
9 * SPDX-License-Identifier: Apache-2.0
41 /** @brief AES encrypt little-endian data.
47 * @param key 128 bit LS byte first key for the encryption of the plaintext
48 * @param plaintext 128 bit LS byte first plaintext data block to be encrypted
49 * @param enc_data 128 bit LS byte first encrypted data block
53 int bt_encrypt_le(const uint8_t key[16], const uint8_t plaintext[16],
54 uint8_t enc_data[16]);
56 /** @brief AES encrypt big-endian data.
[all …]
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| /Zephyr-latest/dts/bindings/clock/ |
| D | st,stm32g0-hsi-clock.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 On STM32G0, HSI is a 16MHz fixed clock.
9 source. In that case, a HSI divisor (ranges from 1 to 128) can be applied:
12 - 1 ==> HSISYS = 16MHZ
13 - 2 ==> HSISYS = 8MHZ
14 - 4 ==> HSISYS = 4MHZ
15 - 8 ==> HSISYS = 2MHZ
16 - 16 ==> HSISYS = 1MHZ
17 - 32 ==> HSISYS = 0.5MHz
18 - 64 ==> HSISYS = 0.25MHZ
[all …]
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| D | st,stm32wb-rcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 For more description confere st,stm32-rcc.yaml
8 compatible: "st,stm32wb-rcc"
11 - name: st,stm32-rcc.yaml
12 property-blocklist:
13 - ahb-prescaler
16 cpu1-prescaler:
20 - 1
21 - 2
22 - 3
[all …]
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| D | st,stm32c0-hsi-clock.yaml | 2 # SPDX-License-Identifier: Apache-2.0
9 source. In that case, a HSI divisor (ranges from 1 to 128) can be applied:
12 - 1 ==> HSISYS = 48MHZ
13 - 2 ==> HSISYS = 24MHZ
14 - 4 ==> HSISYS = 12MHZ
15 - 8 ==> HSISYS = 6MHZ
16 - 16 ==> HSISYS = 3MHZ
17 - 32 ==> HSISYS = 1.5MHz
18 - 64 ==> HSISYS = 0.75MHZ
19 - 128 ==> HSISYS = 0.375MHz
[all …]
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| D | st,stm32wl-rcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 For more description confere st,stm32-rcc.yaml
8 compatible: "st,stm32wl-rcc"
11 - name: st,stm32wb-rcc.yaml
12 property-blocklist:
13 - ahb4-prescaler
14 - cpu2-prescaler
17 cpu2-prescaler:
20 - 1
21 - 2
[all …]
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| D | st,stm32u5-pll-clock.yaml | 2 # SPDX-License-Identifier: Apache-2.0
10 an input frequency from 4 to 16 MHz. PLLM factor is used to set the input
27 compatible: "st,stm32u5-pll-clock"
29 include: [clock-controller.yaml, base.yaml]
33 "#clock-cells":
39 div-m:
45 Valid range: 1 - 16
47 mul-n:
52 Valid range: 4 - 512
54 div-p:
[all …]
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| D | st,stm32f3-rcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 For more description confere st,stm32-rcc.yaml
9 compatible: "st,stm32f3-rcc"
11 include: st,stm32-rcc.yaml
14 adc12-prescaler:
17 - 0 # Synchronous mode
18 - 1 # not divided
19 - 2
20 - 4
21 - 6
[all …]
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| D | st,stm32h7rs-rcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
14 "clock-frequency" property.
20 clock-frequency = <DT_FREQ_M(280)>; /* SYSCLK runs at 280MHz */
29 Confere st,stm32-rcc binding for information about domain clocks configuration.
31 compatible: "st,stm32h7rs-rcc"
33 include: [clock-controller.yaml, base.yaml]
39 "#clock-cells":
42 clock-frequency:
52 - 1
53 - 2
[all …]
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| /Zephyr-latest/soc/nuvoton/npcx/common/ |
| D | soc_ncl.h | 4 * SPDX-License-Identifier: Apache-2.0
37 * Security strength (bits) 112 128 192 256 128_Test 256_Test
39 * Entropy size (Bytes) 32 48 64 96 111 128
40 * Nonce size (Bytes) 16 16 24 32 16 0
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| /Zephyr-latest/drivers/espi/ |
| D | Kconfig.it8xxx2 | 2 # SPDX-License-Identifier: Apache-2.0
35 bool "16"
44 bool "128"
63 default 16 if IT8XXX2_H2RAM_HC_SIZE_16
66 default 128 if IT8XXX2_H2RAM_HC_SIZE_128
81 bool "16"
90 bool "128"
109 default 16 if IT8XXX2_H2RAM_ACPI_SHM_SIZE_16
112 default 128 if IT8XXX2_H2RAM_ACPI_SHM_SIZE_128
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| /Zephyr-latest/tests/bluetooth/uuid/src/ |
| D | test_bt_uuid_cmp.c | 2 * SPDX-License-Identifier: Apache-2.0
19 /* Compare UUID 16 bits */ in ZTEST()
23 /* Compare UUID 128 bits */ in ZTEST()
27 /* Compare UUID 16 bits with UUID 128 bits */ in ZTEST()
31 /* Compare different UUID 16 bits */ in ZTEST()
35 /* Compare different UUID 128 bits */ in ZTEST()
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| D | test_bt_uuid_create.c | 2 * SPDX-License-Identifier: Apache-2.0
25 /* Create UUID from LE 16 bit byte array */ in ZTEST()
29 /* Compare UUID 16 bits */ in ZTEST()
33 /* Compare UUID 128 bits */ in ZTEST()
37 /* Compare swapped UUID 16 bits */ in ZTEST()
41 /* Create UUID from BE 16 bit byte array */ in ZTEST()
45 /* Compare UUID 16 bits */ in ZTEST()
49 /* Compare UUID 128 bits */ in ZTEST()
53 /* Compare swapped UUID 16 bits */ in ZTEST()
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| /Zephyr-latest/drivers/can/ |
| D | Kconfig.nxp_s32 | 1 # Copyright 2022-2024 NXP
2 # SPDX-License-Identifier: Apache-2.0
23 default 16
25 range 1 128 if !CAN_NXP_S32_RX_FIFO
31 default 16
32 range 1 128
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| /Zephyr-latest/boards/snps/nsim/arc_classic/support/ |
| D | mdb_vpx5.args | 1 -arcv2hs
2 -core4
3 -uarch_rev=1:4
4 -Xcode_density
5 -rgf_num_banks=1
6 -rgf_num_wr_ports=2
7 -Xatomic
8 -Xll64
9 -Xunaligned
10 -Xdiv_rem=radix4
[all …]
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| D | nsim_vpx5.props | 54 icache=32768,128,4,a
62 nsim_isa_pct_counters=16
74 nsim_stu_initiator_dbw=128
84 nsim_isa_vec_mem_bank_width=16
85 nsim_isa_vec_max_fetch_size=16
105 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=23
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| /Zephyr-latest/drivers/flash/ |
| D | flash_gd32_v3.c | 4 * SPDX-License-Identifier: Apache-2.0
25 {.pages_count = 4, .pages_size = KB(16)},
27 {.pages_count = 3, .pages_size = KB(128)},
31 {.pages_count = 4, .pages_size = KB(16)},
33 {.pages_count = 7, .pages_size = KB(128)},
37 {.pages_count = 4, .pages_size = KB(16)},
39 {.pages_count = 7, .pages_size = KB(128)},
40 {.pages_count = 4, .pages_size = KB(16)},
42 {.pages_count = 7, .pages_size = KB(128)},
46 {.pages_count = 4, .pages_size = KB(16)},
[all …]
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| /Zephyr-latest/soc/intel/intel_adsp/cavs/ |
| D | asm_ldo_management.h | 2 * SPDX-License-Identifier: Apache-2.0
12 #define SHIM_LDOCTL_HPSRAM_MASK (3 << 0 | 3 << 16)
14 #define SHIM_LDOCTL_HPSRAM_LDO_ON (3 << 0 | 3 << 16)
18 #define SHIM_LDOCTL_HPSRAM_LDO_BYPASS (BIT(0) | BIT(16))
26 movi \ax, 128
28 addi \ax, \ax, -1
69 movi \ax, 128
71 addi \ax, \ax, -1
89 movi \ax, 128
91 addi \ax, \ax, -1
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| /Zephyr-latest/dts/arm/adi/max32/ |
| D | max32690.dtsi | 2 * Copyright (c) 2023-2024 Analog Devices, Inc.
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/dma/max32690_dma.h>
12 clock-frequency = <DT_FREQ_M(120)>;
16 reg = <0x20000000 DT_SIZE_K(128)>;
21 erase-block-size = <16384>;
29 compatible = "adi,max32-gpio";
30 gpio-controller;
31 #gpio-cells = <2>;
[all …]
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| /Zephyr-latest/subsys/net/lib/http/ |
| D | http_parser_url.c | 1 /* SPDX-License-Identifier: MIT */
41 /* Set the mark FOR; non-destructive if mark is already set */
61 0 | T(2) | 0 | 0 | T(16) | 0 | 0 | 0,
62 /* 16 dle 17 dc1 18 dc2 19 dc3 20 dc4 21 nak 22 syn 23 etb */
67 0 | 2 | 4 | 0 | 16 | 32 | 64 | 128,
68 /* 40 ( 41 ) 42 * 43 + 44 , 45 - 46 . 47 / */
69 1 | 2 | 4 | 8 | 16 | 32 | 64 | 128,
71 1 | 2 | 4 | 8 | 16 | 32 | 64 | 128,
73 1 | 2 | 4 | 8 | 16 | 32 | 64 | 0,
75 1 | 2 | 4 | 8 | 16 | 32 | 64 | 128,
[all …]
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| /Zephyr-latest/subsys/bluetooth/host/ |
| D | crypto_psa.c | 3 * Copyright (c) 2015-2016 Intel Corporation
5 * SPDX-License-Identifier: Apache-2.0
34 return -EIO; in prng_init()
47 return -EIO; in bt_rand()
53 return -EINVAL; in bt_rand()
60 int bt_encrypt_le(const uint8_t key[16], const uint8_t plaintext[16], in bt_encrypt_le() argument
61 uint8_t enc_data[16]) in bt_encrypt_le() argument
67 uint8_t tmp[16]; in bt_encrypt_le()
70 return -EINVAL; in bt_encrypt_le()
73 LOG_DBG("key %s", bt_hex(key, 16)); in bt_encrypt_le()
[all …]
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| /Zephyr-latest/boards/snps/nsim/arc_v/support/ |
| D | rmx100.props | 2 nsim_isa_ext=-all.i.zicsr.zifencei.zihintpause.a.m.zba.zbb.zbs.zca.zcb.zcmp.zcmt.zicbom
4 nsim_mem-dev=clint,base=0x2000000,size=4096
5 nsim_mem-dev=uart0,kind=16550,base=0x10000000,irq=24
6 nsim_mem-dev=plic,base=0xc000000,size=0x04000000,interrupts=128,priorities=16
8 mpu_regions=16
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| /Zephyr-latest/boards/shields/g1120b0mipi/ |
| D | Kconfig.defconfig | 2 # SPDX-License-Identifier: Apache-2.0
22 # Swap 16 bit color setting for LVGL, to send high byte first
27 default 16
30 default 128
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| /Zephyr-latest/boards/shields/ls0xx_generic/ |
| D | ls013b7dh03.overlay | 4 * SPDX-License-Identifier: Apache-2.0
15 cs-gpios = <&arduino_header 16 GPIO_ACTIVE_HIGH>; /* D10 */
19 spi-max-frequency = <2000000>;
21 width = <128>;
22 height = <128>;
23 extcomin-gpios = <&arduino_header 14 GPIO_ACTIVE_HIGH>; /* D8 */
24 extcomin-frequency = <60>; /* required if extcomin-gpios is defined */
25 disp-en-gpios = <&arduino_header 12 GPIO_ACTIVE_HIGH>; /* D6 */
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| /Zephyr-latest/soc/st/stm32/ |
| D | Kconfig.defconfig | 3 # Copyright (c) 2017, I-SENSE group of ICCS
4 # SPDX-License-Identifier: Apache-2.0
19 DT_STM32_RCC_CLOCK_FREQ := $(dt_node_int_prop_int,$(DT_STM32_RCC_PATH),clock-frequency)
40 default 4096 if "$(dt_node_int_prop_int,$(DT_STM32_LPTIM_PATH),$(DT_ST_PRESCALER))" < 16
41 default 2048 if "$(dt_node_int_prop_int,$(DT_STM32_LPTIM_PATH),$(DT_ST_PRESCALER))" = 16
44 default 256 if "$(dt_node_int_prop_int,$(DT_STM32_LPTIM_PATH),$(DT_ST_PRESCALER))" = 128
48 default 4000 if "$(dt_node_int_prop_int,$(DT_STM32_LPTIM_PATH),$(DT_ST_PRESCALER))" < 16
49 default 2000 if "$(dt_node_int_prop_int,$(DT_STM32_LPTIM_PATH),$(DT_ST_PRESCALER))" = 16
52 default 250 if "$(dt_node_int_prop_int,$(DT_STM32_LPTIM_PATH),$(DT_ST_PRESCALER))" = 128
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