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/Zephyr-latest/soc/nxp/imxrt/imxrt11xx/
Dpower.h16 #define SP1 1
44 /* SP1*/{{ 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \
45 /* SP2 */{ 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \
46 /* SP3 */{ 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \
47 /* SP0 */{ 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \
48 /* SP4 */{ 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \
49 /* SP5 */{ 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \
50 /* SP6 */{ 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \
51 /* SP7 */{ 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0}, \
52 /* SP8 */{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, \
[all …]
/Zephyr-latest/drivers/display/
Dmb_font.c19 MB_IMAGE({ 0, 1, 0, 0, 0 },
20 { 0, 1, 0, 0, 0 },
21 { 0, 1, 0, 0, 0 },
23 { 0, 1, 0, 0, 0 }),
25 MB_IMAGE({ 0, 1, 0, 1, 0 },
26 { 0, 1, 0, 1, 0 },
31 MB_IMAGE({ 0, 1, 0, 1, 0 },
32 { 1, 1, 1, 1, 1 },
33 { 0, 1, 0, 1, 0 },
34 { 1, 1, 1, 1, 1 },
[all …]
Ddisplay_rm68200.c110 return gpio_pin_set_dt(&config->bl_gpio, 1); in rm68200_blanking_off()
198 * reset:0 -> reset:1 in rm68200_init()
203 gpio_pin_set_dt(&config->reset_gpio, 1); in rm68200_init()
209 rm68200_dcs_write(dev, DCS_CMD_PAGE, &param, 1); in rm68200_init()
212 rm68200_dcs_write(dev, MCS_EXT_PWR_IC_TYPE, &param, 1); in rm68200_init()
215 rm68200_dcs_write(dev, MCS_EXT_PWR_SET_AVDD, &param, 1); in rm68200_init()
218 rm68200_dcs_write(dev, MCS_AVEE_FROM_PFM, &param, 1); in rm68200_init()
221 rm68200_dcs_write(dev, MCS_BT2CTR, &param, 1); in rm68200_init()
224 rm68200_dcs_write(dev, MCS_AVDD_FROM_PFM, &param, 1); in rm68200_init()
227 rm68200_dcs_write(dev, MCS_SETAVEE, &param, 1); in rm68200_init()
[all …]
/Zephyr-latest/include/zephyr/drivers/flash/
Dra_flash_api_extensions.h21 uint32_t b000: 1;
22 uint32_t b001: 1;
23 uint32_t b002: 1;
24 uint32_t b003: 1;
25 uint32_t b004: 1;
26 uint32_t b005: 1;
27 uint32_t b006: 1;
28 uint32_t b007: 1;
29 uint32_t b008: 1;
30 uint32_t b009: 1;
[all …]
/Zephyr-latest/samples/bluetooth/mesh_demo/src/
Dmicrobit.c27 #define SEQ_PAGE (NRF_FICR->CODEPAGESIZE * (NRF_FICR->CODESIZE - 1))
123 if (str[1] == '#') { in board_play_tune()
147 MB_IMAGE({ 1, 1, 1, 1, 1 }, in board_heartbeat()
148 { 1, 1, 1, 1, 1 }, in board_heartbeat()
149 { 1, 1, 1, 1, 1 }, in board_heartbeat()
150 { 1, 1, 1, 1, 1 }, in board_heartbeat()
151 { 1, 1, 1, 1, 1 }), in board_heartbeat()
152 MB_IMAGE({ 1, 1, 1, 1, 1 }, in board_heartbeat()
153 { 1, 1, 1, 1, 1 }, in board_heartbeat()
154 { 1, 1, 0, 1, 1 }, in board_heartbeat()
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/Zephyr-latest/samples/boards/bbc/microbit/display/src/
Dmain.c13 static struct mb_image smiley = MB_IMAGE({ 0, 1, 0, 1, 0 },
14 { 0, 1, 0, 1, 0 },
16 { 1, 0, 0, 0, 1 },
17 { 0, 1, 1, 1, 0 });
20 MB_IMAGE({ 1, 0, 0, 0, 0 },
21 { 1, 0, 0, 0, 1 },
22 { 1, 0, 0, 1, 0 },
23 { 1, 0, 1, 0, 0 },
24 { 1, 1, 0, 0, 0 }),
25 MB_IMAGE({ 1, 0, 0, 0, 0 },
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/Zephyr-latest/modules/thrift/src/thrift/
Dconfig.h13 #define ARITHMETIC_RIGHT_SHIFT 1
15 /* Define to 1 if you have the <arpa/inet.h> header file. */
16 #define HAVE_ARPA_INET_H 1
18 /* Define to 1 if you have the `clock_gettime' function. */
19 #define HAVE_CLOCK_GETTIME 1
22 #define HAVE_CXX11 1
24 /* Define to 1 if you have the <fcntl.h> header file. */
25 #define HAVE_FCNTL_H 1
27 /* Define to 1 if you have the `gethostbyname' function. */
28 #define HAVE_GETHOSTBYNAME 1
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/Zephyr-latest/modules/hal_nordic/nrfx/
Dnrfx_config.h21 #define NRFX_ADC_ENABLED 1
24 #define NRFX_ADC_CONFIG_LOG_ENABLED 1
28 #define NRFX_CLOCK_ENABLED 1
31 #define NRFX_CLOCK_CONFIG_LOG_ENABLED 1
36 #define NRFX_CLOCK_CONFIG_LF_SRC 1
46 #define NRFX_CLOCK_CONFIG_LF_SRC 1
67 #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 1
71 #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 1
75 #define NRFX_COMP_ENABLED 1
78 #define NRFX_COMP_CONFIG_LOG_ENABLED 1
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/Zephyr-latest/modules/mbedtls/configs/
Dconfig-psa.h16 #define PSA_WANT_ALG_CBC_NO_PADDING 1
20 #define PSA_WANT_ALG_CBC_PKCS7 1
24 #define PSA_WANT_ALG_CCM 1
28 #define PSA_WANT_ALG_CCM_STAR_NO_TAG 1
32 #define PSA_WANT_ALG_CMAC 1
36 #define PSA_WANT_ALG_CFB 1
40 #define PSA_WANT_ALG_CHACHA20_POLY1305 1
44 #define PSA_WANT_ALG_CTR 1
48 #define PSA_WANT_ALG_DETERMINISTIC_ECDSA 1
52 #define PSA_WANT_ALG_ECB_NO_PADDING 1
[all …]
/Zephyr-latest/drivers/gpio/
Dgpio_max14906.h34 #define MAX149x6_ADDR_MASK GENMASK(4, 1)
43 #define MAX14906_DO_MASK(x) (GENMASK(1, 0) << (2 * (x)))
47 #define MAX14906_CL_MASK(x) (GENMASK(1, 0) << (2 * (x)))
54 MAX14906_ADDR_1, /* A0=1, A1=0 */
55 MAX14906_ADDR_2, /* A0=0, A1=1 */
56 MAX14906_ADDR_3, /* A0=1, A1=1 */
96 uint8_t VDDOK_FAULT1: 1; /* BIT0 */
97 uint8_t VDDOK_FAULT2: 1;
98 uint8_t VDDOK_FAULT3: 1;
99 uint8_t VDDOK_FAULT4: 1;
[all …]
/Zephyr-latest/boards/snps/nsim/arc_classic/support/
Dnsim_vpx5.props4 nsim_isa_uarch_rev_major=1
7 nsim_isa_rgf_num_banks=1
14 nsim_isa_atomic_option=1
15 nsim_isa_ll64_option=1
16 nsim_isa_unaligned_option=1
18 nsim_isa_swap_option=1
19 nsim_isa_bitscan_option=1
22 nsim_isa_enable_timer_0=1
24 nsim_isa_enable_timer_1=1
26 nsim_isa_rtc_option=1
[all …]
Dnsim_em.props13 nsim_isa_div_rem_option=1
14 nsim_isa_turbo_boost=1
15 nsim_isa_swap_option=1
16 nsim_isa_bitscan_option=1
22 nsim_isa_dsp_complex_option=1
23 nsim_isa_dsp_divsqrt_option=1
24 nsim_isa_dsp_itu_option=1
25 nsim_isa_dsp_itu_option=1
29 nsim_isa_agu_accord=1
30 nsim_isa_xy=1
[all …]
Dnsim_sem_mpu_stack_guard.props4 nsim_isa_rgf_num_banks=1
6 nsim_isa_rgf_num_wr_ports=1
12 nsim_isa_div_rem_option=1
13 nsim_isa_turbo_boost=1
14 nsim_isa_swap_option=1
15 nsim_isa_bitscan_option=1
19 nsim_isa_dsp_complex_option=1
20 nsim_isa_dsp_divsqrt_option=1
21 nsim_isa_dsp_accshift_option=1
22 nsim_isa_fpuda_option=1
[all …]
Dnsim_sem.props4 nsim_isa_rgf_num_banks=1
6 nsim_isa_rgf_num_wr_ports=1
12 nsim_isa_div_rem_option=1
13 nsim_isa_turbo_boost=1
14 nsim_isa_swap_option=1
15 nsim_isa_bitscan_option=1
19 nsim_isa_dsp_complex_option=1
20 nsim_isa_dsp_divsqrt_option=1
21 nsim_isa_dsp_accshift_option=1
22 nsim_isa_fpuda_option=1
[all …]
Dnsim_em11d.props4 nsim_isa_rgf_num_banks=1
13 nsim_isa_div_rem_option=1
14 nsim_isa_turbo_boost=1
15 nsim_isa_swap_option=1
16 nsim_isa_bitscan_option=1
22 nsim_isa_dsp_complex_option=1
23 nsim_isa_dsp_divsqrt_option=1
24 nsim_isa_dsp_itu_option=1
25 nsim_isa_dsp_itu_option=1
29 nsim_isa_agu_accord=1
[all …]
Dnsim_em7d_v22.props4 nsim_isa_rgf_num_banks=1
6 nsim_isa_rgf_num_wr_ports=1
12 nsim_isa_div_rem_option=1
13 nsim_isa_turbo_boost=1
14 nsim_isa_swap_option=1
15 nsim_isa_bitscan_option=1
19 nsim_isa_dsp_complex_option=1
20 nsim_isa_dsp_divsqrt_option=1
21 nsim_isa_dsp_accshift_option=1
22 nsim_isa_fpuda_option=1
[all …]
/Zephyr-latest/samples/bluetooth/mesh/src/
Dmicrobit.c24 MB_IMAGE({ 1, 1, 1, 1, 1 },
25 { 1, 1, 1, 1, 1 },
26 { 1, 1, 1, 1, 1 },
27 { 1, 1, 1, 1, 1 },
28 { 1, 1, 1, 1, 1 }),
64 const struct mb_image arrow = MB_IMAGE({ 0, 0, 1, 0, 0 }, in board_output_number()
65 { 0, 1, 0, 0, 0 }, in board_output_number()
66 { 1, 1, 1, 1, 1 }, in board_output_number()
67 { 0, 1, 0, 0, 0 }, in board_output_number()
68 { 0, 0, 1, 0, 0 }); in board_output_number()
[all …]
/Zephyr-latest/dts/bindings/flash_controller/
Dst,stm32-ospi-nor.yaml45 - OSPI_SPI_MODE <1> = SPI mode on 1 data line
50 - 1
61 - OSPI_STR_TRANSFER <1> = Single Rate Transfer
64 - 1
70 - "PP_1_1_2" # Dual page program, PP 1-1-2 (0xA2)
71 - "PP_1_1_4" # Quad data line SPI, PP 1-1-4 (0x32)
72 - "PP_1_4_4" # Quad data line SPI, PP 1-4-4 (0x38)
79 supporting 1-4-4 mode also would support fast page programming.
86 * OSPI_SPI_MODE -> PP 1-1-1 (0x02)
87 * OSPI_DUAL_MODE -> PP 1-1-2 (0xA2)
[all …]
/Zephyr-latest/include/zephyr/posix/sys/
Dsysconf.h144 #define __z_posix_sysconf_SC_ADVISORY_INFO (-1L)
146 COND_CODE_1(CONFIG_POSIX_ASYNCHRONOUS_IO, (_POSIX_ASYNCHRONOUS_IO), (-1L))
147 #define __z_posix_sysconf_SC_BARRIERS COND_CODE_1(CONFIG_POSIX_BARRIERS, (_POSIX_BARRIERS), (-1L))
149 COND_CODE_1(CONFIG_POSIX_CLOCK_SELECTION, (_POSIX_CLOCK_SELECTION), (-1L))
151 COND_CODE_1(CONFIG_POSIX_CPUTIME, (_POSIX_CPUTIME), (-1L))
153 COND_CODE_1(CONFIG_POSIX_FSYNC, (_POSIX_FSYNC), (-1L))
154 #define __z_posix_sysconf_SC_IPV6 COND_CODE_1(CONFIG_NET_IPV6, (_POSIX_IPV6), (-1L))
155 #define __z_posix_sysconf_SC_JOB_CONTROL (-1L)
157 COND_CODE_1(CONFIG_POSIX_MAPPED_FILES, (_POSIX_MAPPED_FILES), (-1L))
159 COND_CODE_1(CONFIG_POSIX_MEMLOCK, (_POSIX_MEMLOCK), (-1L))
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/Zephyr-latest/subsys/usb/device_next/class/
Dusbd_hid_macros.h22 #define HID_MPS_LESS_65_0 1
23 #define HID_MPS_LESS_65_1 1
24 #define HID_MPS_LESS_65_2 1
25 #define HID_MPS_LESS_65_3 1
26 #define HID_MPS_LESS_65_4 1
27 #define HID_MPS_LESS_65_5 1
28 #define HID_MPS_LESS_65_6 1
29 #define HID_MPS_LESS_65_7 1
30 #define HID_MPS_LESS_65_8 1
31 #define HID_MPS_LESS_65_9 1
[all …]
/Zephyr-latest/tests/posix/headers/src/
Dsignal_h.c31 /* zassert_not_equal(-1, SIG_HOLD); */ /* not implemented */ in ZTEST()
33 zassert_not_equal((sig_atomic_t)-1, (sig_atomic_t)0); in ZTEST()
34 zassert_not_equal((pid_t)-1, (pid_t)0); in ZTEST()
36 zassert_not_equal(-1, offsetof(struct sigevent, sigev_notify)); in ZTEST()
37 zassert_not_equal(-1, offsetof(struct sigevent, sigev_signo)); in ZTEST()
38 zassert_not_equal(-1, offsetof(struct sigevent, sigev_value)); in ZTEST()
39 zassert_not_equal(-1, offsetof(struct sigevent, sigev_notify_function)); in ZTEST()
40 zassert_not_equal(-1, offsetof(struct sigevent, sigev_notify_attributes)); in ZTEST()
42 zassert_not_equal(-1, SIGEV_NONE); in ZTEST()
43 zassert_not_equal(-1, SIGEV_SIGNAL); in ZTEST()
[all …]
Dnetdb_h.c22 zassert_not_equal(-1, offsetof(struct hostent, h_name)); in ZTEST()
23 zassert_not_equal(-1, offsetof(struct hostent, h_aliases)); in ZTEST()
24 zassert_not_equal(-1, offsetof(struct hostent, h_addrtype)); in ZTEST()
25 zassert_not_equal(-1, offsetof(struct hostent, h_length)); in ZTEST()
26 zassert_not_equal(-1, offsetof(struct hostent, h_addr_list)); in ZTEST()
28 zassert_not_equal(-1, offsetof(struct netent, n_name)); in ZTEST()
29 zassert_not_equal(-1, offsetof(struct netent, n_aliases)); in ZTEST()
30 zassert_not_equal(-1, offsetof(struct netent, n_addrtype)); in ZTEST()
31 zassert_not_equal(-1, offsetof(struct netent, n_net)); in ZTEST()
33 zassert_not_equal(-1, offsetof(struct protoent, p_name)); in ZTEST()
[all …]
/Zephyr-latest/dts/bindings/mtd/
Dnxp,s32-qspi-nor.yaml20 - "1-1-1" # 0x0B
21 - "1-1-2" # 0x3B
22 - "1-2-2" # 0xBB
23 - "1-1-4" # 0x6B
24 - "1-4-4" # 0xEB
27 If not provided, 1-1-1 will be selected.
32 - "1-1-1" # 0x02
33 - "1-1-2" # 0xA2
34 - "1-1-4" # 0x32
35 - "1-4-4" # 0x38
[all …]
/Zephyr-latest/drivers/dai/intel/alh/
Dalh_map.h13 * -1 identifies invalid handshakes/streams
16 -1, /* 0 - INVALID */
17 -1, /* 1 - INVALID */
18 -1, /* 2 - INVALID */
19 -1, /* 3 - INVALID */
20 -1, /* 4 - INVALID */
21 -1, /* 5 - INVALID */
22 -1, /* 6 - INVALID */
29 -1, /* 13 - INVALID */
30 -1, /* 14 - INVALID */
[all …]
/Zephyr-latest/soc/altr/zephyr_nios2f/cpu/
Dghrd_10m50da.qsys101 value = "1";
162 value = "1";
175 value = "1";
183 value = "1";
196 value = "1";
217 value = "1";
292 <parameter name="maxAdditionalLatency" value="1" />
336 enabled="1">
341 <parameter name="FIFO_MODE" value="1" />
3461 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED…
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