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21 #define NRFX_ADC_ENABLED 1
24 #define NRFX_ADC_CONFIG_LOG_ENABLED 1
28 #define NRFX_CLOCK_ENABLED 1
31 #define NRFX_CLOCK_CONFIG_LOG_ENABLED 1
36 #define NRFX_CLOCK_CONFIG_LF_SRC 1
46 #define NRFX_CLOCK_CONFIG_LF_SRC 1
67 #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 1
71 #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 1
75 #define NRFX_COMP_ENABLED 1
78 #define NRFX_COMP_CONFIG_LOG_ENABLED 1
82 #define NRFX_DPPI_ENABLED 1
85 #define NRFX_DPPI_CONFIG_LOG_ENABLED 1
88 #define NRFX_DPPI0_ENABLED 1
91 #define NRFX_DPPI00_ENABLED 1
94 #define NRFX_DPPI10_ENABLED 1
97 #define NRFX_DPPI20_ENABLED 1
100 #define NRFX_DPPI30_ENABLED 1
103 #define NRFX_DPPI020_ENABLED 1
106 #define NRFX_DPPI120_ENABLED 1
109 #define NRFX_DPPI130_ENABLED 1
112 #define NRFX_DPPI131_ENABLED 1
115 #define NRFX_DPPI132_ENABLED 1
118 #define NRFX_DPPI133_ENABLED 1
121 #define NRFX_DPPI134_ENABLED 1
124 #define NRFX_DPPI135_ENABLED 1
127 #define NRFX_DPPI136_ENABLED 1
131 #define NRFX_EGU_ENABLED 1
134 #define NRFX_EGU_CONFIG_LOG_ENABLED 1
137 #define NRFX_EGU0_ENABLED 1
140 #define NRFX_EGU1_ENABLED 1
143 #define NRFX_EGU2_ENABLED 1
146 #define NRFX_EGU3_ENABLED 1
149 #define NRFX_EGU4_ENABLED 1
152 #define NRFX_EGU5_ENABLED 1
155 #define NRFX_EGU10_ENABLED 1
158 #define NRFX_EGU20_ENABLED 1
161 #define NRFX_EGU020_ENABLED 1
164 #define NRFX_EGU130_ENABLED 1
168 #define NRFX_GRTC_ENABLED 1
171 #define NRFX_GRTC_CONFIG_LOG_ENABLED 1
175 #define NRF_GRTC_HAS_EXTENDED 1
178 #define NRFX_GRTC_CONFIG_AUTOEN 1
181 #define NRFX_GRTC_CONFIG_AUTOSTART 1
185 #define NRFX_GPIOTE_ENABLED 1
188 #define NRFX_GPIOTE0_ENABLED 1
191 #define NRFX_GPIOTE1_ENABLED 1
194 #define NRFX_GPIOTE20_ENABLED 1
197 #define NRFX_GPIOTE30_ENABLED 1
200 #define NRFX_GPIOTE130_ENABLED 1
203 #define NRFX_GPIOTE131_ENABLED 1
211 #define NRFX_I2S_ENABLED 1
214 #define NRFX_I2S_CONFIG_LOG_ENABLED 1
217 #define NRFX_I2S0_ENABLED 1
220 #define NRFX_I2S20_ENABLED 1
224 #define NRFX_IPC_ENABLED 1
227 #define NRFX_IPC_CONFIG_LOG_ENABLED 1
231 #define NRFX_LPCOMP_ENABLED 1
234 #define NRFX_LPCOMP_CONFIG_LOG_ENABLED 1
238 #define NRFX_NFCT_ENABLED 1
241 #define NRFX_NFCT_CONFIG_LOG_ENABLED 1
245 #define NRFX_NVMC_ENABLED 1
248 #define NRFX_NVMC_CONFIG_LOG_ENABLED 1
252 #define NRFX_PDM_ENABLED 1
255 #define NRFX_PDM_CONFIG_LOG_ENABLED 1
258 #define NRFX_PDM0_ENABLED 1
261 #define NRFX_PDM20_ENABLED 1
264 #define NRFX_PDM21_ENABLED 1
268 #define NRFX_POWER_ENABLED 1
271 #define NRFX_POWER_CONFIG_LOG_ENABLED 1
275 #define NRFX_PPI_ENABLED 1
278 #define NRFX_PPI_CONFIG_LOG_ENABLED 1
282 #define NRFX_PPIB_ENABLED 1
285 #define NRFX_PPIB_CONFIG_LOG_ENABLED 1
288 #define NRFX_PPIB00_ENABLED 1
291 #define NRFX_PPIB01_ENABLED 1
294 #define NRFX_PPIB10_ENABLED 1
297 #define NRFX_PPIB11_ENABLED 1
300 #define NRFX_PPIB20_ENABLED 1
303 #define NRFX_PPIB21_ENABLED 1
306 #define NRFX_PPIB22_ENABLED 1
309 #define NRFX_PPIB30_ENABLED 1
313 #define NRFX_PRS_ENABLED 1
316 #define NRFX_PRS_CONFIG_LOG_ENABLED 1
319 #define NRFX_PRS_BOX_0_ENABLED 1
322 #define NRFX_PRS_BOX_1_ENABLED 1
325 #define NRFX_PRS_BOX_2_ENABLED 1
328 #define NRFX_PRS_BOX_3_ENABLED 1
331 #define NRFX_PRS_BOX_4_ENABLED 1
335 #define NRFX_PWM_ENABLED 1
338 #define NRFX_PWM_CONFIG_LOG_ENABLED 1
341 #define NRFX_PWM0_ENABLED 1
344 #define NRFX_PWM1_ENABLED 1
347 #define NRFX_PWM2_ENABLED 1
350 #define NRFX_PWM3_ENABLED 1
353 #define NRFX_PWM20_ENABLED 1
356 #define NRFX_PWM21_ENABLED 1
359 #define NRFX_PWM22_ENABLED 1
362 #define NRFX_PWM120_ENABLED 1
365 #define NRFX_PWM130_ENABLED 1
368 #define NRFX_PWM131_ENABLED 1
371 #define NRFX_PWM132_ENABLED 1
374 #define NRFX_PWM133_ENABLED 1
378 #define NRFX_QDEC_ENABLED 1
381 #define NRFX_QDEC_CONFIG_LOG_ENABLED 1
384 #define NRFX_QDEC0_ENABLED 1
387 #define NRFX_QDEC1_ENABLED 1
390 #define NRFX_QDEC20_ENABLED 1
393 #define NRFX_QDEC21_ENABLED 1
396 #define NRFX_QDEC130_ENABLED 1
399 #define NRFX_QDEC131_ENABLED 1
403 #define NRFX_QSPI_ENABLED 1
406 #define NRFX_QSPI_CONFIG_LOG_ENABLED 1
410 #define NRFX_RNG_ENABLED 1
413 #define NRFX_RNG_CONFIG_LOG_ENABLED 1
417 #define NRFX_RRAMC_ENABLED 1
421 #define NRFX_RTC_ENABLED 1
424 #define NRFX_RTC_CONFIG_LOG_ENABLED 1
427 #define NRFX_RTC0_ENABLED 1
430 #define NRFX_RTC1_ENABLED 1
433 #define NRFX_RTC2_ENABLED 1
436 #define NRFX_RTC130_ENABLED 1
439 #define NRFX_RTC131_ENABLED 1
443 #define NRFX_SAADC_ENABLED 1
446 #define NRFX_SAADC_CONFIG_LOG_ENABLED 1
450 #define NRFX_SPI_ENABLED 1
453 #define NRFX_SPI_CONFIG_LOG_ENABLED 1
456 #define NRFX_SPI0_ENABLED 1
459 #define NRFX_SPI1_ENABLED 1
462 #define NRFX_SPI2_ENABLED 1
466 #define NRFX_SPIM_ENABLED 1
469 #define NRFX_SPIM_CONFIG_LOG_ENABLED 1
472 #define NRFX_SPIM0_ENABLED 1
475 #define NRFX_SPIM1_ENABLED 1
478 #define NRFX_SPIM2_ENABLED 1
481 #define NRFX_SPIM3_ENABLED 1
483 #define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1
487 #define NRFX_SPIM4_ENABLED 1
493 #define NRFX_SPIM_EXTENDED_ENABLED 1
496 #define NRFX_SPIM00_ENABLED 1
499 #define NRFX_SPIM20_ENABLED 1
502 #define NRFX_SPIM21_ENABLED 1
505 #define NRFX_SPIM22_ENABLED 1
508 #define NRFX_SPIM30_ENABLED 1
511 #define NRFX_SPIM120_ENABLED 1
514 #define NRFX_SPIM121_ENABLED 1
517 #define NRFX_SPIM130_ENABLED 1
520 #define NRFX_SPIM131_ENABLED 1
523 #define NRFX_SPIM132_ENABLED 1
526 #define NRFX_SPIM133_ENABLED 1
529 #define NRFX_SPIM134_ENABLED 1
532 #define NRFX_SPIM135_ENABLED 1
535 #define NRFX_SPIM136_ENABLED 1
538 #define NRFX_SPIM137_ENABLED 1
542 #define NRFX_SPIS_ENABLED 1
545 #define NRFX_SPIS_CONFIG_LOG_ENABLED 1
548 #define NRFX_SPIS0_ENABLED 1
551 #define NRFX_SPIS1_ENABLED 1
554 #define NRFX_SPIS2_ENABLED 1
557 #define NRFX_SPIS3_ENABLED 1
560 #define NRFX_SPIS00_ENABLED 1
563 #define NRFX_SPIS20_ENABLED 1
566 #define NRFX_SPIS21_ENABLED 1
569 #define NRFX_SPIS22_ENABLED 1
572 #define NRFX_SPIS30_ENABLED 1
575 #define NRFX_SPIS120_ENABLED 1
578 #define NRFX_SPIS130_ENABLED 1
581 #define NRFX_SPIS131_ENABLED 1
584 #define NRFX_SPIS132_ENABLED 1
587 #define NRFX_SPIS133_ENABLED 1
590 #define NRFX_SPIS134_ENABLED 1
593 #define NRFX_SPIS135_ENABLED 1
596 #define NRFX_SPIS136_ENABLED 1
599 #define NRFX_SPIS137_ENABLED 1
603 #define NRFX_SYSTICK_ENABLED 1
606 #define NRFX_SYSTICK_CONFIG_LOG_ENABLED 1
610 #define NRFX_TBM_ENABLED 1
614 #define NRFX_TEMP_ENABLED 1
617 #define NRFX_TEMP_CONFIG_LOG_ENABLED 1
621 #define NRFX_TIMER_ENABLED 1
624 #define NRFX_TIMER_CONFIG_LOG_ENABLED 1
627 #define NRFX_TIMER0_ENABLED 1
630 #define NRFX_TIMER1_ENABLED 1
633 #define NRFX_TIMER2_ENABLED 1
636 #define NRFX_TIMER3_ENABLED 1
639 #define NRFX_TIMER4_ENABLED 1
642 #define NRFX_TIMER00_ENABLED 1
645 #define NRFX_TIMER10_ENABLED 1
648 #define NRFX_TIMER20_ENABLED 1
651 #define NRFX_TIMER21_ENABLED 1
654 #define NRFX_TIMER22_ENABLED 1
657 #define NRFX_TIMER23_ENABLED 1
660 #define NRFX_TIMER24_ENABLED 1
663 #define NRFX_TIMER020_ENABLED 1
666 #define NRFX_TIMER021_ENABLED 1
669 #define NRFX_TIMER022_ENABLED 1
672 #define NRFX_TIMER120_ENABLED 1
675 #define NRFX_TIMER121_ENABLED 1
678 #define NRFX_TIMER130_ENABLED 1
681 #define NRFX_TIMER131_ENABLED 1
684 #define NRFX_TIMER132_ENABLED 1
687 #define NRFX_TIMER133_ENABLED 1
690 #define NRFX_TIMER134_ENABLED 1
693 #define NRFX_TIMER135_ENABLED 1
696 #define NRFX_TIMER136_ENABLED 1
699 #define NRFX_TIMER137_ENABLED 1
703 #define NRFX_TWI_ENABLED 1
706 #define NRFX_TWI_CONFIG_LOG_ENABLED 1
709 #define NRFX_TWI0_ENABLED 1
712 #define NRFX_TWI1_ENABLED 1
716 #define NRFX_TWIM_ENABLED 1
719 #define NRFX_TWIM_CONFIG_LOG_ENABLED 1
722 #define NRFX_TWIM0_ENABLED 1
725 #define NRFX_TWIM1_ENABLED 1
728 #define NRFX_TWIM2_ENABLED 1
731 #define NRFX_TWIM3_ENABLED 1
734 #define NRFX_TWIM20_ENABLED 1
737 #define NRFX_TWIM21_ENABLED 1
740 #define NRFX_TWIM22_ENABLED 1
743 #define NRFX_TWIM30_ENABLED 1
746 #define NRFX_TWIM120_ENABLED 1
749 #define NRFX_TWIM130_ENABLED 1
752 #define NRFX_TWIM131_ENABLED 1
755 #define NRFX_TWIM132_ENABLED 1
758 #define NRFX_TWIM133_ENABLED 1
761 #define NRFX_TWIM134_ENABLED 1
764 #define NRFX_TWIM135_ENABLED 1
767 #define NRFX_TWIM136_ENABLED 1
770 #define NRFX_TWIM137_ENABLED 1
774 #define NRFX_TWIS_ENABLED 1
777 #define NRFX_TWIS_CONFIG_LOG_ENABLED 1
780 #define NRFX_TWIS0_ENABLED 1
783 #define NRFX_TWIS1_ENABLED 1
786 #define NRFX_TWIS2_ENABLED 1
789 #define NRFX_TWIS3_ENABLED 1
792 #define NRFX_TWIS20_ENABLED 1
795 #define NRFX_TWIS21_ENABLED 1
798 #define NRFX_TWIS22_ENABLED 1
801 #define NRFX_TWIS30_ENABLED 1
804 #define NRFX_TWIS130_ENABLED 1
807 #define NRFX_TWIS131_ENABLED 1
810 #define NRFX_TWIS132_ENABLED 1
813 #define NRFX_TWIS133_ENABLED 1
816 #define NRFX_TWIS134_ENABLED 1
819 #define NRFX_TWIS135_ENABLED 1
822 #define NRFX_TWIS136_ENABLED 1
825 #define NRFX_TWIS137_ENABLED 1
829 #define NRFX_UART_ENABLED 1
832 #define NRFX_UART_CONFIG_LOG_ENABLED 1
835 #define NRFX_UART0_ENABLED 1
839 #define NRFX_UARTE_ENABLED 1
842 #define NRFX_UARTE_CONFIG_LOG_ENABLED 1
845 #define NRFX_UARTE0_ENABLED 1
848 #define NRFX_UARTE1_ENABLED 1
851 #define NRFX_UARTE2_ENABLED 1
854 #define NRFX_UARTE3_ENABLED 1
857 #define NRFX_UARTE00_ENABLED 1
860 #define NRFX_UARTE20_ENABLED 1
863 #define NRFX_UARTE21_ENABLED 1
866 #define NRFX_UARTE22_ENABLED 1
869 #define NRFX_UARTE30_ENABLED 1
872 #define NRFX_UARTE120_ENABLED 1
875 #define NRFX_UARTE130_ENABLED 1
878 #define NRFX_UARTE131_ENABLED 1
881 #define NRFX_UARTE132_ENABLED 1
884 #define NRFX_UARTE133_ENABLED 1
887 #define NRFX_UARTE134_ENABLED 1
890 #define NRFX_UARTE135_ENABLED 1
893 #define NRFX_UARTE136_ENABLED 1
896 #define NRFX_UARTE137_ENABLED 1
899 #define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 1
902 #define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 1
905 #define NRFX_UARTE_CONFIG_TX_LINK 1
908 #define NRFX_UARTE_CONFIG_RX_CACHE_ENABLED 1
912 #define NRFX_USBREG_ENABLED 1
915 #define NRFX_USBREG_CONFIG_LOG_ENABLED 1
919 #define NRFX_WDT_ENABLED 1
922 #define NRFX_WDT_CONFIG_NO_IRQ 1
925 #define NRFX_WDT_CONFIG_LOG_ENABLED 1
928 #define NRFX_WDT0_ENABLED 1
931 #define NRFX_WDT1_ENABLED 1
934 #define NRFX_WDT30_ENABLED 1
937 #define NRFX_WDT31_ENABLED 1
940 #define NRFX_WDT010_ENABLED 1
943 #define NRFX_WDT011_ENABLED 1
946 #define NRFX_WDT130_ENABLED 1
949 #define NRFX_WDT131_ENABLED 1
952 #define NRFX_WDT132_ENABLED 1
956 #define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
957 #define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
958 #define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
959 #define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
1014 #define NRFX_DPPI_ENABLED 1