1 /* 2 * Copyright (c) 2019 - 2022, Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef NRFX_CONFIG_H__ 8 #define NRFX_CONFIG_H__ 9 10 #include <zephyr/devicetree.h> 11 #include <zephyr/sys/util_macro.h> 12 13 /* 14 * These are mappings of Kconfig options enabling nrfx drivers and particular 15 * peripheral instances to the corresponding symbols used inside of nrfx. 16 * Please note that only subsets of these entries are used for particular SoCs 17 * supported by nrfx (see the corresponding nrfx_config_*.h files). 18 */ 19 20 #ifdef CONFIG_NRFX_ADC 21 #define NRFX_ADC_ENABLED 1 22 #endif 23 #ifdef CONFIG_NRFX_ADC_LOG 24 #define NRFX_ADC_CONFIG_LOG_ENABLED 1 25 #endif 26 27 #ifdef CONFIG_NRFX_CLOCK 28 #define NRFX_CLOCK_ENABLED 1 29 #endif 30 #ifdef CONFIG_NRFX_CLOCK_LOG 31 #define NRFX_CLOCK_CONFIG_LOG_ENABLED 1 32 #endif 33 34 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC 35 #if defined(CONFIG_SOC_SERIES_NRF91X) || defined(CONFIG_SOC_COMPATIBLE_NRF53X) 36 #define NRFX_CLOCK_CONFIG_LF_SRC 1 37 #else 38 #define NRFX_CLOCK_CONFIG_LF_SRC 0 39 #endif 40 #endif // CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC 41 42 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL 43 #if defined(CONFIG_SOC_SERIES_NRF91X) || defined(CONFIG_SOC_COMPATIBLE_NRF53X) 44 #define NRFX_CLOCK_CONFIG_LF_SRC 2 45 #else 46 #define NRFX_CLOCK_CONFIG_LF_SRC 1 47 #endif 48 #endif // CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL 49 50 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH 51 #ifdef CONFIG_SOC_COMPATIBLE_NRF53X 52 #define NRFX_CLOCK_CONFIG_LF_SRC 3 53 #else 54 #define NRFX_CLOCK_CONFIG_LF_SRC 2 55 #endif 56 #endif // CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH 57 58 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_LOW_SWING 59 #define NRFX_CLOCK_CONFIG_LF_SRC 131073 60 #endif 61 62 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_FULL_SWING 63 #define NRFX_CLOCK_CONFIG_LF_SRC 196609 64 #endif 65 66 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION 67 #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 1 68 #endif 69 70 #ifdef CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED 71 #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 1 72 #endif 73 74 #ifdef CONFIG_NRFX_COMP 75 #define NRFX_COMP_ENABLED 1 76 #endif 77 #ifdef CONFIG_NRFX_COMP_LOG 78 #define NRFX_COMP_CONFIG_LOG_ENABLED 1 79 #endif 80 81 #ifdef CONFIG_NRFX_DPPI 82 #define NRFX_DPPI_ENABLED 1 83 #endif 84 #ifdef CONFIG_NRFX_DPPI_LOG 85 #define NRFX_DPPI_CONFIG_LOG_ENABLED 1 86 #endif 87 #ifdef CONFIG_NRFX_DPPI0 88 #define NRFX_DPPI0_ENABLED 1 89 #endif 90 #ifdef CONFIG_NRFX_DPPI00 91 #define NRFX_DPPI00_ENABLED 1 92 #endif 93 #ifdef CONFIG_NRFX_DPPI10 94 #define NRFX_DPPI10_ENABLED 1 95 #endif 96 #ifdef CONFIG_NRFX_DPPI20 97 #define NRFX_DPPI20_ENABLED 1 98 #endif 99 #ifdef CONFIG_NRFX_DPPI30 100 #define NRFX_DPPI30_ENABLED 1 101 #endif 102 #ifdef CONFIG_NRFX_DPPI020 103 #define NRFX_DPPI020_ENABLED 1 104 #endif 105 #ifdef CONFIG_NRFX_DPPI120 106 #define NRFX_DPPI120_ENABLED 1 107 #endif 108 #ifdef CONFIG_NRFX_DPPI130 109 #define NRFX_DPPI130_ENABLED 1 110 #endif 111 #ifdef CONFIG_NRFX_DPPI131 112 #define NRFX_DPPI131_ENABLED 1 113 #endif 114 #ifdef CONFIG_NRFX_DPPI132 115 #define NRFX_DPPI132_ENABLED 1 116 #endif 117 #ifdef CONFIG_NRFX_DPPI133 118 #define NRFX_DPPI133_ENABLED 1 119 #endif 120 #ifdef CONFIG_NRFX_DPPI134 121 #define NRFX_DPPI134_ENABLED 1 122 #endif 123 #ifdef CONFIG_NRFX_DPPI135 124 #define NRFX_DPPI135_ENABLED 1 125 #endif 126 #ifdef CONFIG_NRFX_DPPI136 127 #define NRFX_DPPI136_ENABLED 1 128 #endif 129 130 #ifdef CONFIG_NRFX_EGU 131 #define NRFX_EGU_ENABLED 1 132 #endif 133 #ifdef CONFIG_NRFX_EGU_LOG 134 #define NRFX_EGU_CONFIG_LOG_ENABLED 1 135 #endif 136 #ifdef CONFIG_NRFX_EGU0 137 #define NRFX_EGU0_ENABLED 1 138 #endif 139 #ifdef CONFIG_NRFX_EGU1 140 #define NRFX_EGU1_ENABLED 1 141 #endif 142 #ifdef CONFIG_NRFX_EGU2 143 #define NRFX_EGU2_ENABLED 1 144 #endif 145 #ifdef CONFIG_NRFX_EGU3 146 #define NRFX_EGU3_ENABLED 1 147 #endif 148 #ifdef CONFIG_NRFX_EGU4 149 #define NRFX_EGU4_ENABLED 1 150 #endif 151 #ifdef CONFIG_NRFX_EGU5 152 #define NRFX_EGU5_ENABLED 1 153 #endif 154 #ifdef CONFIG_NRFX_EGU10 155 #define NRFX_EGU10_ENABLED 1 156 #endif 157 #ifdef CONFIG_NRFX_EGU20 158 #define NRFX_EGU20_ENABLED 1 159 #endif 160 #ifdef CONFIG_NRFX_EGU020 161 #define NRFX_EGU020_ENABLED 1 162 #endif 163 #ifdef CONFIG_NRFX_EGU130 164 #define NRFX_EGU130_ENABLED 1 165 #endif 166 167 #ifdef CONFIG_NRFX_GRTC 168 #define NRFX_GRTC_ENABLED 1 169 #endif 170 #ifdef CONFIG_NRFX_GRTC_LOG 171 #define NRFX_GRTC_CONFIG_LOG_ENABLED 1 172 #endif 173 174 #ifdef CONFIG_NRF_GRTC_TIMER_CLOCK_MANAGEMENT 175 #define NRF_GRTC_HAS_EXTENDED 1 176 #endif 177 #ifdef CONFIG_NRF_GRTC_TIMER_AUTO_KEEP_ALIVE 178 #define NRFX_GRTC_CONFIG_AUTOEN 1 179 #endif 180 #ifdef CONFIG_NRF_GRTC_START_SYSCOUNTER 181 #define NRFX_GRTC_CONFIG_AUTOSTART 1 182 #endif 183 184 #ifdef CONFIG_NRFX_GPIOTE 185 #define NRFX_GPIOTE_ENABLED 1 186 #endif 187 #ifdef CONFIG_NRFX_GPIOTE0 188 #define NRFX_GPIOTE0_ENABLED 1 189 #endif 190 #ifdef CONFIG_NRFX_GPIOTE1 191 #define NRFX_GPIOTE1_ENABLED 1 192 #endif 193 #ifdef CONFIG_NRFX_GPIOTE20 194 #define NRFX_GPIOTE20_ENABLED 1 195 #endif 196 #ifdef CONFIG_NRFX_GPIOTE30 197 #define NRFX_GPIOTE30_ENABLED 1 198 #endif 199 #ifdef CONFIG_NRFX_GPIOTE130 200 #define NRFX_GPIOTE130_ENABLED 1 201 #endif 202 #ifdef CONFIG_NRFX_GPIOTE131 203 #define NRFX_GPIOTE131_ENABLED 1 204 #endif 205 206 #ifdef CONFIG_NRFX_GPIOTE_NUM_OF_EVT_HANDLERS 207 #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS CONFIG_NRFX_GPIOTE_NUM_OF_EVT_HANDLERS 208 #endif 209 210 #ifdef CONFIG_NRFX_I2S 211 #define NRFX_I2S_ENABLED 1 212 #endif 213 #ifdef CONFIG_NRFX_I2S_LOG 214 #define NRFX_I2S_CONFIG_LOG_ENABLED 1 215 #endif 216 #ifdef CONFIG_NRFX_I2S0 217 #define NRFX_I2S0_ENABLED 1 218 #endif 219 #ifdef CONFIG_NRFX_I2S20 220 #define NRFX_I2S20_ENABLED 1 221 #endif 222 223 #ifdef CONFIG_NRFX_IPC 224 #define NRFX_IPC_ENABLED 1 225 #endif 226 #ifdef CONFIG_NRFX_IPC_LOG 227 #define NRFX_IPC_CONFIG_LOG_ENABLED 1 228 #endif 229 230 #ifdef CONFIG_NRFX_LPCOMP 231 #define NRFX_LPCOMP_ENABLED 1 232 #endif 233 #ifdef CONFIG_NRFX_LPCOMP_LOG 234 #define NRFX_LPCOMP_CONFIG_LOG_ENABLED 1 235 #endif 236 237 #ifdef CONFIG_NRFX_NFCT 238 #define NRFX_NFCT_ENABLED 1 239 #endif 240 #ifdef CONFIG_NRFX_NFCT_LOG 241 #define NRFX_NFCT_CONFIG_LOG_ENABLED 1 242 #endif 243 244 #ifdef CONFIG_NRFX_NVMC 245 #define NRFX_NVMC_ENABLED 1 246 #endif 247 #ifdef CONFIG_NRFX_NVMC_LOG 248 #define NRFX_NVMC_CONFIG_LOG_ENABLED 1 249 #endif 250 251 #ifdef CONFIG_NRFX_PDM 252 #define NRFX_PDM_ENABLED 1 253 #endif 254 #ifdef CONFIG_NRFX_PDM_LOG 255 #define NRFX_PDM_CONFIG_LOG_ENABLED 1 256 #endif 257 #ifdef CONFIG_NRFX_PDM0 258 #define NRFX_PDM0_ENABLED 1 259 #endif 260 #ifdef CONFIG_NRFX_PDM20 261 #define NRFX_PDM20_ENABLED 1 262 #endif 263 #ifdef CONFIG_NRFX_PDM21 264 #define NRFX_PDM21_ENABLED 1 265 #endif 266 267 #ifdef CONFIG_NRFX_POWER 268 #define NRFX_POWER_ENABLED 1 269 #endif 270 #ifdef CONFIG_NRFX_POWER_LOG 271 #define NRFX_POWER_CONFIG_LOG_ENABLED 1 272 #endif 273 274 #ifdef CONFIG_NRFX_PPI 275 #define NRFX_PPI_ENABLED 1 276 #endif 277 #ifdef CONFIG_NRFX_PPI_LOG 278 #define NRFX_PPI_CONFIG_LOG_ENABLED 1 279 #endif 280 281 #ifdef CONFIG_NRFX_PPIB 282 #define NRFX_PPIB_ENABLED 1 283 #endif 284 #ifdef CONFIG_NRFX_PPIB_LOG 285 #define NRFX_PPIB_CONFIG_LOG_ENABLED 1 286 #endif 287 #ifdef CONFIG_NRFX_PPIB00 288 #define NRFX_PPIB00_ENABLED 1 289 #endif 290 #ifdef CONFIG_NRFX_PPIB01 291 #define NRFX_PPIB01_ENABLED 1 292 #endif 293 #ifdef CONFIG_NRFX_PPIB10 294 #define NRFX_PPIB10_ENABLED 1 295 #endif 296 #ifdef CONFIG_NRFX_PPIB11 297 #define NRFX_PPIB11_ENABLED 1 298 #endif 299 #ifdef CONFIG_NRFX_PPIB20 300 #define NRFX_PPIB20_ENABLED 1 301 #endif 302 #ifdef CONFIG_NRFX_PPIB21 303 #define NRFX_PPIB21_ENABLED 1 304 #endif 305 #ifdef CONFIG_NRFX_PPIB22 306 #define NRFX_PPIB22_ENABLED 1 307 #endif 308 #ifdef CONFIG_NRFX_PPIB30 309 #define NRFX_PPIB30_ENABLED 1 310 #endif 311 312 #ifdef CONFIG_NRFX_PRS 313 #define NRFX_PRS_ENABLED 1 314 #endif 315 #ifdef CONFIG_NRFX_PRS_LOG 316 #define NRFX_PRS_CONFIG_LOG_ENABLED 1 317 #endif 318 #ifdef CONFIG_NRFX_PRS_BOX_0 319 #define NRFX_PRS_BOX_0_ENABLED 1 320 #endif 321 #ifdef CONFIG_NRFX_PRS_BOX_1 322 #define NRFX_PRS_BOX_1_ENABLED 1 323 #endif 324 #ifdef CONFIG_NRFX_PRS_BOX_2 325 #define NRFX_PRS_BOX_2_ENABLED 1 326 #endif 327 #ifdef CONFIG_NRFX_PRS_BOX_3 328 #define NRFX_PRS_BOX_3_ENABLED 1 329 #endif 330 #ifdef CONFIG_NRFX_PRS_BOX_4 331 #define NRFX_PRS_BOX_4_ENABLED 1 332 #endif 333 334 #ifdef CONFIG_NRFX_PWM 335 #define NRFX_PWM_ENABLED 1 336 #endif 337 #ifdef CONFIG_NRFX_PWM_LOG 338 #define NRFX_PWM_CONFIG_LOG_ENABLED 1 339 #endif 340 #ifdef CONFIG_NRFX_PWM0 341 #define NRFX_PWM0_ENABLED 1 342 #endif 343 #ifdef CONFIG_NRFX_PWM1 344 #define NRFX_PWM1_ENABLED 1 345 #endif 346 #ifdef CONFIG_NRFX_PWM2 347 #define NRFX_PWM2_ENABLED 1 348 #endif 349 #ifdef CONFIG_NRFX_PWM3 350 #define NRFX_PWM3_ENABLED 1 351 #endif 352 #ifdef CONFIG_NRFX_PWM20 353 #define NRFX_PWM20_ENABLED 1 354 #endif 355 #ifdef CONFIG_NRFX_PWM21 356 #define NRFX_PWM21_ENABLED 1 357 #endif 358 #ifdef CONFIG_NRFX_PWM22 359 #define NRFX_PWM22_ENABLED 1 360 #endif 361 #ifdef CONFIG_NRFX_PWM120 362 #define NRFX_PWM120_ENABLED 1 363 #endif 364 #ifdef CONFIG_NRFX_PWM130 365 #define NRFX_PWM130_ENABLED 1 366 #endif 367 #ifdef CONFIG_NRFX_PWM131 368 #define NRFX_PWM131_ENABLED 1 369 #endif 370 #ifdef CONFIG_NRFX_PWM132 371 #define NRFX_PWM132_ENABLED 1 372 #endif 373 #ifdef CONFIG_NRFX_PWM133 374 #define NRFX_PWM133_ENABLED 1 375 #endif 376 377 #ifdef CONFIG_NRFX_QDEC 378 #define NRFX_QDEC_ENABLED 1 379 #endif 380 #ifdef CONFIG_NRFX_QDEC_LOG 381 #define NRFX_QDEC_CONFIG_LOG_ENABLED 1 382 #endif 383 #ifdef CONFIG_NRFX_QDEC0 384 #define NRFX_QDEC0_ENABLED 1 385 #endif 386 #ifdef CONFIG_NRFX_QDEC1 387 #define NRFX_QDEC1_ENABLED 1 388 #endif 389 #ifdef CONFIG_NRFX_QDEC20 390 #define NRFX_QDEC20_ENABLED 1 391 #endif 392 #ifdef CONFIG_NRFX_QDEC21 393 #define NRFX_QDEC21_ENABLED 1 394 #endif 395 #ifdef CONFIG_NRFX_QDEC130 396 #define NRFX_QDEC130_ENABLED 1 397 #endif 398 #ifdef CONFIG_NRFX_QDEC131 399 #define NRFX_QDEC131_ENABLED 1 400 #endif 401 402 #ifdef CONFIG_NRFX_QSPI 403 #define NRFX_QSPI_ENABLED 1 404 #endif 405 #ifdef CONFIG_NRFX_QSPI_LOG 406 #define NRFX_QSPI_CONFIG_LOG_ENABLED 1 407 #endif 408 409 #ifdef CONFIG_NRFX_RNG 410 #define NRFX_RNG_ENABLED 1 411 #endif 412 #ifdef CONFIG_NRFX_RNG_LOG 413 #define NRFX_RNG_CONFIG_LOG_ENABLED 1 414 #endif 415 416 #ifdef CONFIG_NRFX_RRAMC 417 #define NRFX_RRAMC_ENABLED 1 418 #endif 419 420 #ifdef CONFIG_NRFX_RTC 421 #define NRFX_RTC_ENABLED 1 422 #endif 423 #ifdef CONFIG_NRFX_RTC_LOG 424 #define NRFX_RTC_CONFIG_LOG_ENABLED 1 425 #endif 426 #ifdef CONFIG_NRFX_RTC0 427 #define NRFX_RTC0_ENABLED 1 428 #endif 429 #ifdef CONFIG_NRFX_RTC1 430 #define NRFX_RTC1_ENABLED 1 431 #endif 432 #ifdef CONFIG_NRFX_RTC2 433 #define NRFX_RTC2_ENABLED 1 434 #endif 435 #ifdef CONFIG_NRFX_RTC130 436 #define NRFX_RTC130_ENABLED 1 437 #endif 438 #ifdef CONFIG_NRFX_RTC131 439 #define NRFX_RTC131_ENABLED 1 440 #endif 441 442 #ifdef CONFIG_NRFX_SAADC 443 #define NRFX_SAADC_ENABLED 1 444 #endif 445 #ifdef CONFIG_NRFX_SAADC_LOG 446 #define NRFX_SAADC_CONFIG_LOG_ENABLED 1 447 #endif 448 449 #ifdef CONFIG_NRFX_SPI 450 #define NRFX_SPI_ENABLED 1 451 #endif 452 #ifdef CONFIG_NRFX_SPI_LOG 453 #define NRFX_SPI_CONFIG_LOG_ENABLED 1 454 #endif 455 #ifdef CONFIG_NRFX_SPI0 456 #define NRFX_SPI0_ENABLED 1 457 #endif 458 #ifdef CONFIG_NRFX_SPI1 459 #define NRFX_SPI1_ENABLED 1 460 #endif 461 #ifdef CONFIG_NRFX_SPI2 462 #define NRFX_SPI2_ENABLED 1 463 #endif 464 465 #ifdef CONFIG_NRFX_SPIM 466 #define NRFX_SPIM_ENABLED 1 467 #endif 468 #ifdef CONFIG_NRFX_SPIM_LOG 469 #define NRFX_SPIM_CONFIG_LOG_ENABLED 1 470 #endif 471 #ifdef CONFIG_NRFX_SPIM0 472 #define NRFX_SPIM0_ENABLED 1 473 #endif 474 #ifdef CONFIG_NRFX_SPIM1 475 #define NRFX_SPIM1_ENABLED 1 476 #endif 477 #ifdef CONFIG_NRFX_SPIM2 478 #define NRFX_SPIM2_ENABLED 1 479 #endif 480 #ifdef CONFIG_NRFX_SPIM3 481 #define NRFX_SPIM3_ENABLED 1 482 #ifdef CONFIG_NRF52_ANOMALY_198_WORKAROUND 483 #define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1 484 #endif 485 #endif 486 #ifdef CONFIG_NRFX_SPIM4 487 #define NRFX_SPIM4_ENABLED 1 488 #endif 489 490 #define NRFX_SPIM_DT_HAS_RX_DELAY(node) DT_PROP(node, rx_delay_supported) + 491 492 #if DT_FOREACH_STATUS_OKAY(nordic_nrf_spim, NRFX_SPIM_DT_HAS_RX_DELAY) 0 493 #define NRFX_SPIM_EXTENDED_ENABLED 1 494 #endif 495 #ifdef CONFIG_NRFX_SPIM00 496 #define NRFX_SPIM00_ENABLED 1 497 #endif 498 #ifdef CONFIG_NRFX_SPIM20 499 #define NRFX_SPIM20_ENABLED 1 500 #endif 501 #ifdef CONFIG_NRFX_SPIM21 502 #define NRFX_SPIM21_ENABLED 1 503 #endif 504 #ifdef CONFIG_NRFX_SPIM22 505 #define NRFX_SPIM22_ENABLED 1 506 #endif 507 #ifdef CONFIG_NRFX_SPIM30 508 #define NRFX_SPIM30_ENABLED 1 509 #endif 510 #ifdef CONFIG_NRFX_SPIM120 511 #define NRFX_SPIM120_ENABLED 1 512 #endif 513 #ifdef CONFIG_NRFX_SPIM121 514 #define NRFX_SPIM121_ENABLED 1 515 #endif 516 #ifdef CONFIG_NRFX_SPIM130 517 #define NRFX_SPIM130_ENABLED 1 518 #endif 519 #ifdef CONFIG_NRFX_SPIM131 520 #define NRFX_SPIM131_ENABLED 1 521 #endif 522 #ifdef CONFIG_NRFX_SPIM132 523 #define NRFX_SPIM132_ENABLED 1 524 #endif 525 #ifdef CONFIG_NRFX_SPIM133 526 #define NRFX_SPIM133_ENABLED 1 527 #endif 528 #ifdef CONFIG_NRFX_SPIM134 529 #define NRFX_SPIM134_ENABLED 1 530 #endif 531 #ifdef CONFIG_NRFX_SPIM135 532 #define NRFX_SPIM135_ENABLED 1 533 #endif 534 #ifdef CONFIG_NRFX_SPIM136 535 #define NRFX_SPIM136_ENABLED 1 536 #endif 537 #ifdef CONFIG_NRFX_SPIM137 538 #define NRFX_SPIM137_ENABLED 1 539 #endif 540 541 #ifdef CONFIG_NRFX_SPIS 542 #define NRFX_SPIS_ENABLED 1 543 #endif 544 #ifdef CONFIG_NRFX_SPIS_LOG 545 #define NRFX_SPIS_CONFIG_LOG_ENABLED 1 546 #endif 547 #ifdef CONFIG_NRFX_SPIS0 548 #define NRFX_SPIS0_ENABLED 1 549 #endif 550 #ifdef CONFIG_NRFX_SPIS1 551 #define NRFX_SPIS1_ENABLED 1 552 #endif 553 #ifdef CONFIG_NRFX_SPIS2 554 #define NRFX_SPIS2_ENABLED 1 555 #endif 556 #ifdef CONFIG_NRFX_SPIS3 557 #define NRFX_SPIS3_ENABLED 1 558 #endif 559 #ifdef CONFIG_NRFX_SPIS00 560 #define NRFX_SPIS00_ENABLED 1 561 #endif 562 #ifdef CONFIG_NRFX_SPIS20 563 #define NRFX_SPIS20_ENABLED 1 564 #endif 565 #ifdef CONFIG_NRFX_SPIS21 566 #define NRFX_SPIS21_ENABLED 1 567 #endif 568 #ifdef CONFIG_NRFX_SPIS22 569 #define NRFX_SPIS22_ENABLED 1 570 #endif 571 #ifdef CONFIG_NRFX_SPIS30 572 #define NRFX_SPIS30_ENABLED 1 573 #endif 574 #ifdef CONFIG_NRFX_SPIS120 575 #define NRFX_SPIS120_ENABLED 1 576 #endif 577 #ifdef CONFIG_NRFX_SPIS130 578 #define NRFX_SPIS130_ENABLED 1 579 #endif 580 #ifdef CONFIG_NRFX_SPIS131 581 #define NRFX_SPIS131_ENABLED 1 582 #endif 583 #ifdef CONFIG_NRFX_SPIS132 584 #define NRFX_SPIS132_ENABLED 1 585 #endif 586 #ifdef CONFIG_NRFX_SPIS133 587 #define NRFX_SPIS133_ENABLED 1 588 #endif 589 #ifdef CONFIG_NRFX_SPIS134 590 #define NRFX_SPIS134_ENABLED 1 591 #endif 592 #ifdef CONFIG_NRFX_SPIS135 593 #define NRFX_SPIS135_ENABLED 1 594 #endif 595 #ifdef CONFIG_NRFX_SPIS136 596 #define NRFX_SPIS136_ENABLED 1 597 #endif 598 #ifdef CONFIG_NRFX_SPIS137 599 #define NRFX_SPIS137_ENABLED 1 600 #endif 601 602 #ifdef CONFIG_NRFX_SYSTICK 603 #define NRFX_SYSTICK_ENABLED 1 604 #endif 605 #ifdef CONFIG_NRFX_SYSTICK_LOG 606 #define NRFX_SYSTICK_CONFIG_LOG_ENABLED 1 607 #endif 608 609 #ifdef CONFIG_NRFX_TBM 610 #define NRFX_TBM_ENABLED 1 611 #endif 612 613 #ifdef CONFIG_NRFX_TEMP 614 #define NRFX_TEMP_ENABLED 1 615 #endif 616 #ifdef CONFIG_NRFX_TEMP_LOG 617 #define NRFX_TEMP_CONFIG_LOG_ENABLED 1 618 #endif 619 620 #ifdef CONFIG_NRFX_TIMER 621 #define NRFX_TIMER_ENABLED 1 622 #endif 623 #ifdef CONFIG_NRFX_TIMER_LOG 624 #define NRFX_TIMER_CONFIG_LOG_ENABLED 1 625 #endif 626 #ifdef CONFIG_NRFX_TIMER0 627 #define NRFX_TIMER0_ENABLED 1 628 #endif 629 #ifdef CONFIG_NRFX_TIMER1 630 #define NRFX_TIMER1_ENABLED 1 631 #endif 632 #ifdef CONFIG_NRFX_TIMER2 633 #define NRFX_TIMER2_ENABLED 1 634 #endif 635 #ifdef CONFIG_NRFX_TIMER3 636 #define NRFX_TIMER3_ENABLED 1 637 #endif 638 #ifdef CONFIG_NRFX_TIMER4 639 #define NRFX_TIMER4_ENABLED 1 640 #endif 641 #ifdef CONFIG_NRFX_TIMER00 642 #define NRFX_TIMER00_ENABLED 1 643 #endif 644 #ifdef CONFIG_NRFX_TIMER10 645 #define NRFX_TIMER10_ENABLED 1 646 #endif 647 #ifdef CONFIG_NRFX_TIMER20 648 #define NRFX_TIMER20_ENABLED 1 649 #endif 650 #ifdef CONFIG_NRFX_TIMER21 651 #define NRFX_TIMER21_ENABLED 1 652 #endif 653 #ifdef CONFIG_NRFX_TIMER22 654 #define NRFX_TIMER22_ENABLED 1 655 #endif 656 #ifdef CONFIG_NRFX_TIMER23 657 #define NRFX_TIMER23_ENABLED 1 658 #endif 659 #ifdef CONFIG_NRFX_TIMER24 660 #define NRFX_TIMER24_ENABLED 1 661 #endif 662 #ifdef CONFIG_NRFX_TIMER020 663 #define NRFX_TIMER020_ENABLED 1 664 #endif 665 #ifdef CONFIG_NRFX_TIMER021 666 #define NRFX_TIMER021_ENABLED 1 667 #endif 668 #ifdef CONFIG_NRFX_TIMER022 669 #define NRFX_TIMER022_ENABLED 1 670 #endif 671 #ifdef CONFIG_NRFX_TIMER120 672 #define NRFX_TIMER120_ENABLED 1 673 #endif 674 #ifdef CONFIG_NRFX_TIMER121 675 #define NRFX_TIMER121_ENABLED 1 676 #endif 677 #ifdef CONFIG_NRFX_TIMER130 678 #define NRFX_TIMER130_ENABLED 1 679 #endif 680 #ifdef CONFIG_NRFX_TIMER131 681 #define NRFX_TIMER131_ENABLED 1 682 #endif 683 #ifdef CONFIG_NRFX_TIMER132 684 #define NRFX_TIMER132_ENABLED 1 685 #endif 686 #ifdef CONFIG_NRFX_TIMER133 687 #define NRFX_TIMER133_ENABLED 1 688 #endif 689 #ifdef CONFIG_NRFX_TIMER134 690 #define NRFX_TIMER134_ENABLED 1 691 #endif 692 #ifdef CONFIG_NRFX_TIMER135 693 #define NRFX_TIMER135_ENABLED 1 694 #endif 695 #ifdef CONFIG_NRFX_TIMER136 696 #define NRFX_TIMER136_ENABLED 1 697 #endif 698 #ifdef CONFIG_NRFX_TIMER137 699 #define NRFX_TIMER137_ENABLED 1 700 #endif 701 702 #ifdef CONFIG_NRFX_TWI 703 #define NRFX_TWI_ENABLED 1 704 #endif 705 #ifdef CONFIG_NRFX_TWI_LOG 706 #define NRFX_TWI_CONFIG_LOG_ENABLED 1 707 #endif 708 #ifdef CONFIG_NRFX_TWI0 709 #define NRFX_TWI0_ENABLED 1 710 #endif 711 #ifdef CONFIG_NRFX_TWI1 712 #define NRFX_TWI1_ENABLED 1 713 #endif 714 715 #ifdef CONFIG_NRFX_TWIM 716 #define NRFX_TWIM_ENABLED 1 717 #endif 718 #ifdef CONFIG_NRFX_TWIM_LOG 719 #define NRFX_TWIM_CONFIG_LOG_ENABLED 1 720 #endif 721 #ifdef CONFIG_NRFX_TWIM0 722 #define NRFX_TWIM0_ENABLED 1 723 #endif 724 #ifdef CONFIG_NRFX_TWIM1 725 #define NRFX_TWIM1_ENABLED 1 726 #endif 727 #ifdef CONFIG_NRFX_TWIM2 728 #define NRFX_TWIM2_ENABLED 1 729 #endif 730 #ifdef CONFIG_NRFX_TWIM3 731 #define NRFX_TWIM3_ENABLED 1 732 #endif 733 #ifdef CONFIG_NRFX_TWIM20 734 #define NRFX_TWIM20_ENABLED 1 735 #endif 736 #ifdef CONFIG_NRFX_TWIM21 737 #define NRFX_TWIM21_ENABLED 1 738 #endif 739 #ifdef CONFIG_NRFX_TWIM22 740 #define NRFX_TWIM22_ENABLED 1 741 #endif 742 #ifdef CONFIG_NRFX_TWIM30 743 #define NRFX_TWIM30_ENABLED 1 744 #endif 745 #ifdef CONFIG_NRFX_TWIM120 746 #define NRFX_TWIM120_ENABLED 1 747 #endif 748 #ifdef CONFIG_NRFX_TWIM130 749 #define NRFX_TWIM130_ENABLED 1 750 #endif 751 #ifdef CONFIG_NRFX_TWIM131 752 #define NRFX_TWIM131_ENABLED 1 753 #endif 754 #ifdef CONFIG_NRFX_TWIM132 755 #define NRFX_TWIM132_ENABLED 1 756 #endif 757 #ifdef CONFIG_NRFX_TWIM133 758 #define NRFX_TWIM133_ENABLED 1 759 #endif 760 #ifdef CONFIG_NRFX_TWIM134 761 #define NRFX_TWIM134_ENABLED 1 762 #endif 763 #ifdef CONFIG_NRFX_TWIM135 764 #define NRFX_TWIM135_ENABLED 1 765 #endif 766 #ifdef CONFIG_NRFX_TWIM136 767 #define NRFX_TWIM136_ENABLED 1 768 #endif 769 #ifdef CONFIG_NRFX_TWIM137 770 #define NRFX_TWIM137_ENABLED 1 771 #endif 772 773 #ifdef CONFIG_NRFX_TWIS 774 #define NRFX_TWIS_ENABLED 1 775 #endif 776 #ifdef CONFIG_NRFX_TWIS_LOG 777 #define NRFX_TWIS_CONFIG_LOG_ENABLED 1 778 #endif 779 #ifdef CONFIG_NRFX_TWIS0 780 #define NRFX_TWIS0_ENABLED 1 781 #endif 782 #ifdef CONFIG_NRFX_TWIS1 783 #define NRFX_TWIS1_ENABLED 1 784 #endif 785 #ifdef CONFIG_NRFX_TWIS2 786 #define NRFX_TWIS2_ENABLED 1 787 #endif 788 #ifdef CONFIG_NRFX_TWIS3 789 #define NRFX_TWIS3_ENABLED 1 790 #endif 791 #ifdef CONFIG_NRFX_TWIS20 792 #define NRFX_TWIS20_ENABLED 1 793 #endif 794 #ifdef CONFIG_NRFX_TWIS21 795 #define NRFX_TWIS21_ENABLED 1 796 #endif 797 #ifdef CONFIG_NRFX_TWIS22 798 #define NRFX_TWIS22_ENABLED 1 799 #endif 800 #ifdef CONFIG_NRFX_TWIS30 801 #define NRFX_TWIS30_ENABLED 1 802 #endif 803 #ifdef CONFIG_NRFX_TWIS130 804 #define NRFX_TWIS130_ENABLED 1 805 #endif 806 #ifdef CONFIG_NRFX_TWIS131 807 #define NRFX_TWIS131_ENABLED 1 808 #endif 809 #ifdef CONFIG_NRFX_TWIS132 810 #define NRFX_TWIS132_ENABLED 1 811 #endif 812 #ifdef CONFIG_NRFX_TWIS133 813 #define NRFX_TWIS133_ENABLED 1 814 #endif 815 #ifdef CONFIG_NRFX_TWIS134 816 #define NRFX_TWIS134_ENABLED 1 817 #endif 818 #ifdef CONFIG_NRFX_TWIS135 819 #define NRFX_TWIS135_ENABLED 1 820 #endif 821 #ifdef CONFIG_NRFX_TWIS136 822 #define NRFX_TWIS136_ENABLED 1 823 #endif 824 #ifdef CONFIG_NRFX_TWIS137 825 #define NRFX_TWIS137_ENABLED 1 826 #endif 827 828 #ifdef CONFIG_NRFX_UART 829 #define NRFX_UART_ENABLED 1 830 #endif 831 #ifdef CONFIG_NRFX_UART_LOG 832 #define NRFX_UART_CONFIG_LOG_ENABLED 1 833 #endif 834 #ifdef CONFIG_NRFX_UART0 835 #define NRFX_UART0_ENABLED 1 836 #endif 837 838 #ifdef CONFIG_NRFX_UARTE 839 #define NRFX_UARTE_ENABLED 1 840 #endif 841 #ifdef CONFIG_NRFX_UARTE_LOG 842 #define NRFX_UARTE_CONFIG_LOG_ENABLED 1 843 #endif 844 #ifdef CONFIG_NRFX_UARTE0 845 #define NRFX_UARTE0_ENABLED 1 846 #endif 847 #ifdef CONFIG_NRFX_UARTE1 848 #define NRFX_UARTE1_ENABLED 1 849 #endif 850 #ifdef CONFIG_NRFX_UARTE2 851 #define NRFX_UARTE2_ENABLED 1 852 #endif 853 #ifdef CONFIG_NRFX_UARTE3 854 #define NRFX_UARTE3_ENABLED 1 855 #endif 856 #ifdef CONFIG_NRFX_UARTE00 857 #define NRFX_UARTE00_ENABLED 1 858 #endif 859 #ifdef CONFIG_NRFX_UARTE20 860 #define NRFX_UARTE20_ENABLED 1 861 #endif 862 #ifdef CONFIG_NRFX_UARTE21 863 #define NRFX_UARTE21_ENABLED 1 864 #endif 865 #ifdef CONFIG_NRFX_UARTE22 866 #define NRFX_UARTE22_ENABLED 1 867 #endif 868 #ifdef CONFIG_NRFX_UARTE30 869 #define NRFX_UARTE30_ENABLED 1 870 #endif 871 #ifdef CONFIG_NRFX_UARTE120 872 #define NRFX_UARTE120_ENABLED 1 873 #endif 874 #ifdef CONFIG_NRFX_UARTE130 875 #define NRFX_UARTE130_ENABLED 1 876 #endif 877 #ifdef CONFIG_NRFX_UARTE131 878 #define NRFX_UARTE131_ENABLED 1 879 #endif 880 #ifdef CONFIG_NRFX_UARTE132 881 #define NRFX_UARTE132_ENABLED 1 882 #endif 883 #ifdef CONFIG_NRFX_UARTE133 884 #define NRFX_UARTE133_ENABLED 1 885 #endif 886 #ifdef CONFIG_NRFX_UARTE134 887 #define NRFX_UARTE134_ENABLED 1 888 #endif 889 #ifdef CONFIG_NRFX_UARTE135 890 #define NRFX_UARTE135_ENABLED 1 891 #endif 892 #ifdef CONFIG_NRFX_UARTE136 893 #define NRFX_UARTE136_ENABLED 1 894 #endif 895 #ifdef CONFIG_NRFX_UARTE137 896 #define NRFX_UARTE137_ENABLED 1 897 #endif 898 #ifdef CONFIG_NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 899 #define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 1 900 #endif 901 #ifdef CONFIG_NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 902 #define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 1 903 #endif 904 #ifdef CONFIG_NRFX_UARTE_CONFIG_TX_LINK 905 #define NRFX_UARTE_CONFIG_TX_LINK 1 906 #endif 907 #ifdef CONFIG_NRFX_UARTE_CONFIG_RX_CACHE_ENABLED 908 #define NRFX_UARTE_CONFIG_RX_CACHE_ENABLED 1 909 #endif 910 911 #ifdef CONFIG_NRFX_USBREG 912 #define NRFX_USBREG_ENABLED 1 913 #endif 914 #ifdef CONFIG_NRFX_USBREG_LOG 915 #define NRFX_USBREG_CONFIG_LOG_ENABLED 1 916 #endif 917 918 #ifdef CONFIG_NRFX_WDT 919 #define NRFX_WDT_ENABLED 1 920 #endif 921 #ifdef CONFIG_WDT_NRFX_NO_IRQ 922 #define NRFX_WDT_CONFIG_NO_IRQ 1 923 #endif 924 #ifdef CONFIG_NRFX_WDT_LOG 925 #define NRFX_WDT_CONFIG_LOG_ENABLED 1 926 #endif 927 #ifdef CONFIG_NRFX_WDT0 928 #define NRFX_WDT0_ENABLED 1 929 #endif 930 #ifdef CONFIG_NRFX_WDT1 931 #define NRFX_WDT1_ENABLED 1 932 #endif 933 #ifdef CONFIG_NRFX_WDT30 934 #define NRFX_WDT30_ENABLED 1 935 #endif 936 #ifdef CONFIG_NRFX_WDT31 937 #define NRFX_WDT31_ENABLED 1 938 #endif 939 #ifdef CONFIG_NRFX_WDT010 940 #define NRFX_WDT010_ENABLED 1 941 #endif 942 #ifdef CONFIG_NRFX_WDT011 943 #define NRFX_WDT011_ENABLED 1 944 #endif 945 #ifdef CONFIG_NRFX_WDT130 946 #define NRFX_WDT130_ENABLED 1 947 #endif 948 #ifdef CONFIG_NRFX_WDT131 949 #define NRFX_WDT131_ENABLED 1 950 #endif 951 #ifdef CONFIG_NRFX_WDT132 952 #define NRFX_WDT132_ENABLED 1 953 #endif 954 955 #ifdef CONFIG_NRF52_ANOMALY_109_WORKAROUND 956 #define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 957 #define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 958 #define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 959 #define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 960 #define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE \ 961 CONFIG_NRF52_ANOMALY_109_WORKAROUND_EGU_INSTANCE 962 #endif 963 964 #if defined(CONFIG_SOC_SERIES_BSIM_NRFXX) 965 #include "nrfx_config_bsim.h" 966 #endif 967 968 /* 969 * For chips with TrustZone support, MDK provides CMSIS-Core peripheral 970 * accessing symbols in two flavors, with secure and non-secure base address 971 * mappings. Their names contain the suffix _S or _NS, respectively. 972 * Because nrfx HALs and drivers require these peripheral accessing symbols 973 * without any suffixes, the following macro is provided that will translate 974 * their names according to the kind of the target that is built. 975 */ 976 #if defined(NRF_TRUSTZONE_NONSECURE) 977 #define NRF_PERIPH(P) P##_NS 978 #else 979 #define NRF_PERIPH(P) P##_S 980 #endif 981 982 #define NRFX_CONFIG_BIT_DT(node_id, prop, idx) BIT(DT_PROP_BY_IDX(node_id, prop, idx)) 983 #define NRFX_CONFIG_MASK_DT(node_id, prop) \ 984 (COND_CODE_1(DT_NODE_HAS_PROP(node_id, prop), \ 985 (DT_FOREACH_PROP_ELEM_SEP(node_id, prop, NRFX_CONFIG_BIT_DT, (|))), \ 986 (0))) 987 988 /* If the GRTC system timer driver is to be used, prepare definitions required 989 * by the nrfx_grtc driver (NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK and 990 * NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS) based on information from devicetree. 991 */ 992 #if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_grtc) 993 #define NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK \ 994 (NRFX_CONFIG_MASK_DT(DT_INST(0, nordic_nrf_grtc), owned_channels) & \ 995 ~NRFX_CONFIG_MASK_DT(DT_INST(0, nordic_nrf_grtc), child_owned_channels)) 996 #define NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS \ 997 (DT_PROP_LEN_OR(DT_INST(0, nordic_nrf_grtc), owned_channels, 0) - \ 998 DT_PROP_LEN_OR(DT_INST(0, nordic_nrf_grtc), child_owned_channels, 0)) 999 #endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_grtc) */ 1000 1001 /* If global of local DPPIC peripherals are used, provide the following macro 1002 * definitions required by the interconnect/apb layer: 1003 * - NRFX_DPPI_PUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) 1004 * - NRFX_DPPI_SUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) 1005 * - NRFX_DPPI_PUB_OR_SUB_MASK(inst_num) 1006 * - NRFX_DPPI_CHANNELS_SINGLE_VAR_NAME_BY_INST_NUM(inst_num) 1007 * - NRFX_INTERCONNECT_APB_GLOBAL_DPPI_DEFINE 1008 * - NRFX_INTERCONNECT_APB_LOCAL_DPPI_DEFINE 1009 * based on information from devicetree. 1010 */ 1011 #if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_dppic_global) || \ 1012 DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_dppic_local) 1013 #ifndef NRFX_DPPI_ENABLED 1014 #define NRFX_DPPI_ENABLED 1 1015 #endif 1016 /* Source (publish) channels masks generation. */ 1017 #define NRFX_DPPI_PUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) \ 1018 NRFX_CONFIG_MASK_DT(DT_NODELABEL(_CONCAT(dppic, inst_num)), source_channels) 1019 1020 /* Sink (subscribe) channels masks generation. */ 1021 #define NRFX_DPPI_SUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) \ 1022 NRFX_CONFIG_MASK_DT(DT_NODELABEL(_CONCAT(dppic, inst_num)), sink_channels) 1023 1024 #define NRFX_DPPI_PUB_OR_SUB_MASK(inst_num) \ 1025 UTIL_OR(DT_NODE_HAS_PROP(DT_NODELABEL(_CONCAT(dppic, inst_num)), source_channels), \ 1026 DT_NODE_HAS_PROP(DT_NODELABEL(_CONCAT(dppic, inst_num)), sink_channels)) 1027 1028 /* Variables names generation. */ 1029 #define NRFX_CONFIG_DPPI_CHANNELS_ENTRY_NAME(node_id) _CONCAT(_CONCAT(m_, node_id), _channels) 1030 #define NRFX_DPPI_CHANNELS_SINGLE_VAR_NAME_BY_INST_NUM(inst_num) \ 1031 NRFX_CONFIG_DPPI_CHANNELS_ENTRY_NAME(DT_NODELABEL(_CONCAT(dppic, inst_num))) 1032 1033 /* Variables entries generation. */ 1034 #define NRFX_CONFIG_DPPI_CHANNELS_ENTRY(node_id) \ 1035 static nrfx_atomic_t NRFX_CONFIG_DPPI_CHANNELS_ENTRY_NAME(node_id) \ 1036 __attribute__((used)) = \ 1037 NRFX_CONFIG_MASK_DT(node_id, source_channels) | \ 1038 NRFX_CONFIG_MASK_DT(node_id, sink_channels); 1039 #define NRFX_INTERCONNECT_APB_GLOBAL_DPPI_DEFINE \ 1040 DT_FOREACH_STATUS_OKAY(nordic_nrf_dppic_global, NRFX_CONFIG_DPPI_CHANNELS_ENTRY) 1041 #define NRFX_INTERCONNECT_APB_LOCAL_DPPI_DEFINE \ 1042 DT_FOREACH_STATUS_OKAY(nordic_nrf_dppic_local, NRFX_CONFIG_DPPI_CHANNELS_ENTRY) 1043 #endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_dppic_global) || ... */ 1044 1045 /* If local or global DPPIC peripherals are used, provide the following macro 1046 * definitions required by the interconnect/ipct layer: 1047 * - NRFX_IPCTx_PUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) 1048 * - NRFX_IPCTx_SUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) 1049 * - NRFX_IPCT_PUB_OR_SUB_MASK(inst_num) 1050 * - NRFX_IPCTx_CHANNELS_SINGLE_VAR_NAME_BY_INST_NUM(inst_num) 1051 * - NRFX_INTERCONNECT_IPCT_GLOBAL_DEFINE 1052 * - NRFX_INTERCONNECT_IPCT_LOCAL_DEFINE 1053 * based on information from devicetree. 1054 */ 1055 #if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_ipct_global) || \ 1056 DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_ipct_local) 1057 /* Channels masks generation. */ 1058 #define NRFX_CONFIG_IPCT_MASK_DT(node_id) \ 1059 COND_CODE_1(DT_NODE_HAS_PROP(node_id, owned_channels), \ 1060 (NRFX_CONFIG_MASK_DT(node_id, owned_channels)), \ 1061 (COND_CODE_1(DT_NODE_HAS_COMPAT(node_id, nordic_nrf_ipct_local), \ 1062 (BIT_MASK(DT_PROP(node_id, channels))), (0)))) 1063 1064 #if defined(NRF_APPLICATION) 1065 #define NRFX_CONFIG_IPCT_LOCAL_NODE DT_NODELABEL(cpuapp_ipct) 1066 #elif defined(NRF_RADIOCORE) 1067 #define NRFX_CONFIG_IPCT_LOCAL_NODE DT_NODELABEL(cpurad_ipct) 1068 #endif 1069 #define NRFX_CONFIG_IPCT_NODE_BY_INST_NUM(inst_num) \ 1070 COND_CODE_1(IS_EMPTY(inst_num), \ 1071 (NRFX_CONFIG_IPCT_LOCAL_NODE), \ 1072 (DT_NODELABEL(_CONCAT(ipct, inst_num)))) 1073 1074 #define NRFX_IPCTx_PUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) \ 1075 NRFX_CONFIG_IPCT_MASK_DT(NRFX_CONFIG_IPCT_NODE_BY_INST_NUM(inst_num)) 1076 1077 #define NRFX_IPCTx_SUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) \ 1078 NRFX_CONFIG_IPCT_MASK_DT(NRFX_CONFIG_IPCT_NODE_BY_INST_NUM(inst_num)) 1079 1080 #define NRFX_IPCT_PUB_OR_SUB_MASK(inst_num) \ 1081 COND_CODE_1(IS_EMPTY(inst_num), \ 1082 (DT_NODE_HAS_STATUS_OKAY(NRFX_CONFIG_IPCT_LOCAL_NODE)), \ 1083 (DT_NODE_HAS_PROP(DT_NODELABEL(_CONCAT(ipct, inst_num)), owned_channels))) 1084 1085 /* Variables names generation. */ 1086 #define NRFX_CONFIG_IPCT_CHANNELS_ENTRY_NAME(node_id) _CONCAT(_CONCAT(m_, node_id), _channels) 1087 #define NRFX_IPCTx_CHANNELS_SINGLE_VAR_NAME_BY_INST_NUM(inst_num) \ 1088 COND_CODE_1(IS_EMPTY(inst_num), \ 1089 (NRFX_CONFIG_IPCT_CHANNELS_ENTRY_NAME(NRFX_CONFIG_IPCT_LOCAL_NODE)), \ 1090 (NRFX_CONFIG_IPCT_CHANNELS_ENTRY_NAME(DT_NODELABEL(_CONCAT(ipct, inst_num))))) 1091 1092 /* Variables entries generation. */ 1093 #define NRFX_CONFIG_IPCT_CHANNELS_ENTRY(node_id) \ 1094 static nrfx_atomic_t NRFX_CONFIG_IPCT_CHANNELS_ENTRY_NAME(node_id) \ 1095 __attribute__((used)) = \ 1096 NRFX_CONFIG_IPCT_MASK_DT(node_id); 1097 #define NRFX_INTERCONNECT_IPCT_LOCAL_DEFINE \ 1098 DT_FOREACH_STATUS_OKAY(nordic_nrf_ipct_local, NRFX_CONFIG_IPCT_CHANNELS_ENTRY) 1099 #define NRFX_INTERCONNECT_IPCT_GLOBAL_DEFINE \ 1100 DT_FOREACH_STATUS_OKAY(nordic_nrf_ipct_global, NRFX_CONFIG_IPCT_CHANNELS_ENTRY) 1101 #endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_ipct_global) || ... */ 1102 1103 #include <nrfx_config_common.h> 1104 #if defined(NRF51) 1105 #include <nrfx_config_nrf51.h> 1106 #elif defined(NRF52805_XXAA) 1107 #include <nrfx_config_nrf52805.h> 1108 #elif defined(NRF52810_XXAA) 1109 #include <nrfx_config_nrf52810.h> 1110 #elif defined(NRF52811_XXAA) 1111 #include <nrfx_config_nrf52811.h> 1112 #elif defined(NRF52820_XXAA) 1113 #include <nrfx_config_nrf52820.h> 1114 #elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB) 1115 #include <nrfx_config_nrf52832.h> 1116 #elif defined(NRF52833_XXAA) 1117 #include <nrfx_config_nrf52833.h> 1118 #elif defined(NRF52840_XXAA) 1119 #include <nrfx_config_nrf52840.h> 1120 #elif defined(NRF5340_XXAA_APPLICATION) 1121 #include <nrfx_config_nrf5340_application.h> 1122 #elif defined(NRF5340_XXAA_NETWORK) 1123 #include <nrfx_config_nrf5340_network.h> 1124 #elif defined(NRF54H20_XXAA) && defined(NRF_APPLICATION) 1125 #include <nrfx_config_nrf54h20_application.h> 1126 #elif defined(NRF54H20_XXAA) && defined(NRF_RADIOCORE) 1127 #include <nrfx_config_nrf54h20_radiocore.h> 1128 #elif defined(NRF54H20_XXAA) && defined(NRF_PPR) 1129 #include <nrfx_config_nrf54h20_ppr.h> 1130 #elif defined(NRF54H20_XXAA) && defined(NRF_FLPR) 1131 #include <nrfx_config_nrf54h20_flpr.h> 1132 #elif defined(NRF54L05_XXAA) && defined(NRF_APPLICATION) 1133 #include <nrfx_config_nrf54l05_application.h> 1134 #elif defined(NRF54L05_XXAA) && defined(NRF_FLPR) 1135 #include <nrfx_config_nrf54l05_flpr.h> 1136 #elif defined(NRF54L10_XXAA) && defined(NRF_APPLICATION) 1137 #include <nrfx_config_nrf54l10_application.h> 1138 #elif defined(NRF54L10_XXAA) && defined(NRF_FLPR) 1139 #include <nrfx_config_nrf54l10_flpr.h> 1140 #elif defined(NRF54L15_XXAA) && defined(NRF_APPLICATION) 1141 #include <nrfx_config_nrf54l15_application.h> 1142 #elif defined(NRF54L15_XXAA) && defined(NRF_FLPR) 1143 #include <nrfx_config_nrf54l15_flpr.h> 1144 #elif (defined(NRF54L20_XXAA) || defined(NRF54L20_ENGA_XXAA)) && defined(NRF_APPLICATION) 1145 #include <nrfx_config_nrf54l20_enga_application.h> 1146 #elif defined(NRF9120_XXAA) || defined(NRF9160_XXAA) 1147 #include <nrfx_config_nrf91.h> 1148 #elif defined(NRF9230_ENGB_XXAA) && defined(NRF_APPLICATION) 1149 #include <nrfx_config_nrf9230_engb_application.h> 1150 #elif defined(NRF9230_ENGB_XXAA) && defined(NRF_RADIOCORE) 1151 #include <nrfx_config_nrf9230_engb_radiocore.h> 1152 #elif defined(NRF9230_ENGB_XXAA) && defined(NRF_PPR) 1153 #include <nrfx_config_nrf9230_engb_ppr.h> 1154 #else 1155 #include <nrfx_config_ext.h> 1156 #endif 1157 1158 #endif // NRFX_CONFIG_H__ 1159
