Searched +full:0 +full:xa (Results 1 – 25 of 114) sorted by relevance
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| /Zephyr-latest/doc/build/cmake/ |
| D | build-build-phase-1.svg | 3 …0lsqr8eOJG4+IeWqOpeFcfOjc3KJWdyHj9e3g5bWl9lhrgAZj0uJBR1F6t8LS9q7erpf6E3snDAbW994PZID3ycTtth5vr4DsN…
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| /Zephyr-latest/boards/native/doc/ |
| D | components_natsim.svg | 4 …0">
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| D | components_bsim.svg | 4 …0">
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| /Zephyr-latest/doc/safety/images/ |
| D | IEC-61508-basis.svg | 1 …0%" y1="0%" x2="0%" y2="100%" id="mx-gradient-dae8fc-1-fff4c3-1-s-0"><stop offset="0%" style="stop…
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| /Zephyr-latest/doc/connectivity/bluetooth/img/ |
| D | l2cap_b_frame.drawio.svg | 4 …0W6V63gHvQDrfMezdomF" scale="2.5" border="0">
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| D | l2cap_k_frame.drawio.svg | 4 …0">
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| D | l2cap_k_frame_1.drawio.svg | 4 …0">
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| /Zephyr-latest/include/zephyr/dt-bindings/sensor/ |
| D | lsm6dsv16x.h | 10 #define LSM6DSV16X_DT_FS_2G 0
16 #define LSM6DSV16X_DT_FS_125DPS 0x0
17 #define LSM6DSV16X_DT_FS_250DPS 0x1
18 #define LSM6DSV16X_DT_FS_500DPS 0x2
19 #define LSM6DSV16X_DT_FS_1000DPS 0x3
20 #define LSM6DSV16X_DT_FS_2000DPS 0x4
21 #define LSM6DSV16X_DT_FS_4000DPS 0xc
24 #define LSM6DSV16X_DT_ODR_OFF 0x0
25 #define LSM6DSV16X_DT_ODR_AT_1Hz875 0x1
26 #define LSM6DSV16X_DT_ODR_AT_7Hz5 0x2
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| D | ism330dhcx.h | 10 #define ISM330DHCX_DT_ODR_OFF 0x0
11 #define ISM330DHCX_DT_ODR_12Hz5 0x1
12 #define ISM330DHCX_DT_ODR_26H 0x2
13 #define ISM330DHCX_DT_ODR_52Hz 0x3
14 #define ISM330DHCX_DT_ODR_104Hz 0x4
15 #define ISM330DHCX_DT_ODR_208Hz 0x5
16 #define ISM330DHCX_DT_ODR_416Hz 0x6
17 #define ISM330DHCX_DT_ODR_833Hz 0x7
18 #define ISM330DHCX_DT_ODR_1666Hz 0x8
19 #define ISM330DHCX_DT_ODR_3332Hz 0x9
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| D | lsm6dso.h | 10 #define LSM6DSO_DT_XL_HP_MODE 0
15 #define LSM6DSO_DT_GY_HP_MODE 0
19 #define LSM6DSO_DT_FS_2G 0
25 #define LSM6DSO_DT_FS_250DPS 0
32 #define LSM6DSO_DT_ODR_OFF 0x0
33 #define LSM6DSO_DT_ODR_12Hz5 0x1
34 #define LSM6DSO_DT_ODR_26H 0x2
35 #define LSM6DSO_DT_ODR_52Hz 0x3
36 #define LSM6DSO_DT_ODR_104Hz 0x4
37 #define LSM6DSO_DT_ODR_208Hz 0x5
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| D | lsm6dso16is.h | 10 #define LSM6DSO16IS_DT_FS_2G 0
16 #define LSM6DSO16IS_DT_FS_250DPS 0x0
17 #define LSM6DSO16IS_DT_FS_500DPS 0x1
18 #define LSM6DSO16IS_DT_FS_1000DPS 0x2
19 #define LSM6DSO16IS_DT_FS_2000DPS 0x3
20 #define LSM6DSO16IS_DT_FS_125DPS 0x10
23 #define LSM6DSO16IS_DT_ODR_OFF 0x0
24 #define LSM6DSO16IS_DT_ODR_12Hz5_HP 0x1
25 #define LSM6DSO16IS_DT_ODR_26H_HP 0x2
26 #define LSM6DSO16IS_DT_ODR_52Hz_HP 0x3
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| D | tmag5273.h | 12 #define TMAG5273_DT_OPER_MODE_CONTINUOUS 0
16 #define TMAG5273_DT_AXIS_NONE 0x0
17 #define TMAG5273_DT_AXIS_X 0x1
18 #define TMAG5273_DT_AXIS_Y 0x2
19 #define TMAG5273_DT_AXIS_Z 0x4
24 #define TMAG5273_DT_AXIS_XYX 0x8
25 #define TMAG5273_DT_AXIS_YXY 0x9
26 #define TMAG5273_DT_AXIS_YZY 0xA
27 #define TMAG5273_DT_AXIS_XZX 0xB
30 #define TMAG5273_DT_AXIS_RANGE_LOW 0
[all …]
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| /Zephyr-latest/tests/arch/x86/static_idt/ |
| D | README.txt | 26 Current thread ID = 0x001028e0
27 Faulting segment:address = 0x8:0x1001c9
28 eax: 0xa, ebx: 0x0, ecx: 0x1018e0, edx: 0xa
29 esi: 0x0, edi: 0x0, ebp: 01030b4, esp: 0x1030b4
30 eflags: 0x202
31 Fatal fault in thread 0x001028e0! Aborting.
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| /Zephyr-latest/drivers/ethernet/ |
| D | eth_smsc91x_priv.h | 11 /* All Banks, Offset 0xe: Bank Select Register */
12 #define BSR 0xe
13 #define BSR_BANK_MASK GENMASK(2, 0) /* Which bank is currently selected */
14 #define BSR_IDENTIFY 0x33
17 /* Bank 0, Offset 0x0: Transmit Control Register */
18 #define TCR 0x0
19 #define TCR_TXENA 0x0001 /* Enable/disable transmitter */
20 #define TCR_PAD_EN 0x0080 /* Pad TX frames to 64 bytes */
22 /* Bank 0, Offset 0x02: EPH status register */
23 #define EPHSR 0x2
[all …]
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| D | eth_lan865x_priv.h | 20 #define LAN8650_DEVID 0x8650
21 #define LAN8651_DEVID 0x8651
22 #define LAN865X_REV_MASK GENMASK(3, 0)
25 /* Memory Map Sector (MMS) 1 (0x1) */
26 #define LAN865x_MAC_NCR MMS_REG(0x1, 0x000)
29 #define LAN865x_MAC_NCFGR MMS_REG(0x1, 0x001)
32 #define LAN865x_MAC_HRB MMS_REG(0x1, 0x020)
33 #define LAN865x_MAC_HRT MMS_REG(0x1, 0x021)
34 #define LAN865x_MAC_SAB1 MMS_REG(0x1, 0x022)
35 #define LAN865x_MAC_SAB2 MMS_REG(0x1, 0x024)
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| /Zephyr-latest/include/zephyr/dt-bindings/pinctrl/silabs/ |
| D | xg23-pinctrl.h | 16 #define SILABS_DBUS_ACMP0_ACMPOUT(port, pin) SILABS_DBUS(port, pin, 16, 1, 0, 1)
18 #define SILABS_DBUS_ACMP1_ACMPOUT(port, pin) SILABS_DBUS(port, pin, 19, 1, 0, 1)
20 #define SILABS_DBUS_CMU_CLKOUT0(port, pin) SILABS_DBUS(port, pin, 22, 1, 0, 2)
23 #define SILABS_DBUS_CMU_CLKIN0(port, pin) SILABS_DBUS(port, pin, 22, 0, 0, 1)
25 #define SILABS_DBUS_EUSART0_CS(port, pin) SILABS_DBUS(port, pin, 33, 1, 0, 1)
30 #define SILABS_DBUS_EUSART0_CTS(port, pin) SILABS_DBUS(port, pin, 33, 0, 0, 2)
32 #define SILABS_DBUS_EUSART1_CS(port, pin) SILABS_DBUS(port, pin, 41, 1, 0, 1)
37 #define SILABS_DBUS_EUSART1_CTS(port, pin) SILABS_DBUS(port, pin, 41, 0, 0, 2)
39 #define SILABS_DBUS_EUSART2_CS(port, pin) SILABS_DBUS(port, pin, 49, 1, 0, 1)
44 #define SILABS_DBUS_EUSART2_CTS(port, pin) SILABS_DBUS(port, pin, 49, 0, 0, 2)
[all …]
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| /Zephyr-latest/scripts/dts/python-devicetree/tests/ |
| D | test.dts | 29 controller-0 {
46 &{/interrupts-extended-test/controller-0} 1
53 #size-cells = <0>;
55 controller-0 {
76 0 0 0 0 &{/interrupt-map-test/controller-0} 0 0
77 0 0 0 1 &{/interrupt-map-test/controller-1} 0 0 0 1
78 0 0 0 2 &{/interrupt-map-test/controller-2} 0 0 0 0 0 2
79 0 1 0 0 &{/interrupt-map-test/controller-0} 0 3
80 0 1 0 1 &{/interrupt-map-test/controller-1} 0 0 0 4
81 0 1 0 2 &{/interrupt-map-test/controller-2} 0 0 0 0 0 5>;
[all …]
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| /Zephyr-latest/samples/posix/eventfd/ |
| D | sample.yaml | 25 - "Read 10 \\(0xa\\) from efd"
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| D | README.rst | 45 Read 10 (0xa) from efd
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| /Zephyr-latest/include/zephyr/arch/arc/v2/ |
| D | exception.h | 26 #define ARC_EV_RESET 0x0
27 #define ARC_EV_MEM_ERROR 0x1
28 #define ARC_EV_INS_ERROR 0x2
29 #define ARC_EV_MACHINE_CHECK 0x3
30 #define ARC_EV_TLB_MISS_I 0x4
31 #define ARC_EV_TLB_MISS_D 0x5
32 #define ARC_EV_PROT_V 0x6
33 #define ARC_EV_PRIVILEGE_V 0x7
34 #define ARC_EV_SWI 0x8
35 #define ARC_EV_TRAP 0x9
[all …]
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| /Zephyr-latest/dts/bindings/i2c/ |
| D | atmel,sam0-i2c.yaml | 32 dmas = <&dmac 0 0xb>, <&dmac 0 0xa>;
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| /Zephyr-latest/dts/bindings/spi/ |
| D | atmel,sam0-spi.yaml | 39 dmas = <&dmac 0 0xb>, <&dmac 1 0xa>;
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| /Zephyr-latest/include/zephyr/dt-bindings/pinctrl/renesas/ |
| D | pinctrl-ra.h | 10 #define RA_PORT_NUM_POS 0
11 #define RA_PORT_NUM_MASK 0xf
14 #define RA_PIN_NUM_MASK 0xf
16 #define RA_PSEL_HIZ_JTAG_SWD 0x0
17 #define RA_PSEL_AGT 0x1
18 #define RA_PSEL_GPT0 0x2
19 #define RA_PSEL_GPT1 0x3
20 #define RA_PSEL_SCI_0 0x4
21 #define RA_PSEL_SCI_2 0x4
22 #define RA_PSEL_SCI_4 0x4
[all …]
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| /Zephyr-latest/dts/arm/nuvoton/npcm/ |
| D | npcm.dtsi | 16 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0>;
28 reg = <0x4000c000 0xa>;
34 reg = <0x4000c00a 0x4>;
44 reg = <0x4000d000 0x2000
45 0x400b5000 0x2000>;
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| D | npcm4.dtsi | 16 reg = <0x4000c000 0xa>;
22 reg = <0x4000c00a 0x4>;
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