Searched +full:0 +full:x000fffff (Results 1 – 14 of 14) sorted by relevance
/Zephyr-latest/soc/nxp/mcx/mcxw/ |
D | linker.ld | 9 m_sector_size = 0x2000; 10 m_flash_end = 0x000FFFFF;
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/Zephyr-latest/dts/common/nordic/ |
D | nrf52840_partition.dtsi | 21 boot_partition: partition@0 { 23 reg = <0x00000000 0x0000C000>; 26 label = "image-0"; 27 reg = <0x0000C000 0x00077000>; 31 reg = <0x00083000 0x00075000>; 35 * The flash starting at 0x000f8000 and ending at 36 * 0x000fffff is reserved for use by the application. 45 reg = <0x000f8000 0x00008000>;
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/Zephyr-latest/dts/bindings/mtd/ |
D | fixed-partitions.yaml | 13 boot_partition: partition@0 { 15 reg = <0x00000000 0x0000C000>; 18 label = "image-0"; 19 reg = <0x0000C000 0x00076000>; 23 reg = <0x00082000 0x00076000>; 27 * The flash starting at 0x000f8000 and ending at 28 * 0x000fffff is reserved for use by the application. 37 reg = <0x000f8000 0x00008000>; 48 Above, slot0_partition's register address 0xc000 means that 80 reg = <0xSTART_OFFSET 0xSIZE>;
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/Zephyr-latest/boards/ezurio/bl654_sensor_board/ |
D | bl654_sensor_board.dts | 84 pinctrl-0 = <&uart0_default>; 93 pinctrl-0 = <&i2c0_default>; 99 reg = <0x76>; 105 pinctrl-0 = <&pwm0_default>; 120 boot_partition: partition@0 { 122 reg = <0x00000000 0x00010000>; 125 label = "image-0"; 126 reg = <0x00010000 0x00070000>; 130 reg = <0x00080000 0x00070000>; 134 reg = <0x000f0000 0x00008000>; [all …]
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/Zephyr-latest/boards/ezurio/bt510/ |
D | bt510.dts | 100 pinctrl-0 = <&uart0_default>; 109 pinctrl-0 = <&i2c0_default>; 114 reg = <0x18>; 122 reg = <0x40>; 137 boot_partition: partition@0 { 139 reg = <0x00000000 0x00018000>; 143 label = "image-0"; 144 reg = <0x00018000 0x00063000>; 149 reg = <0x0007b000 0x00063000>; 154 reg = <0x000de000 0x00002000>; [all …]
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/Zephyr-latest/boards/arduino/nano_33_ble/ |
D | arduino_nano_33_ble-common.dtsi | 49 pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; 61 pwms = <&pwm1 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; 72 pwms = <&pwm2 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; 87 pull-up-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; 117 boot_partition: partition@0 { 119 reg = <0x00000000 0x00010000>; 125 reg = <0x00010000 0x000e8000>; 130 * The flash starting at 0x000f8000 and ending at 131 * 0x000fffff is reserved for use by the application. 138 reg = <0x000f8000 0x00008000>; [all …]
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/Zephyr-latest/boards/sparkfun/micromod/ |
D | micromod_nrf52840.dts | 33 gpios = <&gpio0 13 0>; 41 gpio-map-mask = <0xffffffff 0xffffffc0>; 42 gpio-map-pass-thru = <0 0x3f>; 43 gpio-map = <0 0 &gpio0 4 0>, /* A0 */ 44 <1 0 &gpio0 5 0>, /* A1 */ 45 <2 0 &gpio0 27 0>, /* D0 */ 46 <3 0 &gpio1 8 0>, /* D1/CAM_TRIG */ 47 <4 0 &gpio0 15 0>, /* I2C_INT# */ 48 <5 0 &gpio0 29 0>, /* G0/BUS0 */ 49 <6 0 &gpio0 3 0>, /* G1/BUS1 */ [all …]
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/Zephyr-latest/boards/ezurio/mg100/ |
D | mg100.dts | 100 pinctrl-0 = <&uart0_default>; 110 pinctrl-0 = <&uart1_default>; 120 mdm-vgpio-gpios = <&gpio1 11 0>; 121 mdm-uart-dsr-gpios = <&gpio0 25 0>; 122 mdm-uart-cts-gpios = <&gpio0 15 0>; 123 mdm-gpio6-gpios = <&gpio1 12 0>; 131 pinctrl-0 = <&i2c0_default>; 137 reg = <0x19>; 146 pinctrl-0 = <&spi2_default>; 150 sdhc0: sdhc@0 { [all …]
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/Zephyr-latest/boards/ezurio/pinnacle_100_dvk/ |
D | pinnacle_100_dvk.dts | 116 pinctrl-0 = <&uart0_default>; 126 pinctrl-0 = <&uart1_default>; 136 mdm-vgpio-gpios = <&gpio1 11 0>; 137 mdm-uart-dsr-gpios = <&gpio0 25 0>; 138 mdm-uart-cts-gpios = <&gpio0 15 0>; 139 mdm-gpio6-gpios = <&gpio1 12 0>; 147 pinctrl-0 = <&i2c0_default>; 153 reg = <0x76>; 161 pinctrl-0 = <&spi0_default>; 169 pinctrl-0 = <&spi1_default>; [all …]
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/Zephyr-latest/boards/ezurio/bt610/ |
D | bt610.dts | 45 pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; 50 pwms = <&pwm1 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; 131 pinctrl-0 = <&pwm0_default>; 138 pinctrl-0 = <&pwm1_default>; 168 pinctrl-0 = <&uart0_default>; 177 pinctrl-0 = <&uart1_default>; 186 pinctrl-0 = <&i2c0_default>; 191 reg = <0x70>; 202 cs-gpios = <&gpio0 25 0>, 203 <&gpio0 31 0>; [all …]
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/Zephyr-latest/boards/nordic/nrf21540dk/ |
D | nrf21540dk_nrf52840.dts | 33 label = "Green LED 0"; 52 pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; 60 label = "Push button switch 0"; 83 gpio-map-mask = <0xffffffff 0xffffffc0>; 84 gpio-map-pass-thru = <0 0x3f>; 85 gpio-map = <0 0 &gpio0 3 0>, /* A0 */ 86 <1 0 &gpio0 4 0>, /* A1 */ 87 <2 0 &gpio0 28 0>, /* A2 */ 88 <3 0 &gpio0 29 0>, /* A3 */ 89 <4 0 &gpio0 30 0>, /* A4 */ [all …]
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/Zephyr-latest/boards/ezurio/bl5340_dvk/ |
D | bl5340_dvk_nrf5340_cpuapp_common.dtsi | 33 gpios = <&gpio_exp0 0 GPIO_ACTIVE_LOW>; 89 gpios = <&gpio1 8 0>, <&gpio1 10 0>, <&gpio1 7 0>, <&gpio1 9 0>; 118 #size-cells = <0>; 120 ili9340: ili9340@0 { 122 reg = <0>; 173 pinctrl-0 = <&i2c1_default>; 178 reg = <0x50>; 187 reg = <0x18>; 193 reg = <0x38>; 199 reg = <0x76>; [all …]
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/Zephyr-latest/drivers/memc/ |
D | sifive_ddrregs.h | 16 0x01375642, /* DENALI_PHY_00_DATA */ 17 0x0004c008, /* DENALI_PHY_01_DATA */ 18 0x000000da, /* DENALI_PHY_02_DATA */ 19 0x00000000, /* DENALI_PHY_03_DATA */ 20 0x00000000, /* DENALI_PHY_04_DATA */ 21 0x00010000, /* DENALI_PHY_05_DATA */ 22 0x01DDDD90, /* DENALI_PHY_06_DATA */ 23 0x01DDDD90, /* DENALI_PHY_07_DATA */ 24 0x01030001, /* DENALI_PHY_08_DATA */ 25 0x01000000, /* DENALI_PHY_09_DATA */ [all …]
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/Zephyr-latest/tests/lib/smf/src/ |
D | test_lib_hierarchical_5_ancestor_smf.c | 40 #define P05_ENTRY_BIT (1 << 0) 67 0x00000000, /* P05_ENTRY */ 68 0x00000001, /* P04_ENTRY */ 69 0x00000003, /* P03_ENTRY */ 70 0x00000007, /* P02_ENTRY */ 71 0x0000000f, /* P01_ENTRY */ 72 0x0000001f, /* A_ENTRY */ 73 0x0000003f, /* A_RUN */ 74 0x0000007f, /* A_EXIT */ 75 0x000000ff, /* B_ENTRY */ [all …]
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