1/*
2 * Copyright (c) 2022 Laird Connectivity
3 * Copyright (c) 2024 Ezurio
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8/dts-v1/;
9#include <nordic/nrf52840_qiaa.dtsi>
10#include "mg100-pinctrl.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "MG100";
15	compatible = "ezurio,mg100";
16
17	chosen {
18		zephyr,console = &uart0;
19		zephyr,shell-uart = &uart0;
20		zephyr,uart-mcumgr = &uart0;
21		zephyr,bt-mon-uart = &uart0;
22		zephyr,sram = &sram0;
23		zephyr,flash = &flash0;
24		zephyr,code-partition = &slot0_partition;
25		zephyr,ieee802154 = &ieee802154;
26	};
27
28	leds {
29		compatible = "gpio-leds";
30		led1: led_1 {
31			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
32			label = "Red LED";
33		};
34		led2: led_2 {
35			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
36			label = "Blue LED";
37		};
38		led3: led_3 {
39			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
40			label = "Green LED";
41		};
42	};
43
44	buttons {
45		compatible = "gpio-keys";
46		button1: button_1 {
47			gpios = <&gpio0 3 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
48			label = "Push button switch";
49			zephyr,code = <INPUT_KEY_0>;
50		};
51	};
52
53	en-sd-switch {
54		compatible = "regulator-fixed";
55		regulator-name = "en_sd_switch";
56		enable-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
57		regulator-boot-on;
58	};
59
60	/* These aliases are provided for compatibility with samples */
61	aliases {
62		led0 = &led1;
63		led1 = &led2;
64		led2 = &led3;
65		sw0 = &button1;
66		mcuboot-button0 = &button1;
67		mcuboot-led0 = &led1;
68		watchdog0 = &wdt0;
69	};
70};
71
72&reg1 {
73	regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
74};
75
76&adc {
77	status = "okay";
78};
79
80&uicr {
81	gpio-as-nreset;
82};
83
84&gpiote {
85	status = "okay";
86};
87
88&gpio0 {
89	status = "okay";
90};
91
92&gpio1 {
93	status = "okay";
94};
95
96&uart0 {
97	compatible = "nordic,nrf-uart";
98	status = "okay";
99	current-speed = <115200>;
100	pinctrl-0 = <&uart0_default>;
101	pinctrl-1 = <&uart0_sleep>;
102	pinctrl-names = "default", "sleep";
103};
104
105&uart1 {
106	compatible = "nordic,nrf-uarte";
107	status = "okay";
108	current-speed = <115200>;
109	hw-flow-control;
110	pinctrl-0 = <&uart1_default>;
111	pinctrl-1 = <&uart1_sleep>;
112	pinctrl-names = "default", "sleep";
113	hl7800: hl7800 {
114		compatible = "swir,hl7800";
115		status = "okay";
116		mdm-reset-gpios = <&gpio1 15 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
117		mdm-wake-gpios = <&gpio1 13 (GPIO_OPEN_SOURCE | GPIO_ACTIVE_HIGH)>;
118		mdm-pwr-on-gpios = <&gpio1 2 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
119		mdm-fast-shutd-gpios = <&gpio1 14 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
120		mdm-vgpio-gpios = <&gpio1 11 0>;
121		mdm-uart-dsr-gpios = <&gpio0 25 0>;
122		mdm-uart-cts-gpios = <&gpio0 15 0>;
123		mdm-gpio6-gpios = <&gpio1 12 0>;
124	};
125};
126
127&i2c0 {
128	compatible = "nordic,nrf-twim";
129	status = "okay";
130
131	pinctrl-0 = <&i2c0_default>;
132	pinctrl-1 = <&i2c0_sleep>;
133	pinctrl-names = "default", "sleep";
134	lis2dh@19 {
135		compatible = "st,lis3dh", "st,lis2dh";
136		status = "okay";
137		reg = <0x19>;
138		irq-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
139		anym-on-int1;
140	};
141};
142
143&spi2 {
144	compatible = "nordic,nrf-spim";
145	status = "okay";
146	pinctrl-0 = <&spi2_default>;
147	pinctrl-1 = <&spi2_sleep>;
148	pinctrl-names = "default", "sleep";
149	cs-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
150	sdhc0: sdhc@0 {
151		compatible = "zephyr,sdhc-spi-slot";
152		status = "okay";
153		reg = <0>;
154		spi-max-frequency = <8000000>;
155		mmc {
156			compatible = "zephyr,sdmmc-disk";
157			disk-name = "SD";
158			status = "okay";
159		};
160	};
161};
162
163&qspi {
164	status = "okay";
165	pinctrl-0 = <&qspi_default>;
166	pinctrl-1 = <&qspi_sleep>;
167	pinctrl-names = "default", "sleep";
168	mx25r64: mx25r6435f@0 {
169		compatible = "nordic,qspi-nor";
170		reg = <0>;
171		writeoc = "pp4io";
172		readoc = "read4io";
173		sck-frequency = <8000000>;
174		jedec-id = [ c2 28 17  ];
175		size = <67108864>;
176		has-dpd;
177		t-enter-dpd = <10000>;
178		t-exit-dpd = <35000>;
179	};
180};
181
182&ieee802154 {
183	status = "okay";
184};
185
186&flash0 {
187	partitions {
188		compatible = "fixed-partitions";
189		#address-cells = <1>;
190		#size-cells = <1>;
191
192		/* 96K */
193		boot_partition: partition@0 {
194			label = "mcuboot";
195			reg = <0x00000000 0x00018000>;
196		};
197		/* 896K */
198		slot0_partition: partition@18000 {
199			label = "image-0";
200			reg = <0x00018000 0x000E0000>;
201		};
202
203		/*
204		 * The flash starting at 0x000f8000 and ending at
205		 * 0x000fffff is reserved for use by the application.
206		 */
207
208		/*
209		 * Storage partition will be used by FCB/NVS
210		 * if enabled. 32K
211		 */
212		storage_partition: partition@f8000 {
213			label = "storage";
214			reg = <0x000f8000 0x00008000>;
215		};
216	};
217};
218
219&mx25r64 {
220	partitions {
221		compatible = "fixed-partitions";
222		#address-cells = <1>;
223		#size-cells = <1>;
224
225		/* 896K */
226		slot1_partition: partition@0 {
227			label = "image-1";
228			reg = <0x00000000 0x000E0000>;
229		};
230		/* 128K */
231		scratch_partition: partition@E0000 {
232			label = "image-scratch";
233			reg = <0x000E0000 0x00020000>;
234		};
235		/* 7MB */
236		lfs_partition: partition@100000 {
237			label = "lfs_storage";
238			reg = <0x00100000 0x00700000>;
239		};
240	};
241};
242