1/*
2 * Copyright (c) 2019 Laird Connectivity
3 * Copyright (c) 2024 Ezurio
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8/dts-v1/;
9#include <nordic/nrf52840_qiaa.dtsi>
10#include "pinnacle_100_dvk-pinctrl.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "Pinnacle 100 Dev Kit";
15	compatible = "ezurio,pinnacle-100-dvk";
16
17	chosen {
18		zephyr,console = &uart0;
19		zephyr,shell-uart = &uart0;
20		zephyr,uart-mcumgr = &uart0;
21		zephyr,bt-mon-uart = &uart0;
22		zephyr,sram = &sram0;
23		zephyr,flash = &flash0;
24		zephyr,code-partition = &slot0_partition;
25		zephyr,ieee802154 = &ieee802154;
26	};
27
28	leds {
29		compatible = "gpio-leds";
30		led1: led_1 {
31			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
32			label = "Blue LED 1";
33		};
34		led2: led_2 {
35			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
36			label = "Green LED 2";
37		};
38		led3: led_3 {
39			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
40			label = "Red LED 3";
41		};
42		led4: led_4 {
43			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
44			label = "Green LED 4";
45		};
46	};
47
48	buttons {
49		compatible = "gpio-keys";
50		button1: button_1 {
51			gpios = <&gpio0 31 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
52			label = "Push button switch 1";
53			zephyr,code = <INPUT_KEY_0>;
54		};
55		button2: button_2 {
56			gpios = <&gpio0 3 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
57			label = "Push button switch 2";
58			zephyr,code = <INPUT_KEY_1>;
59		};
60		button3: button_3 {
61			gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
62			label = "Push button switch 3";
63			zephyr,code = <INPUT_KEY_2>;
64		};
65		button4: button_4 {
66			gpios = <&gpio0 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
67			label = "Push button switch 4";
68			zephyr,code = <INPUT_KEY_3>;
69		};
70	};
71
72	/* These aliases are provided for compatibility with samples */
73	aliases {
74		led0 = &led1;
75		led1 = &led2;
76		led2 = &led3;
77		led3 = &led4;
78		sw0 = &button1;
79		sw1 = &button2;
80		sw2 = &button3;
81		sw3 = &button4;
82		mcuboot-button0 = &button1;
83		mcuboot-led0 = &led1;
84		watchdog0 = &wdt0;
85	};
86};
87
88&reg1 {
89	regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
90};
91
92&adc {
93	status ="okay";
94};
95
96&uicr {
97	gpio-as-nreset;
98};
99
100&gpiote {
101	status ="okay";
102};
103
104&gpio0 {
105	status ="okay";
106};
107
108&gpio1 {
109	status ="okay";
110};
111
112&uart0 {
113	compatible = "nordic,nrf-uart";
114	status = "okay";
115	current-speed = <115200>;
116	pinctrl-0 = <&uart0_default>;
117	pinctrl-1 = <&uart0_sleep>;
118	pinctrl-names = "default", "sleep";
119};
120
121&uart1 {
122	compatible = "nordic,nrf-uarte";
123	status = "okay";
124	current-speed = <115200>;
125	hw-flow-control;
126	pinctrl-0 = <&uart1_default>;
127	pinctrl-1 = <&uart1_sleep>;
128	pinctrl-names = "default", "sleep";
129	hl7800: hl7800 {
130		compatible = "swir,hl7800";
131		status = "okay";
132		mdm-reset-gpios = <&gpio1 15 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
133		mdm-wake-gpios = <&gpio1 13 (GPIO_OPEN_SOURCE | GPIO_ACTIVE_HIGH)>;
134		mdm-pwr-on-gpios = <&gpio1 2 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
135		mdm-fast-shutd-gpios = <&gpio1 14 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
136		mdm-vgpio-gpios = <&gpio1 11 0>;
137		mdm-uart-dsr-gpios = <&gpio0 25 0>;
138		mdm-uart-cts-gpios = <&gpio0 15 0>;
139		mdm-gpio6-gpios = <&gpio1 12 0>;
140	};
141};
142
143&i2c0 {
144	compatible = "nordic,nrf-twi";
145	status = "okay";
146
147	pinctrl-0 = <&i2c0_default>;
148	pinctrl-1 = <&i2c0_sleep>;
149	pinctrl-names = "default", "sleep";
150	bme680@76 {
151		compatible = "bosch,bme680";
152		status = "okay";
153		reg = <0x76>;
154	};
155};
156
157&spi0 {
158	compatible = "nordic,nrf-spi";
159	/* Cannot be used together with i2c0. */
160	/* status = "okay"; */
161	pinctrl-0 = <&spi0_default>;
162	pinctrl-1 = <&spi0_sleep>;
163	pinctrl-names = "default", "sleep";
164};
165
166&spi1 {
167	compatible = "nordic,nrf-spi";
168	status = "okay";
169	pinctrl-0 = <&spi1_default>;
170	pinctrl-1 = <&spi1_sleep>;
171	pinctrl-names = "default", "sleep";
172};
173
174&qspi {
175	status = "okay";
176	pinctrl-0 = <&qspi_default>;
177	pinctrl-1 = <&qspi_sleep>;
178	pinctrl-names = "default", "sleep";
179	mx25r64: mx25r6435f@0 {
180		compatible = "nordic,qspi-nor";
181		reg = <0>;
182		writeoc = "pp4io";
183		readoc = "read4io";
184		sck-frequency = <8000000>;
185		jedec-id = [c2 28 17];
186		size = <67108864>;
187		has-dpd;
188		t-enter-dpd = <10000>;
189		t-exit-dpd = <35000>;
190	};
191};
192
193&ieee802154 {
194	status = "okay";
195};
196
197&flash0 {
198	partitions {
199		compatible = "fixed-partitions";
200		#address-cells = <1>;
201		#size-cells = <1>;
202
203		/* 96K */
204		boot_partition: partition@0 {
205			label = "mcuboot";
206			reg = <0x00000000 0x00018000>;
207		};
208		/* 896K */
209		slot0_partition: partition@18000 {
210			label = "image-0";
211			reg = <0x00018000 0x000E0000>;
212		};
213
214		/*
215		 * The flash starting at 0x000f8000 and ending at
216		 * 0x000fffff is reserved for use by the application.
217		 */
218
219		/*
220		 * Storage partition will be used by FCB/NVS
221		 * if enabled. 32K
222		 */
223		storage_partition: partition@f8000 {
224			label = "storage";
225			reg = <0x000f8000 0x00008000>;
226		};
227	};
228};
229
230&mx25r64 {
231	partitions {
232		compatible = "fixed-partitions";
233		#address-cells = <1>;
234		#size-cells = <1>;
235
236		/* 896K */
237		slot1_partition: partition@0 {
238			label = "image-1";
239			reg = <0x00000000 0x000E0000>;
240		};
241		/* 128K */
242		scratch_partition: partition@E0000 {
243			label = "image-scratch";
244			reg = <0x000E0000 0x00020000>;
245		};
246		/* 7MB */
247		lfs_partition: partition@100000 {
248			label = "lfs_storage";
249			reg = <0x00100000 0x00700000>;
250		};
251	};
252};
253
254zephyr_udc0: &usbd {
255	compatible = "nordic,nrf-usbd";
256	status = "okay";
257};
258